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chore: Update makefiles & macros

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EnderIce2
2024-11-29 04:24:27 +02:00
parent ce3cf8162a
commit 7948d0c6e5
116 changed files with 682 additions and 740 deletions
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6
Kernel/include/abi.h
View File

@ -77,11 +77,11 @@ typedef struct
} a_un;
} Elf64_auxv_t;
#if defined(a64)
#if defined(__amd64__)
typedef Elf64_auxv_t Elf_auxv_t;
#elif defined(a32)
#elif defined(__i386__)
typedef Elf64_auxv_t Elf_auxv_t;
#elif defined(aa64)
#elif defined(__aarch64__)
typedef Elf64_auxv_t Elf_auxv_t;
#endif

46
Kernel/include/cpu.hpp
View File

@ -143,9 +143,9 @@ namespace CPU
{
do
{
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
asmv("pause");
#elif defined(aa64)
#elif defined(__aarch64__)
asmv("yield");
#endif
} while (Loop);
@ -156,12 +156,12 @@ namespace CPU
*/
nsa __noreturn __used inline void Stop()
{
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
asmv("CPUStopLoop:\n"
"cli\n"
"hlt\n"
"jmp CPUStopLoop");
#elif defined(aa64)
#elif defined(__aarch64__)
asmv("CPUStopLoop:\n"
"cpsid i\n"
"wfe\n"
@ -178,9 +178,9 @@ namespace CPU
{
do
{
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
asmv("hlt");
#elif defined(aa64)
#elif defined(__aarch64__)
asmv("wfe");
#endif
} while (Loop);
@ -431,7 +431,7 @@ namespace CPU
*/
static inline void cpuid(uint32_t Function, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
{
#ifdef a32
#ifdef __i386__
asmv("cpuid"
: "=a"(*eax), "=b"(*ebx), "=c"(*ecx), "=d"(*edx)
: "a"(Function));
@ -446,7 +446,7 @@ namespace CPU
nsa static inline void lgdt(void *gdt)
{
#ifdef a32
#ifdef __i386__
asmv("lgdt (%0)"
:
: "r"(gdt));
@ -457,7 +457,7 @@ namespace CPU
nsa static inline void lidt(void *idt)
{
#ifdef a32
#ifdef __i386__
asmv("lidt (%0)"
:
: "r"(idt));
@ -468,7 +468,7 @@ namespace CPU
nsa static inline void ltr(uint16_t Segment)
{
#ifdef a32
#ifdef __i386__
asmv("ltr %0"
:
: "r"(Segment));
@ -479,7 +479,7 @@ namespace CPU
nsa static inline void invlpg(void *Address)
{
#ifdef a32
#ifdef __i386__
asmv("invlpg (%0)"
:
: "r"(Address)
@ -491,7 +491,7 @@ namespace CPU
nsa static inline void fxsave(void *FXSaveArea)
{
#ifdef a32
#ifdef __i386__
if (!FXSaveArea)
return;
@ -506,7 +506,7 @@ namespace CPU
nsa static inline void fxrstor(void *FXRstorArea)
{
#ifdef a32
#ifdef __i386__
if (!FXRstorArea)
return;
@ -912,7 +912,7 @@ namespace CPU
nsa static inline void lgdt(void *gdt)
{
#ifdef a64
#ifdef __amd64__
asmv("lgdt (%0)"
:
: "r"(gdt));
@ -921,7 +921,7 @@ namespace CPU
nsa static inline void lidt(void *idt)
{
#ifdef a64
#ifdef __amd64__
asmv("lidt (%0)"
:
: "r"(idt));
@ -930,7 +930,7 @@ namespace CPU
nsa static inline void ltr(uint16_t Segment)
{
#ifdef a64
#ifdef __amd64__
asmv("ltr %0"
:
: "r"(Segment));
@ -939,7 +939,7 @@ namespace CPU
nsa static inline void invlpg(void *Address)
{
#ifdef a64
#ifdef __amd64__
asmv("invlpg (%0)"
:
: "r"(Address)
@ -958,7 +958,7 @@ namespace CPU
*/
nsa static inline void cpuid(uint32_t Function, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
{
#ifdef a64
#ifdef __amd64__
asmv("cpuid"
: "=a"(*eax), "=b"(*ebx), "=c"(*ecx), "=d"(*edx)
: "a"(Function));
@ -981,7 +981,7 @@ namespace CPU
nsa static inline void fxsave(void *FXSaveArea)
{
#ifdef a64
#ifdef __amd64__
if (!FXSaveArea || FXSaveArea >= (char *)0xfffffffffffff000)
return;
@ -994,7 +994,7 @@ namespace CPU
nsa static inline void fxrstor(void *FXRstorArea)
{
#ifdef a64
#ifdef __amd64__
if (!FXRstorArea || FXRstorArea >= (char *)0xfffffffffffff000)
return;
@ -1051,7 +1051,7 @@ namespace CPU
};
}
#if defined(a64)
#if defined(__amd64__)
/**
* CPU trap frame for the current architecture
*
@ -1060,7 +1060,7 @@ namespace CPU
typedef x64::TrapFrame TrapFrame;
typedef x64::SchedulerFrame SchedulerFrame;
typedef x64::ExceptionFrame ExceptionFrame;
#elif defined(a32)
#elif defined(__i386__)
/**
* CPU trap frame for the current architecture
*
@ -1069,7 +1069,7 @@ namespace CPU
typedef x32::TrapFrame TrapFrame;
typedef x32::SchedulerFrame SchedulerFrame;
typedef x32::ExceptionFrame ExceptionFrame;
#elif defined(aa64)
#elif defined(__aarch64__)
/**
* CPU trap frame for the current architecture
*

16
Kernel/include/cpu/membar.hpp
View File

@ -26,10 +26,10 @@ namespace CPU
{
nsa static inline void Barrier()
{
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
asmv("" ::
: "memory");
#elif defined(aa64)
#elif defined(__aarch64__)
asmv("dmb ish" ::
: "memory");
#endif
@ -37,10 +37,10 @@ namespace CPU
nsa static inline void Fence()
{
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
asmv("mfence" ::
: "memory");
#elif defined(aa64)
#elif defined(__aarch64__)
asmv("dmb ish" ::
: "memory");
#endif
@ -48,10 +48,10 @@ namespace CPU
nsa static inline void StoreFence()
{
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
asmv("sfence" ::
: "memory");
#elif defined(aa64)
#elif defined(__aarch64__)
asmv("dmb ishst" ::
: "memory");
#endif
@ -59,10 +59,10 @@ namespace CPU
nsa static inline void LoadFence()
{
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
asmv("lfence" ::
: "memory");
#elif defined(aa64)
#elif defined(__aarch64__)
asmv("dmb ishld" ::
: "memory");
#endif

8
Kernel/include/cpu/x86/cpuid_amd.hpp
View File

@ -21,15 +21,15 @@
#include <types.h>
#include <debug.h>
#if defined(a64)
#if defined(__amd64__)
typedef uint64_t cpuid_t;
#elif defined(a32)
#elif defined(__i386__)
typedef uint32_t cpuid_t;
#else
typedef uint64_t cpuid_t;
#endif // a64 || a32
#endif // __amd64__ || __i386__
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
#define __amd_cpuid_init(leaf) \
CPUID##leaf() \
{ \

8
Kernel/include/cpu/x86/cpuid_intel.hpp
View File

@ -21,15 +21,15 @@
#include <types.h>
#include <debug.h>
#if defined(a64)
#if defined(__amd64__)
typedef uint64_t cpuid_t;
#elif defined(a32)
#elif defined(__i386__)
typedef uint32_t cpuid_t;
#else
typedef uint64_t cpuid_t;
#endif // a64 || a32
#endif // __amd64__ || __i386__
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
#define __intel_cpuid_init(leaf) \
CPUID##leaf() \
{ \

2
Kernel/include/cpu/x86/x32/cr.hpp
View File

@ -141,7 +141,7 @@ namespace CPU
};
uint32_t raw;
} CR4;
#if defined(a32)
#if defined(__i386__)
nsa static inline CR0 readcr0()
{
uint32_t Result = 0;

2
Kernel/include/cpu/x86/x32/msr.hpp
View File

@ -400,7 +400,7 @@ namespace CPU
MSR_CR_PAT = 0x00000277,
};
#if defined(a32)
#if defined(__i386__)
nsa static inline uint64_t rdmsr(uint32_t msr)
{
uint32_t Low, High;

2
Kernel/include/cpu/x86/x64/cr.hpp
View File

@ -191,7 +191,7 @@ namespace CPU
uint64_t raw;
} XCR0;
#if defined(a64)
#if defined(__amd64__)
nsa static inline CR0 readcr0()
{
uint64_t Result = 0;

2
Kernel/include/cpu/x86/x64/msr.hpp
View File

@ -401,7 +401,7 @@ namespace CPU
MSR_CR_PAT_RESET = 0x0007040600070406ULL
};
#if defined(a64)
#if defined(__amd64__)
nsa static inline uint64_t rdmsr(uint32_t msr)
{
uint32_t Low, High;

4
Kernel/include/elf.h
View File

@ -946,7 +946,7 @@ typedef struct
char pr_psargs[ELF_PRARGSZ];
} Elf64_Prpsinfo;
#if defined(a64) || defined(aa64)
#if defined(__amd64__) || defined(__aarch64__)
typedef Elf64_Addr Elf_Addr;
typedef Elf64_Half Elf_Half;
typedef Elf64_Off Elf_Off;
@ -960,7 +960,7 @@ typedef Elf64_Rel Elf_Rel;
typedef Elf64_Sym Elf_Sym;
typedef Elf64_Dyn Elf_Dyn;
typedef Elf64_Rela Elf_Rela;
#elif defined(a32)
#elif defined(__i386__)
typedef Elf32_Addr Elf_Addr;
typedef Elf32_Half Elf_Half;
typedef Elf32_Off Elf_Off;

16
Kernel/include/intrin.hpp
View File

@ -25,21 +25,21 @@ namespace FXSR
{
void _fxsave(void *mem_addr)
{
#ifdef a64
#ifdef __amd64__
__builtin_ia32_fxsave(mem_addr);
#endif
}
void _fxrstor(void *mem_addr)
{
#ifdef a64
#ifdef __amd64__
__builtin_ia32_fxrstor(mem_addr);
#endif
}
void _fxsave64(void *mem_addr)
{
#ifdef a64
#ifdef __amd64__
asmv("fxsaveq (%0)"
:
: "r"(mem_addr)
@ -49,7 +49,7 @@ namespace FXSR
void _fxrstor64(void *mem_addr)
{
#ifdef a64
#ifdef __amd64__
asmv("fxrstorq (%0)"
:
: "r"(mem_addr)
@ -62,18 +62,18 @@ namespace SMAP
{
void _clac(void)
{
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
asmv("clac" ::
: "cc");
#endif // a64 || a32
#endif // __amd64__ || __i386__
}
void _stac(void)
{
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
asmv("stac" ::
: "cc");
#endif // a64 || a32
#endif // __amd64__ || __i386__
}
}

6
Kernel/include/ints.hpp
View File

@ -30,13 +30,13 @@ namespace Interrupts
#define INT_FRAMES_MAX 8
#endif
#if defined(a64)
#if defined(__amd64__)
/* APIC::APIC */ extern void *apic[255]; // MAX_CPU
/* APIC::Timer */ extern void *apicTimer[255]; // MAX_CPU
#elif defined(a32)
#elif defined(__i386__)
/* APIC::APIC */ extern void *apic[255]; // MAX_CPU
/* APIC::Timer */ extern void *apicTimer[255]; // MAX_CPU
#elif defined(aa64)
#elif defined(__aarch64__)
#endif
void Initialize(int Core);

8
Kernel/include/io.h
View File

@ -20,7 +20,7 @@
#include <types.h>
#if defined(a86)
#if defined(__amd64__) || defined(__i386__)
#ifdef __cplusplus
extern "C"
@ -98,7 +98,7 @@ extern "C"
: "memory");
}
#if defined(a64)
#if defined(__amd64__)
static inline void mmoutq(void *Address, uint64_t Value)
{
asmv("mov %1, %0"
@ -138,7 +138,7 @@ extern "C"
return Result;
}
#if defined(a64)
#if defined(__amd64__)
static inline uint64_t mminq(void *Address)
{
uint64_t Result;
@ -154,5 +154,5 @@ extern "C"
}
#endif
#endif // defined(a86)
#endif // defined(__amd64__) || defined(__i386__)
#endif // !__FENNIX_KERNEL_IO_H__

4
Kernel/include/memory/macro.hpp
View File

@ -48,7 +48,7 @@
/* From pages */
#define FROM_PAGES(d) ((d) * PAGE_SIZE)
#if defined(a64) || defined(aa64)
#if defined(__amd64__) || defined(__aarch64__)
#define KERNEL_VMA_OFFSET 0xFFFFFFFF80000000
#define USER_ALLOC_BASE 0xFFFFA00000000000 /* 256 GiB */
@ -59,7 +59,7 @@
#define USER_STACK_END 0xFFFFEFFF00000000 /* 256 MiB */
#define USER_STACK_BASE 0xFFFFEFFFFFFF0000
#elif defined(a32)
#elif defined(__i386__)
#define KERNEL_VMA_OFFSET 0xC0000000
#define USER_ALLOC_BASE 0x80000000

90
Kernel/include/memory/table.hpp
View File

@ -108,7 +108,7 @@ namespace Memory
{
struct
{
#if defined(a64)
#if defined(__amd64__)
uintptr_t Present : 1; // 0
uintptr_t ReadWrite : 1; // 1
uintptr_t UserSupervisor : 1; // 2
@ -131,7 +131,7 @@ namespace Memory
uintptr_t Available9 : 1; // 58
uintptr_t ProtectionKey : 4; // 59-62
uintptr_t ExecuteDisable : 1; // 63
#elif defined(a32)
#elif defined(__i386__)
uintptr_t Present : 1; // 0
uintptr_t ReadWrite : 1; // 1
uintptr_t UserSupervisor : 1; // 2
@ -145,7 +145,7 @@ namespace Memory
uintptr_t KernelReserve : 1; // 10
uintptr_t Available2 : 1; // 11
uintptr_t Address : 20; // 12-31
#elif defined(aa64)
#elif defined(__aarch64__)
#endif
};
uintptr_t raw = 0;
@ -153,15 +153,15 @@ namespace Memory
/** @brief Set Address */
void SetAddress(uintptr_t _Address)
{
#if defined(a64)
#if defined(__amd64__)
_Address &= 0x000000FFFFFFFFFF;
this->raw &= 0xFFF0000000000FFF;
this->raw |= (_Address << 12);
#elif defined(a32)
#elif defined(__i386__)
_Address &= 0x000FFFFF;
this->raw &= 0xFFC00003;
this->raw |= (_Address << 12);
#elif defined(aa64)
#elif defined(__aarch64__)
_Address &= 0x000000FFFFFFFFFF;
this->raw &= 0xFFF0000000000FFF;
this->raw |= (_Address << 12);
@ -171,11 +171,11 @@ namespace Memory
/** @brief Get Address */
uintptr_t GetAddress()
{
#if defined(a64)
#if defined(__amd64__)
return (this->raw & 0x000FFFFFFFFFF000) >> 12;
#elif defined(a32)
#elif defined(__i386__)
return ((uintptr_t)(this->raw & 0x003FFFFF000) >> 12);
#elif defined(aa64)
#elif defined(__aarch64__)
return (this->raw & 0x000FFFFFFFFFF000) >> 12;
#endif
}
@ -183,17 +183,17 @@ namespace Memory
struct __packed PageTableEntryPtr
{
#if defined(a64)
#if defined(__amd64__)
PageTableEntry Entries[512];
#elif defined(a32)
#elif defined(__i386__)
PageTableEntry Entries[1024];
#elif defined(aa64)
#elif defined(__aarch64__)
#endif
};
union __packed PageDirectoryEntry
{
#if defined(a64)
#if defined(__amd64__)
struct
{
uintptr_t Present : 1; // 0
@ -250,7 +250,7 @@ namespace Memory
uintptr_t ProtectionKey : 4; // 59-62
uintptr_t ExecuteDisable : 1; // 63
} TwoMiB;
#elif defined(a32)
#elif defined(__i386__)
struct
{
uintptr_t Present : 1; // 0
@ -287,22 +287,22 @@ namespace Memory
uintptr_t Reserved0 : 1; // 21
uintptr_t Address1 : 10; // 22-31
} FourMiB;
#elif defined(aa64)
#elif defined(__aarch64__)
#endif
uintptr_t raw = 0;
/** @brief Set PageTableEntryPtr address */
void SetAddress(uintptr_t _Address)
{
#if defined(a64)
#if defined(__amd64__)
_Address &= 0x000000FFFFFFFFFF;
this->raw &= 0xFFF0000000000FFF;
this->raw |= (_Address << 12);
#elif defined(a32)
#elif defined(__i386__)
_Address &= 0x000FFFFF;
this->raw &= 0xFFC00003;
this->raw |= (_Address << 12);
#elif defined(aa64)
#elif defined(__aarch64__)
_Address &= 0x000000FFFFFFFFFF;
this->raw &= 0xFFF0000000000FFF;
this->raw |= (_Address << 12);
@ -312,11 +312,11 @@ namespace Memory
/** @brief Get PageTableEntryPtr address */
uintptr_t GetAddress()
{
#if defined(a64)
#if defined(__amd64__)
return (this->raw & 0x000FFFFFFFFFF000) >> 12;
#elif defined(a32)
#elif defined(__i386__)
return ((uintptr_t)(this->raw & 0x003FFFFF000) >> 12);
#elif defined(aa64)
#elif defined(__aarch64__)
return (this->raw & 0x000FFFFFFFFFF000) >> 12;
#endif
}
@ -329,7 +329,7 @@ namespace Memory
union __packed PageDirectoryPointerTableEntry
{
#if defined(a64)
#if defined(__amd64__)
struct
{
uintptr_t Present : 1; // 0
@ -386,18 +386,18 @@ namespace Memory
uintptr_t ProtectionKey : 4; // 59-62
uintptr_t ExecuteDisable : 1; // 63
} OneGiB;
#elif defined(aa64)
#elif defined(__aarch64__)
#endif
uintptr_t raw = 0;
/** @brief Set PageDirectoryEntryPtr address */
void SetAddress(uintptr_t _Address)
{
#if defined(a64)
#if defined(__amd64__)
_Address &= 0x000000FFFFFFFFFF;
this->raw &= 0xFFF0000000000FFF;
this->raw |= (_Address << 12);
#elif defined(aa64)
#elif defined(__aarch64__)
_Address &= 0x000000FFFFFFFFFF;
this->raw &= 0xFFF0000000000FFF;
this->raw |= (_Address << 12);
@ -407,11 +407,11 @@ namespace Memory
/** @brief Get PageDirectoryEntryPtr address */
uintptr_t GetAddress()
{
#if defined(a64)
#if defined(__amd64__)
return (this->raw & 0x000FFFFFFFFFF000) >> 12;
#elif defined(a32)
#elif defined(__i386__)
return 0;
#elif defined(aa64)
#elif defined(__aarch64__)
return (this->raw & 0x000FFFFFFFFFF000) >> 12;
#endif
}
@ -424,7 +424,7 @@ namespace Memory
union __packed PageMapLevel4
{
#if defined(a64)
#if defined(__amd64__)
struct
{
uintptr_t Present : 1; // 0
@ -453,18 +453,18 @@ namespace Memory
uintptr_t Available15 : 1; // 62
uintptr_t ExecuteDisable : 1; // 63
};
#elif defined(aa64)
#elif defined(__aarch64__)
#endif
uintptr_t raw = 0;
/** @brief Set PageDirectoryPointerTableEntryPtr address */
void SetAddress(uintptr_t _Address)
{
#if defined(a64)
#if defined(__amd64__)
_Address &= 0x000000FFFFFFFFFF;
this->raw &= 0xFFF0000000000FFF;
this->raw |= (_Address << 12);
#elif defined(aa64)
#elif defined(__aarch64__)
_Address &= 0x000000FFFFFFFFFF;
this->raw &= 0xFFF0000000000FFF;
this->raw |= (_Address << 12);
@ -474,11 +474,11 @@ namespace Memory
/** @brief Get PageDirectoryPointerTableEntryPtr address */
uintptr_t GetAddress()
{
#if defined(a64)
#if defined(__amd64__)
return (this->raw & 0x000FFFFFFFFFF000) >> 12;
#elif defined(a32)
#elif defined(__i386__)
return 0;
#elif defined(aa64)
#elif defined(__aarch64__)
return (this->raw & 0x000FFFFFFFFFF000) >> 12;
#endif
}
@ -491,7 +491,7 @@ namespace Memory
union __packed PageMapLevel5
{
#if defined(a64)
#if defined(__amd64__)
struct
{
uintptr_t Present : 1; // 0
@ -520,18 +520,18 @@ namespace Memory
uintptr_t Available14 : 1; // 62
uintptr_t ExecuteDisable : 1; // 63
};
#elif defined(aa64)
#elif defined(__aarch64__)
#endif
uintptr_t raw = 0;
/** @brief Set PageMapLevel4Ptr address */
void SetAddress(uintptr_t _Address)
{
#if defined(a64)
#if defined(__amd64__)
_Address &= 0x000000FFFFFFFFFF;
this->raw &= 0xFFF0000000000FFF;
this->raw |= (_Address << 12);
#elif defined(aa64)
#elif defined(__aarch64__)
_Address &= 0x000000FFFFFFFFFF;
this->raw &= 0xFFF0000000000FFF;
this->raw |= (_Address << 12);
@ -541,11 +541,11 @@ namespace Memory
/** @brief Get PageMapLevel4Ptr address */
uintptr_t GetAddress()
{
#if defined(a64)
#if defined(__amd64__)
return (this->raw & 0x000FFFFFFFFFF000) >> 12;
#elif defined(a32)
#elif defined(__i386__)
return 0;
#elif defined(aa64)
#elif defined(__aarch64__)
return (this->raw & 0x000FFFFFFFFFF000) >> 12;
#endif
}
@ -554,11 +554,11 @@ namespace Memory
class PageTable
{
public:
#if defined(a64)
#if defined(__amd64__)
PageMapLevel4 Entries[512];
#elif defined(a32)
#elif defined(__i386__)
PageDirectoryEntry Entries[1024];
#elif defined(aa64)
#elif defined(__aarch64__)
#endif
/**

6
Kernel/include/memory/virtual.hpp
View File

@ -45,7 +45,7 @@ namespace Memory
class PageMapIndexer
{
public:
#if defined(a64)
#if defined(__amd64__)
uintptr_t PMLIndex = 0;
uintptr_t PDPTEIndex = 0;
#endif
@ -100,11 +100,11 @@ namespace Memory
*/
MapType GetMapType(void *VirtualAddress);
#ifdef a64
#ifdef __amd64__
PageMapLevel5 *GetPML5(void *VirtualAddress, MapType Type = MapType::FourKiB);
PageMapLevel4 *GetPML4(void *VirtualAddress, MapType Type = MapType::FourKiB);
PageDirectoryPointerTableEntry *GetPDPTE(void *VirtualAddress, MapType Type = MapType::FourKiB);
#endif /* a64 */
#endif /* __amd64__ */
PageDirectoryEntry *GetPDE(void *VirtualAddress, MapType Type = MapType::FourKiB);
PageTableEntry *GetPTE(void *VirtualAddress, MapType Type = MapType::FourKiB);

2
Kernel/include/signal.hpp
View File

@ -310,7 +310,7 @@ namespace Tasking
struct StackInfo
{
#ifdef a64
#ifdef __amd64__
CPU::x64::FXState fx;
CPU::x64::SchedulerFrame tf;
uintptr_t GSBase, FSBase, ShadowGSBase;

6
Kernel/include/smp.hpp
View File

@ -29,11 +29,11 @@
struct CPUArchData
{
#if defined(a64)
#if defined(__amd64__)
__aligned(16) CPU::x64::FXState FPU{};
#elif defined(a32)
#elif defined(__i386__)
__aligned(16) CPU::x32::FXState FPU{};
#elif defined(aa64)
#elif defined(__aarch64__)
#endif
};

6
Kernel/include/syscalls.hpp
View File

@ -22,7 +22,7 @@
typedef struct SyscallsFrame
{
#if defined(a64)
#if defined(__amd64__)
uint64_t r15;
uint64_t r14;
uint64_t r13;
@ -44,7 +44,7 @@ typedef struct SyscallsFrame
uint64_t Flags;
uint64_t StackPointer;
uint64_t StackSegment;
#elif defined(a32)
#elif defined(__i386__)
uint32_t ebp;
uint32_t edi;
uint32_t esi;
@ -58,7 +58,7 @@ typedef struct SyscallsFrame
uint32_t Flags;
uint32_t StackPointer;
uint32_t StackSegment;
#elif defined(aa64)
#elif defined(__aarch64__)
uint32_t ReturnAddress;
uint32_t StackPointer;
#endif

12
Kernel/include/task.hpp
View File

@ -355,13 +355,13 @@ namespace Tasking
ThreadSignal Signals;
/* CPU state */
#if defined(a64)
#if defined(__amd64__)
CPU::x64::SchedulerFrame Registers{};
uintptr_t ShadowGSBase, GSBase, FSBase;
#elif defined(a32)
#elif defined(__i386__)
CPU::x32::SchedulerFrame Registers{};
uintptr_t ShadowGSBase, GSBase, FSBase;
#elif defined(aa64)
#elif defined(__aarch64__)
uintptr_t Registers; // TODO
#endif
__aligned(16) CPU::x64::FXState FPU;
@ -549,11 +549,11 @@ namespace Tasking
constexpr TaskArchitecture GetKArch()
{
#if defined(a64)
#if defined(__amd64__)
return x64;
#elif defined(a32)
#elif defined(__i386__)
return x32;
#elif defined(aa64)
#elif defined(__aarch64__)
return ARM64;
#endif
}

10
Kernel/include/types.h
View File

@ -147,7 +147,7 @@ typedef __SIG_ATOMIC_TYPE__ sig_atomic_t;
// TODO: ssize_t
typedef intptr_t ssize_t;
#if defined(a64) || defined(aa64)
#if defined(__amd64__) || defined(__aarch64__)
typedef int64_t off_t;
typedef int64_t off64_t;
typedef uint32_t mode_t;
@ -163,7 +163,7 @@ typedef uint32_t uid_t;
typedef uint32_t gid_t;
typedef int64_t clock_t;
typedef int32_t pid_t;
#elif defined(a32)
#elif defined(__i386__)
typedef int32_t off_t;
typedef long long off64_t;
typedef __INT32_TYPE__ mode_t;
@ -303,17 +303,17 @@ public:
#define WINT_MAX __WINT_MAX__
#define WINT_MIN __WINT_MIN__
#if defined(a64)
#if defined(__amd64__)
#define BREAK __asm__ __volatile__("int $0x3" \
: \
: \
: "memory");
#elif defined(a32)
#elif defined(__i386__)
#define BREAK __asm__ __volatile__("int $0x3" \
: \
: \
: "memory");
#elif defined(aa64)
#elif defined(__aarch64__)
#define BREAK __asm__ __volatile__("brk #0" \
: \
: \