mirror of
https://github.com/Fennix-Project/Kernel.git
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Add implementation for GDT & IDT on x32 and QoL fixes
This commit is contained in:
Alex
@ -25,75 +25,123 @@
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namespace GlobalDescriptorTable
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{
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static GlobalDescriptorTableEntries GDTEntriesTemplate = {
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// null
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{.Length = 0x0,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {.Raw = 0x0},
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.Flags = {.Raw = 0x0},
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.BaseHigh = 0x0},
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.Null =
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{
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.Limit0 = 0x0,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {.Raw = 0x0},
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// .Limit1 = 0x0,
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.Flags = {.Raw = 0x0},
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.BaseHigh = 0x0,
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},
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// kernel code
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{.Length = 0x0,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {.A = 0,
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.Code =
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{
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 1,
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.S = 1,
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.DPL = 0,
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.P = 1},
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.Flags = {.Unknown = 0x0, .L = 1},
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.BaseHigh = 0x0},
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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// kernel data
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{.Length = 0x0,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 0,
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.S = 1,
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.DPL = 0,
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.P = 1},
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.Flags = {.Raw = 0x0},
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.BaseHigh = 0x0},
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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// user data
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{.Length = 0x0,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 0,
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.S = 1,
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.DPL = 3,
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.P = 1},
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.Flags = {.Raw = 0x0},
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.BaseHigh = 0x0},
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.Data = {
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 0,
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.S = 1,
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.DPL = 0,
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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// user code
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{.Length = 0x0,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 1,
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.S = 1,
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.DPL = 3,
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.P = 1},
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.Flags = {.Unknown = 0x0, .L = 1},
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.BaseHigh = 0x0},
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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// tss
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{}};
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.UserData = {
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 0,
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.S = 1,
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.DPL = 3,
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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GlobalDescriptorTableEntries GDTEntries[MAX_CPU];
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GlobalDescriptorTableDescriptor gdt[MAX_CPU];
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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.UserCode = {
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 1,
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.S = 1,
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.DPL = 3,
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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.TaskStateSegment = {},
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};
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GlobalDescriptorTableEntries GDTEntries[MAX_CPU] __aligned(16);
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GlobalDescriptorTableDescriptor gdt[MAX_CPU] __aligned(16);
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TaskStateSegment tss[MAX_CPU] = {
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0,
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@ -102,15 +150,123 @@ namespace GlobalDescriptorTable
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{0, 0, 0, 0, 0, 0, 0},
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0,
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0,
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0,
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};
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void *CPUStackPointer[MAX_CPU];
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SafeFunction void Init(int Core)
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{
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memcpy(&GDTEntries[Core], &GDTEntriesTemplate, sizeof(GlobalDescriptorTableEntries));
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gdt[Core] = {.Length = sizeof(GlobalDescriptorTableEntries) - 1, .Entries = &GDTEntries[Core]};
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debug("GDT: %#lx", &gdt[Core]);
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debug("GDT KERNEL: CODE %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_KERNEL_CODE,
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GDTEntries[Core].Code.Limit0,
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GDTEntries[Core].Code.BaseLow,
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GDTEntries[Core].Code.BaseMiddle,
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GDTEntries[Core].Code.Access.Raw,
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GDTEntries[Core].Code.Flags.Reserved,
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GDTEntries[Core].Code.Flags.Raw & ~0xF,
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GDTEntries[Core].Code.BaseHigh);
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debug("GDT KERNEL: DATA %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_KERNEL_DATA,
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GDTEntries[Core].Data.Limit0,
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GDTEntries[Core].Data.BaseLow,
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GDTEntries[Core].Data.BaseMiddle,
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GDTEntries[Core].Data.Access.Raw,
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GDTEntries[Core].Data.Flags.Reserved,
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GDTEntries[Core].Data.Flags.Raw & ~0xF,
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GDTEntries[Core].Data.BaseHigh);
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debug("GDT USER: CODE %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_USER_CODE,
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GDTEntries[Core].UserCode.Limit0,
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GDTEntries[Core].UserCode.BaseLow,
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GDTEntries[Core].UserCode.BaseMiddle,
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GDTEntries[Core].UserCode.Access.Raw,
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GDTEntries[Core].UserCode.Flags.Reserved,
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GDTEntries[Core].UserCode.Flags.Raw & ~0xF,
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GDTEntries[Core].UserCode.BaseHigh);
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debug("GDT USER: DATA %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_USER_DATA,
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GDTEntries[Core].UserData.Limit0,
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GDTEntries[Core].UserData.BaseLow,
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GDTEntries[Core].UserData.BaseMiddle,
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GDTEntries[Core].UserData.Access.Raw,
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GDTEntries[Core].UserData.Flags.Reserved,
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GDTEntries[Core].UserData.Flags.Raw & ~0xF,
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GDTEntries[Core].UserData.BaseHigh);
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CPU::x32::lgdt(&gdt[Core]);
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asmv("mov %%esp, %%eax\n"
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"push $16\n"
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"push %%eax\n"
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"pushf\n"
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"push $8\n"
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"push $1f\n"
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"iret\n"
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"1:\n"
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"movw $16, %%ax\n"
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"movw %%ax, %%ds\n"
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"movw %%ax, %%es\n" ::
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: "memory", "eax");
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CPUStackPointer[Core] = KernelAllocator.RequestPages(TO_PAGES(STACK_SIZE + 1));
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memset(CPUStackPointer[Core], 0, STACK_SIZE);
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debug("CPU %d Stack Pointer: %#lx-%#lx (%d pages)", Core,
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CPUStackPointer[Core], (uintptr_t)CPUStackPointer[Core] + STACK_SIZE,
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TO_PAGES(STACK_SIZE + 1));
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uintptr_t Base = (uintptr_t)&tss[Core];
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size_t Limit = Base + sizeof(TaskStateSegment);
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gdt[Core].Entries->TaskStateSegment.Limit = Limit & 0xFFFF;
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gdt[Core].Entries->TaskStateSegment.BaseLow = Base & 0xFFFF;
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gdt[Core].Entries->TaskStateSegment.BaseMiddle = (Base >> 16) & 0xFF;
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gdt[Core].Entries->TaskStateSegment.BaseHigh = (Base >> 24) & 0xFF;
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gdt[Core].Entries->TaskStateSegment.BaseUpper = s_cst(uint32_t, (Base >> 32) & 0xFFFFFFFF);
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gdt[Core].Entries->TaskStateSegment.Access = {.A = 1, .RW = 0, .DC = 0, .E = 1, .S = 0, .DPL = 0, .P = 1};
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gdt[Core].Entries->TaskStateSegment.Granularity = (0 << 4) | ((Limit >> 16) & 0xF);
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tss[Core].IOMapBaseAddressOffset = sizeof(TaskStateSegment);
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tss[Core].StackPointer[0] = (uint64_t)CPUStackPointer[Core] + STACK_SIZE;
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tss[Core].StackPointer[1] = 0x0;
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tss[Core].StackPointer[2] = 0x0;
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for (size_t i = 0; i < sizeof(tss[Core].InterruptStackTable) / sizeof(tss[Core].InterruptStackTable[7]); i++)
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{
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void *NewStack = KernelAllocator.RequestPages(TO_PAGES(STACK_SIZE + 1));
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tss[Core].InterruptStackTable[i] = (uint64_t)NewStack + STACK_SIZE;
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memset((void *)(tss[Core].InterruptStackTable[i] - STACK_SIZE), 0, STACK_SIZE);
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debug("IST-%d: %#lx-%#lx", i, NewStack, (uintptr_t)NewStack + STACK_SIZE);
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}
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CPU::x32::ltr(GDT_TSS);
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debug("Global Descriptor Table initialized");
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}
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SafeFunction void SetKernelStack(void *Stack)
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{
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long CPUID = GetCurrentCPU()->ID;
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if (Stack != nullptr)
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tss[CPUID].StackPointer[0] = (uint64_t)Stack;
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else
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tss[CPUID].StackPointer[0] = (uint64_t)CPUStackPointer[CPUID] + STACK_SIZE;
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/*
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FIXME: There's a bug in kernel which if
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we won't update "tss[CPUID].StackPointer[0]"
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with the current stack pointer, the kernel
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will crash.
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*/
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asmv("mov %%esp, %0"
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: "=r"(tss[CPUID].StackPointer[0]));
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}
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void *GetKernelStack() { return (void *)tss[GetCurrentCPU()->ID].StackPointer[0]; }
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}
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727
Architecture/i386/cpu/InterruptDescriptorTable.cpp
Normal file
727
Architecture/i386/cpu/InterruptDescriptorTable.cpp
Normal file
@ -0,0 +1,727 @@
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/*
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This file is part of Fennix Kernel.
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Fennix Kernel is free software: you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation, either version 3 of
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the License, or (at your option) any later version.
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Fennix Kernel is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "idt.hpp"
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#include <memory.hpp>
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#include <cpu.hpp>
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#include <debug.h>
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#include <io.h>
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#include "gdt.hpp"
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#include "../../../kernel.h"
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/* conversion from ‘uint64_t’ {aka ‘long unsigned int’} to ‘unsigned char:2’ may change value */
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#pragma GCC diagnostic ignored "-Wconversion"
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extern "C" void MainInterruptHandler(void *Data);
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extern "C" void ExceptionHandler(void *Data);
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namespace InterruptDescriptorTable
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{
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static InterruptDescriptorTableEntry Entries[0x100];
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InterruptDescriptorTableDescriptor idtd = {
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.Length = sizeof(Entries) - 1,
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.Entries = Entries,
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};
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void SetEntry(uint8_t Index,
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void (*Base)(),
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InterruptGateType Gate,
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InterruptRingType Ring,
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bool Present,
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uint16_t SegmentSelector)
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{
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/* FIXME: Check "Intel Software Developer Manual, Volume 3-A" at Section 6.11: IDT Descriptors */
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Entries[Index].LowOffset = s_cst(uint16_t, ((uint32_t)Base & 0xFFFF));
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Entries[Index].SegmentSelector = SegmentSelector;
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Entries[Index].Reserved0 = 0;
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Entries[Index].Flags = Gate;
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Entries[Index].Reserved1 = 0;
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Entries[Index].Ring = Ring;
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Entries[Index].Present = Present;
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Entries[Index].HighOffset = s_cst(uint16_t, ((uint32_t)Base >> 16 /* & 0xFFFF */));
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}
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extern "C" __naked __used __no_stack_protector __aligned(16) void ExceptionHandlerStub()
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{
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asm("cld\n"
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"cli\n"
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// "push %eax\n"
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// "push %ebx\n"
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// "push %ecx\n"
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// "push %edx\n"
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// "push %esi\n"
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// "push %edi\n"
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// "push %ebp\n"
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"pusha\n"
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"push %esp\n"
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"call ExceptionHandler\n"
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"popa\n"
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// "pop %ebp\n"
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// "pop %edi\n"
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// "pop %esi\n"
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// "pop %edx\n"
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// "pop %ecx\n"
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// "pop %ebx\n"
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// "pop %eax\n"
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"add $8, %esp\n"
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"iret");
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}
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extern "C" __naked __used __no_stack_protector __aligned(16) void InterruptHandlerStub()
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{
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asm("cld\n"
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"cli\n"
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// "push %eax\n"
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// "push %ebx\n"
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// "push %ecx\n"
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// "push %edx\n"
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// "push %esi\n"
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// "push %edi\n"
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// "push %ebp\n"
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"pusha\n"
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"push %esp\n"
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"call MainInterruptHandler\n"
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"popa\n"
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// "pop %ebp\n"
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// "pop %edi\n"
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// "pop %esi\n"
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||||
// "pop %edx\n"
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// "pop %ecx\n"
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// "pop %ebx\n"
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// "pop %eax\n"
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"add $8, %esp\n"
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"sti\n"
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"iret");
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}
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#pragma region Exceptions
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#define EXCEPTION_HANDLER(num) \
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__naked __used __no_stack_protector __aligned(16) static void InterruptHandler_##num() \
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{ \
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asm("push $0\npush $" #num "\n" \
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"jmp ExceptionHandlerStub"); \
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}
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||||
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#define EXCEPTION_ERROR_HANDLER(num) \
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__naked __used __no_stack_protector __aligned(16) static void InterruptHandler_##num() \
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{ \
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asm("push $" #num "\n" \
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"jmp ExceptionHandlerStub"); \
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||||
}
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||||
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#define INTERRUPT_HANDLER(num) \
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__naked __used __no_stack_protector __aligned(16) void InterruptHandler_##num() \
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{ \
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asm("push $0\npush $" #num "\n" \
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"jmp InterruptHandlerStub\n"); \
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||||
}
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||||
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/* ISR */
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||||
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EXCEPTION_HANDLER(0x0);
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EXCEPTION_HANDLER(0x1);
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||||
EXCEPTION_HANDLER(0x2);
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||||
EXCEPTION_HANDLER(0x3);
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||||
EXCEPTION_HANDLER(0x4);
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EXCEPTION_HANDLER(0x5);
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||||
EXCEPTION_HANDLER(0x6);
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EXCEPTION_HANDLER(0x7);
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EXCEPTION_ERROR_HANDLER(0x8);
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EXCEPTION_HANDLER(0x9);
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||||
EXCEPTION_ERROR_HANDLER(0xa);
|
||||
EXCEPTION_ERROR_HANDLER(0xb);
|
||||
EXCEPTION_ERROR_HANDLER(0xc);
|
||||
EXCEPTION_ERROR_HANDLER(0xd);
|
||||
EXCEPTION_ERROR_HANDLER(0xe);
|
||||
EXCEPTION_HANDLER(0xf);
|
||||
EXCEPTION_ERROR_HANDLER(0x10);
|
||||
EXCEPTION_HANDLER(0x11);
|
||||
EXCEPTION_HANDLER(0x12);
|
||||
EXCEPTION_HANDLER(0x13);
|
||||
EXCEPTION_HANDLER(0x14);
|
||||
EXCEPTION_HANDLER(0x15);
|
||||
EXCEPTION_HANDLER(0x16);
|
||||
EXCEPTION_HANDLER(0x17);
|
||||
EXCEPTION_HANDLER(0x18);
|
||||
EXCEPTION_HANDLER(0x19);
|
||||
EXCEPTION_HANDLER(0x1a);
|
||||
EXCEPTION_HANDLER(0x1b);
|
||||
EXCEPTION_HANDLER(0x1c);
|
||||
EXCEPTION_HANDLER(0x1d);
|
||||
EXCEPTION_HANDLER(0x1e);
|
||||
EXCEPTION_HANDLER(0x1f);
|
||||
|
||||
/* IRQ */
|
||||
|
||||
INTERRUPT_HANDLER(0x20)
|
||||
INTERRUPT_HANDLER(0x21)
|
||||
INTERRUPT_HANDLER(0x22)
|
||||
INTERRUPT_HANDLER(0x23)
|
||||
INTERRUPT_HANDLER(0x24)
|
||||
INTERRUPT_HANDLER(0x25)
|
||||
INTERRUPT_HANDLER(0x26)
|
||||
INTERRUPT_HANDLER(0x27)
|
||||
INTERRUPT_HANDLER(0x28)
|
||||
INTERRUPT_HANDLER(0x29)
|
||||
INTERRUPT_HANDLER(0x2a)
|
||||
INTERRUPT_HANDLER(0x2b)
|
||||
INTERRUPT_HANDLER(0x2c)
|
||||
INTERRUPT_HANDLER(0x2d)
|
||||
INTERRUPT_HANDLER(0x2e)
|
||||
INTERRUPT_HANDLER(0x2f)
|
||||
|
||||
/* Reserved by OS */
|
||||
|
||||
INTERRUPT_HANDLER(0x30)
|
||||
INTERRUPT_HANDLER(0x31)
|
||||
INTERRUPT_HANDLER(0x32)
|
||||
INTERRUPT_HANDLER(0x33)
|
||||
INTERRUPT_HANDLER(0x34)
|
||||
INTERRUPT_HANDLER(0x35)
|
||||
INTERRUPT_HANDLER(0x36)
|
||||
INTERRUPT_HANDLER(0x37)
|
||||
INTERRUPT_HANDLER(0x38)
|
||||
INTERRUPT_HANDLER(0x39)
|
||||
INTERRUPT_HANDLER(0x3a)
|
||||
INTERRUPT_HANDLER(0x3b)
|
||||
INTERRUPT_HANDLER(0x3c)
|
||||
INTERRUPT_HANDLER(0x3d)
|
||||
|
||||
/* Free */
|
||||
|
||||
INTERRUPT_HANDLER(0x3e)
|
||||
INTERRUPT_HANDLER(0x3f)
|
||||
INTERRUPT_HANDLER(0x40)
|
||||
INTERRUPT_HANDLER(0x41)
|
||||
INTERRUPT_HANDLER(0x42)
|
||||
INTERRUPT_HANDLER(0x43)
|
||||
INTERRUPT_HANDLER(0x44)
|
||||
INTERRUPT_HANDLER(0x45)
|
||||
INTERRUPT_HANDLER(0x46)
|
||||
INTERRUPT_HANDLER(0x47)
|
||||
INTERRUPT_HANDLER(0x48)
|
||||
INTERRUPT_HANDLER(0x49)
|
||||
INTERRUPT_HANDLER(0x4a)
|
||||
INTERRUPT_HANDLER(0x4b)
|
||||
INTERRUPT_HANDLER(0x4c)
|
||||
INTERRUPT_HANDLER(0x4d)
|
||||
INTERRUPT_HANDLER(0x4e)
|
||||
INTERRUPT_HANDLER(0x4f)
|
||||
INTERRUPT_HANDLER(0x50)
|
||||
INTERRUPT_HANDLER(0x51)
|
||||
INTERRUPT_HANDLER(0x52)
|
||||
INTERRUPT_HANDLER(0x53)
|
||||
INTERRUPT_HANDLER(0x54)
|
||||
INTERRUPT_HANDLER(0x55)
|
||||
INTERRUPT_HANDLER(0x56)
|
||||
INTERRUPT_HANDLER(0x57)
|
||||
INTERRUPT_HANDLER(0x58)
|
||||
INTERRUPT_HANDLER(0x59)
|
||||
INTERRUPT_HANDLER(0x5a)
|
||||
INTERRUPT_HANDLER(0x5b)
|
||||
INTERRUPT_HANDLER(0x5c)
|
||||
INTERRUPT_HANDLER(0x5d)
|
||||
INTERRUPT_HANDLER(0x5e)
|
||||
INTERRUPT_HANDLER(0x5f)
|
||||
INTERRUPT_HANDLER(0x60)
|
||||
INTERRUPT_HANDLER(0x61)
|
||||
INTERRUPT_HANDLER(0x62)
|
||||
INTERRUPT_HANDLER(0x63)
|
||||
INTERRUPT_HANDLER(0x64)
|
||||
INTERRUPT_HANDLER(0x65)
|
||||
INTERRUPT_HANDLER(0x66)
|
||||
INTERRUPT_HANDLER(0x67)
|
||||
INTERRUPT_HANDLER(0x68)
|
||||
INTERRUPT_HANDLER(0x69)
|
||||
INTERRUPT_HANDLER(0x6a)
|
||||
INTERRUPT_HANDLER(0x6b)
|
||||
INTERRUPT_HANDLER(0x6c)
|
||||
INTERRUPT_HANDLER(0x6d)
|
||||
INTERRUPT_HANDLER(0x6e)
|
||||
INTERRUPT_HANDLER(0x6f)
|
||||
INTERRUPT_HANDLER(0x70)
|
||||
INTERRUPT_HANDLER(0x71)
|
||||
INTERRUPT_HANDLER(0x72)
|
||||
INTERRUPT_HANDLER(0x73)
|
||||
INTERRUPT_HANDLER(0x74)
|
||||
INTERRUPT_HANDLER(0x75)
|
||||
INTERRUPT_HANDLER(0x76)
|
||||
INTERRUPT_HANDLER(0x77)
|
||||
INTERRUPT_HANDLER(0x78)
|
||||
INTERRUPT_HANDLER(0x79)
|
||||
INTERRUPT_HANDLER(0x7a)
|
||||
INTERRUPT_HANDLER(0x7b)
|
||||
INTERRUPT_HANDLER(0x7c)
|
||||
INTERRUPT_HANDLER(0x7d)
|
||||
INTERRUPT_HANDLER(0x7e)
|
||||
INTERRUPT_HANDLER(0x7f)
|
||||
INTERRUPT_HANDLER(0x80)
|
||||
INTERRUPT_HANDLER(0x81)
|
||||
INTERRUPT_HANDLER(0x82)
|
||||
INTERRUPT_HANDLER(0x83)
|
||||
INTERRUPT_HANDLER(0x84)
|
||||
INTERRUPT_HANDLER(0x85)
|
||||
INTERRUPT_HANDLER(0x86)
|
||||
INTERRUPT_HANDLER(0x87)
|
||||
INTERRUPT_HANDLER(0x88)
|
||||
INTERRUPT_HANDLER(0x89)
|
||||
INTERRUPT_HANDLER(0x8a)
|
||||
INTERRUPT_HANDLER(0x8b)
|
||||
INTERRUPT_HANDLER(0x8c)
|
||||
INTERRUPT_HANDLER(0x8d)
|
||||
INTERRUPT_HANDLER(0x8e)
|
||||
INTERRUPT_HANDLER(0x8f)
|
||||
INTERRUPT_HANDLER(0x90)
|
||||
INTERRUPT_HANDLER(0x91)
|
||||
INTERRUPT_HANDLER(0x92)
|
||||
INTERRUPT_HANDLER(0x93)
|
||||
INTERRUPT_HANDLER(0x94)
|
||||
INTERRUPT_HANDLER(0x95)
|
||||
INTERRUPT_HANDLER(0x96)
|
||||
INTERRUPT_HANDLER(0x97)
|
||||
INTERRUPT_HANDLER(0x98)
|
||||
INTERRUPT_HANDLER(0x99)
|
||||
INTERRUPT_HANDLER(0x9a)
|
||||
INTERRUPT_HANDLER(0x9b)
|
||||
INTERRUPT_HANDLER(0x9c)
|
||||
INTERRUPT_HANDLER(0x9d)
|
||||
INTERRUPT_HANDLER(0x9e)
|
||||
INTERRUPT_HANDLER(0x9f)
|
||||
INTERRUPT_HANDLER(0xa0)
|
||||
INTERRUPT_HANDLER(0xa1)
|
||||
INTERRUPT_HANDLER(0xa2)
|
||||
INTERRUPT_HANDLER(0xa3)
|
||||
INTERRUPT_HANDLER(0xa4)
|
||||
INTERRUPT_HANDLER(0xa5)
|
||||
INTERRUPT_HANDLER(0xa6)
|
||||
INTERRUPT_HANDLER(0xa7)
|
||||
INTERRUPT_HANDLER(0xa8)
|
||||
INTERRUPT_HANDLER(0xa9)
|
||||
INTERRUPT_HANDLER(0xaa)
|
||||
INTERRUPT_HANDLER(0xab)
|
||||
INTERRUPT_HANDLER(0xac)
|
||||
INTERRUPT_HANDLER(0xad)
|
||||
INTERRUPT_HANDLER(0xae)
|
||||
INTERRUPT_HANDLER(0xaf)
|
||||
INTERRUPT_HANDLER(0xb0)
|
||||
INTERRUPT_HANDLER(0xb1)
|
||||
INTERRUPT_HANDLER(0xb2)
|
||||
INTERRUPT_HANDLER(0xb3)
|
||||
INTERRUPT_HANDLER(0xb4)
|
||||
INTERRUPT_HANDLER(0xb5)
|
||||
INTERRUPT_HANDLER(0xb6)
|
||||
INTERRUPT_HANDLER(0xb7)
|
||||
INTERRUPT_HANDLER(0xb8)
|
||||
INTERRUPT_HANDLER(0xb9)
|
||||
INTERRUPT_HANDLER(0xba)
|
||||
INTERRUPT_HANDLER(0xbb)
|
||||
INTERRUPT_HANDLER(0xbc)
|
||||
INTERRUPT_HANDLER(0xbd)
|
||||
INTERRUPT_HANDLER(0xbe)
|
||||
INTERRUPT_HANDLER(0xbf)
|
||||
INTERRUPT_HANDLER(0xc0)
|
||||
INTERRUPT_HANDLER(0xc1)
|
||||
INTERRUPT_HANDLER(0xc2)
|
||||
INTERRUPT_HANDLER(0xc3)
|
||||
INTERRUPT_HANDLER(0xc4)
|
||||
INTERRUPT_HANDLER(0xc5)
|
||||
INTERRUPT_HANDLER(0xc6)
|
||||
INTERRUPT_HANDLER(0xc7)
|
||||
INTERRUPT_HANDLER(0xc8)
|
||||
INTERRUPT_HANDLER(0xc9)
|
||||
INTERRUPT_HANDLER(0xca)
|
||||
INTERRUPT_HANDLER(0xcb)
|
||||
INTERRUPT_HANDLER(0xcc)
|
||||
INTERRUPT_HANDLER(0xcd)
|
||||
INTERRUPT_HANDLER(0xce)
|
||||
INTERRUPT_HANDLER(0xcf)
|
||||
INTERRUPT_HANDLER(0xd0)
|
||||
INTERRUPT_HANDLER(0xd1)
|
||||
INTERRUPT_HANDLER(0xd2)
|
||||
INTERRUPT_HANDLER(0xd3)
|
||||
INTERRUPT_HANDLER(0xd4)
|
||||
INTERRUPT_HANDLER(0xd5)
|
||||
INTERRUPT_HANDLER(0xd6)
|
||||
INTERRUPT_HANDLER(0xd7)
|
||||
INTERRUPT_HANDLER(0xd8)
|
||||
INTERRUPT_HANDLER(0xd9)
|
||||
INTERRUPT_HANDLER(0xda)
|
||||
INTERRUPT_HANDLER(0xdb)
|
||||
INTERRUPT_HANDLER(0xdc)
|
||||
INTERRUPT_HANDLER(0xdd)
|
||||
INTERRUPT_HANDLER(0xde)
|
||||
INTERRUPT_HANDLER(0xdf)
|
||||
INTERRUPT_HANDLER(0xe0)
|
||||
INTERRUPT_HANDLER(0xe1)
|
||||
INTERRUPT_HANDLER(0xe2)
|
||||
INTERRUPT_HANDLER(0xe3)
|
||||
INTERRUPT_HANDLER(0xe4)
|
||||
INTERRUPT_HANDLER(0xe5)
|
||||
INTERRUPT_HANDLER(0xe6)
|
||||
INTERRUPT_HANDLER(0xe7)
|
||||
INTERRUPT_HANDLER(0xe8)
|
||||
INTERRUPT_HANDLER(0xe9)
|
||||
INTERRUPT_HANDLER(0xea)
|
||||
INTERRUPT_HANDLER(0xeb)
|
||||
INTERRUPT_HANDLER(0xec)
|
||||
INTERRUPT_HANDLER(0xed)
|
||||
INTERRUPT_HANDLER(0xee)
|
||||
INTERRUPT_HANDLER(0xef)
|
||||
INTERRUPT_HANDLER(0xf0)
|
||||
INTERRUPT_HANDLER(0xf1)
|
||||
INTERRUPT_HANDLER(0xf2)
|
||||
INTERRUPT_HANDLER(0xf3)
|
||||
INTERRUPT_HANDLER(0xf4)
|
||||
INTERRUPT_HANDLER(0xf5)
|
||||
INTERRUPT_HANDLER(0xf6)
|
||||
INTERRUPT_HANDLER(0xf7)
|
||||
INTERRUPT_HANDLER(0xf8)
|
||||
INTERRUPT_HANDLER(0xf9)
|
||||
INTERRUPT_HANDLER(0xfa)
|
||||
INTERRUPT_HANDLER(0xfb)
|
||||
INTERRUPT_HANDLER(0xfc)
|
||||
INTERRUPT_HANDLER(0xfd)
|
||||
INTERRUPT_HANDLER(0xfe)
|
||||
INTERRUPT_HANDLER(0xff)
|
||||
|
||||
#pragma endregion Exceptions
|
||||
|
||||
void Init(int Core)
|
||||
{
|
||||
if (Core == 0) /* Remap PIC using BSP */
|
||||
{
|
||||
// PIC
|
||||
outb(0x20, 0x10 | 0x1);
|
||||
outb(0x80, 0);
|
||||
outb(0xA0, 0x10 | 0x10);
|
||||
outb(0x80, 0);
|
||||
|
||||
outb(0x21, 0x20);
|
||||
outb(0x80, 0);
|
||||
outb(0xA1, 0x28);
|
||||
outb(0x80, 0);
|
||||
|
||||
outb(0x21, 0x04);
|
||||
outb(0x80, 0);
|
||||
outb(0xA1, 0x02);
|
||||
outb(0x80, 0);
|
||||
|
||||
outb(0x21, 1);
|
||||
outb(0x80, 0);
|
||||
outb(0xA1, 1);
|
||||
outb(0x80, 0);
|
||||
|
||||
// Masking and disabling PIC
|
||||
// outb(0x21, 0xff);
|
||||
// outb(0x80, 0);
|
||||
// outb(0xA1, 0xff);
|
||||
}
|
||||
|
||||
/* ISR */
|
||||
|
||||
#ifdef DEBUG
|
||||
// if (!DebuggerIsAttached)
|
||||
if (true)
|
||||
{
|
||||
#endif
|
||||
SetEntry(0x0, InterruptHandler_0x0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x1, InterruptHandler_0x1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x2, InterruptHandler_0x2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x3, InterruptHandler_0x3, TRAP_32BIT, RING3, (!DebuggerIsAttached), GDT_KERNEL_CODE); /* Do not handle breakpoints if we are debugging the kernel. */
|
||||
SetEntry(0x4, InterruptHandler_0x4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x5, InterruptHandler_0x5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x6, InterruptHandler_0x6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x7, InterruptHandler_0x7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x8, InterruptHandler_0x8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x9, InterruptHandler_0x9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xa, InterruptHandler_0xa, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xb, InterruptHandler_0xb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xc, InterruptHandler_0xc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xd, InterruptHandler_0xd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xe, InterruptHandler_0xe, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xf, InterruptHandler_0xf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x10, InterruptHandler_0x10, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x11, InterruptHandler_0x11, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x12, InterruptHandler_0x12, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x13, InterruptHandler_0x13, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x14, InterruptHandler_0x14, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x15, InterruptHandler_0x15, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x16, InterruptHandler_0x16, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x17, InterruptHandler_0x17, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x18, InterruptHandler_0x18, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x19, InterruptHandler_0x19, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x1a, InterruptHandler_0x1a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x1b, InterruptHandler_0x1b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x1c, InterruptHandler_0x1c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x1d, InterruptHandler_0x1d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x1e, InterruptHandler_0x1e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x1f, InterruptHandler_0x1f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
#ifdef DEBUG
|
||||
}
|
||||
else
|
||||
KPrint("\eFFA500The debugger is attached, not setting up the ISR.");
|
||||
#endif
|
||||
|
||||
/* IRQ */
|
||||
|
||||
SetEntry(0x20, InterruptHandler_0x20, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x21, InterruptHandler_0x21, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x22, InterruptHandler_0x22, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x23, InterruptHandler_0x23, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x24, InterruptHandler_0x24, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x25, InterruptHandler_0x25, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x26, InterruptHandler_0x26, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x27, InterruptHandler_0x27, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x28, InterruptHandler_0x28, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x29, InterruptHandler_0x29, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x2a, InterruptHandler_0x2a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x2b, InterruptHandler_0x2b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x2c, InterruptHandler_0x2c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x2d, InterruptHandler_0x2d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x2e, InterruptHandler_0x2e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x2f, InterruptHandler_0x2f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
|
||||
/* Reserved by OS */
|
||||
|
||||
SetEntry(0x30, InterruptHandler_0x30, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x31, InterruptHandler_0x31, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x32, InterruptHandler_0x32, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x33, InterruptHandler_0x33, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x34, InterruptHandler_0x34, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x35, InterruptHandler_0x35, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x36, InterruptHandler_0x36, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x37, InterruptHandler_0x37, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x38, InterruptHandler_0x38, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x39, InterruptHandler_0x39, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x3a, InterruptHandler_0x3a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x3b, InterruptHandler_0x3b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x3c, InterruptHandler_0x3c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x3d, InterruptHandler_0x3d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
|
||||
/* Free */
|
||||
|
||||
SetEntry(0x3e, InterruptHandler_0x3e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x3f, InterruptHandler_0x3f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x40, InterruptHandler_0x40, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x41, InterruptHandler_0x41, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x42, InterruptHandler_0x42, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x43, InterruptHandler_0x43, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x44, InterruptHandler_0x44, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x45, InterruptHandler_0x45, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x46, InterruptHandler_0x46, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x47, InterruptHandler_0x47, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x48, InterruptHandler_0x48, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x49, InterruptHandler_0x49, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x4a, InterruptHandler_0x4a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x4b, InterruptHandler_0x4b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x4c, InterruptHandler_0x4c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x4d, InterruptHandler_0x4d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x4e, InterruptHandler_0x4e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x4f, InterruptHandler_0x4f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x50, InterruptHandler_0x50, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x51, InterruptHandler_0x51, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x52, InterruptHandler_0x52, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x53, InterruptHandler_0x53, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x54, InterruptHandler_0x54, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x55, InterruptHandler_0x55, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x56, InterruptHandler_0x56, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x57, InterruptHandler_0x57, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x58, InterruptHandler_0x58, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x59, InterruptHandler_0x59, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x5a, InterruptHandler_0x5a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x5b, InterruptHandler_0x5b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x5c, InterruptHandler_0x5c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x5d, InterruptHandler_0x5d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x5e, InterruptHandler_0x5e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x5f, InterruptHandler_0x5f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x60, InterruptHandler_0x60, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x61, InterruptHandler_0x61, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x62, InterruptHandler_0x62, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x63, InterruptHandler_0x63, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x64, InterruptHandler_0x64, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x65, InterruptHandler_0x65, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x66, InterruptHandler_0x66, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x67, InterruptHandler_0x67, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x68, InterruptHandler_0x68, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x69, InterruptHandler_0x69, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x6a, InterruptHandler_0x6a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x6b, InterruptHandler_0x6b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x6c, InterruptHandler_0x6c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x6d, InterruptHandler_0x6d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x6e, InterruptHandler_0x6e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x6f, InterruptHandler_0x6f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x70, InterruptHandler_0x70, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x71, InterruptHandler_0x71, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x72, InterruptHandler_0x72, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x73, InterruptHandler_0x73, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x74, InterruptHandler_0x74, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x75, InterruptHandler_0x75, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x76, InterruptHandler_0x76, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x77, InterruptHandler_0x77, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x78, InterruptHandler_0x78, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x79, InterruptHandler_0x79, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x7a, InterruptHandler_0x7a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x7b, InterruptHandler_0x7b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x7c, InterruptHandler_0x7c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x7d, InterruptHandler_0x7d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x7e, InterruptHandler_0x7e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x7f, InterruptHandler_0x7f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x80, InterruptHandler_0x80, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x81, InterruptHandler_0x81, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x82, InterruptHandler_0x82, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x83, InterruptHandler_0x83, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x84, InterruptHandler_0x84, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x85, InterruptHandler_0x85, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x86, InterruptHandler_0x86, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x87, InterruptHandler_0x87, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x88, InterruptHandler_0x88, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x89, InterruptHandler_0x89, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x8a, InterruptHandler_0x8a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x8b, InterruptHandler_0x8b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x8c, InterruptHandler_0x8c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x8d, InterruptHandler_0x8d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x8e, InterruptHandler_0x8e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x8f, InterruptHandler_0x8f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x90, InterruptHandler_0x90, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x91, InterruptHandler_0x91, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x92, InterruptHandler_0x92, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x93, InterruptHandler_0x93, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x94, InterruptHandler_0x94, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x95, InterruptHandler_0x95, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x96, InterruptHandler_0x96, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x97, InterruptHandler_0x97, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x98, InterruptHandler_0x98, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x99, InterruptHandler_0x99, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x9a, InterruptHandler_0x9a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x9b, InterruptHandler_0x9b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x9c, InterruptHandler_0x9c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x9d, InterruptHandler_0x9d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x9e, InterruptHandler_0x9e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0x9f, InterruptHandler_0x9f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xa0, InterruptHandler_0xa0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xa1, InterruptHandler_0xa1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xa2, InterruptHandler_0xa2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xa3, InterruptHandler_0xa3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xa4, InterruptHandler_0xa4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xa5, InterruptHandler_0xa5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xa6, InterruptHandler_0xa6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xa7, InterruptHandler_0xa7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xa8, InterruptHandler_0xa8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xa9, InterruptHandler_0xa9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xaa, InterruptHandler_0xaa, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xab, InterruptHandler_0xab, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xac, InterruptHandler_0xac, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xad, InterruptHandler_0xad, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xae, InterruptHandler_0xae, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xaf, InterruptHandler_0xaf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xb0, InterruptHandler_0xb0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xb1, InterruptHandler_0xb1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xb2, InterruptHandler_0xb2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xb3, InterruptHandler_0xb3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xb4, InterruptHandler_0xb4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xb5, InterruptHandler_0xb5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xb6, InterruptHandler_0xb6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xb7, InterruptHandler_0xb7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xb8, InterruptHandler_0xb8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xb9, InterruptHandler_0xb9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xba, InterruptHandler_0xba, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xbb, InterruptHandler_0xbb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xbc, InterruptHandler_0xbc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xbd, InterruptHandler_0xbd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xbe, InterruptHandler_0xbe, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xbf, InterruptHandler_0xbf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xc0, InterruptHandler_0xc0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xc1, InterruptHandler_0xc1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xc2, InterruptHandler_0xc2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xc3, InterruptHandler_0xc3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xc4, InterruptHandler_0xc4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xc5, InterruptHandler_0xc5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xc6, InterruptHandler_0xc6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xc7, InterruptHandler_0xc7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xc8, InterruptHandler_0xc8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xc9, InterruptHandler_0xc9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xca, InterruptHandler_0xca, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xcb, InterruptHandler_0xcb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xcc, InterruptHandler_0xcc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xcd, InterruptHandler_0xcd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xce, InterruptHandler_0xce, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xcf, InterruptHandler_0xcf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xd0, InterruptHandler_0xd0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xd1, InterruptHandler_0xd1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xd2, InterruptHandler_0xd2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xd3, InterruptHandler_0xd3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xd4, InterruptHandler_0xd4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xd5, InterruptHandler_0xd5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xd6, InterruptHandler_0xd6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xd7, InterruptHandler_0xd7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xd8, InterruptHandler_0xd8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xd9, InterruptHandler_0xd9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xda, InterruptHandler_0xda, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xdb, InterruptHandler_0xdb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xdc, InterruptHandler_0xdc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xdd, InterruptHandler_0xdd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xde, InterruptHandler_0xde, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xdf, InterruptHandler_0xdf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xe0, InterruptHandler_0xe0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xe1, InterruptHandler_0xe1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xe2, InterruptHandler_0xe2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xe3, InterruptHandler_0xe3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xe4, InterruptHandler_0xe4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xe5, InterruptHandler_0xe5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xe6, InterruptHandler_0xe6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xe7, InterruptHandler_0xe7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xe8, InterruptHandler_0xe8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xe9, InterruptHandler_0xe9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xea, InterruptHandler_0xea, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xeb, InterruptHandler_0xeb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xec, InterruptHandler_0xec, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xed, InterruptHandler_0xed, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xee, InterruptHandler_0xee, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xef, InterruptHandler_0xef, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xf0, InterruptHandler_0xf0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xf1, InterruptHandler_0xf1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xf2, InterruptHandler_0xf2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xf3, InterruptHandler_0xf3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xf4, InterruptHandler_0xf4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xf5, InterruptHandler_0xf5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xf6, InterruptHandler_0xf6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xf7, InterruptHandler_0xf7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xf8, InterruptHandler_0xf8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xf9, InterruptHandler_0xf9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xfa, InterruptHandler_0xfa, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xfb, InterruptHandler_0xfb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xfc, InterruptHandler_0xfc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xfd, InterruptHandler_0xfd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xfe, InterruptHandler_0xfe, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
SetEntry(0xff, InterruptHandler_0xff, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
|
||||
CPU::x32::lidt(&idtd);
|
||||
}
|
||||
}
|
||||
@ -22,114 +22,175 @@
|
||||
|
||||
namespace GlobalDescriptorTable
|
||||
{
|
||||
/** @brief The GDT Access Table
|
||||
* @details For more information, see https://wiki.osdev.org/Global_Descriptor_Table
|
||||
*/
|
||||
union GlobalDescriptorTableAccess
|
||||
{
|
||||
struct
|
||||
{
|
||||
/** @brief Access bit.
|
||||
* @note The CPU sets this bit to 1 when the segment is accessed.
|
||||
*/
|
||||
uint8_t A : 1;
|
||||
|
||||
/** @brief Readable bit for code segments, writable bit for data segments.
|
||||
* @details For code segments, this bit must be 1 for the segment to be readable.
|
||||
* @details For data segments, this bit must be 1 for the segment to be writable.
|
||||
*/
|
||||
uint8_t RW : 1;
|
||||
|
||||
/** @brief Direction bit for data segments, conforming bit for code segments.
|
||||
* @details For data segments, this bit must be 1 for the segment to grow up (higher addresses).
|
||||
* @details For code segments, this bit must be 1 for code in the segment to be able to be executed from an equal or lower privilege level.
|
||||
*/
|
||||
uint8_t DC : 1;
|
||||
|
||||
/** @brief Executable bit.
|
||||
* @details This bit must be 1 for code-segment descriptors.
|
||||
* @details This bit must be 0 for data-segment and system descriptors.
|
||||
*/
|
||||
uint8_t E : 1;
|
||||
|
||||
/** @brief Descriptor type.
|
||||
* @details This bit must be 0 for system descriptors.
|
||||
* @details This bit must be 1 for code or data segment descriptor.
|
||||
*/
|
||||
uint8_t S : 1;
|
||||
|
||||
/** @brief Descriptor privilege level.
|
||||
* @details This field determines the privilege level of the segment.
|
||||
* @details 0 = kernel mode, 3 = user mode.
|
||||
*/
|
||||
uint8_t DPL : 2;
|
||||
|
||||
/** @brief Present bit.
|
||||
* @details This bit must be 1 for all valid descriptors.
|
||||
*/
|
||||
uint8_t P : 1;
|
||||
} __packed;
|
||||
uint8_t Raw;
|
||||
};
|
||||
|
||||
union GlobalDescriptorTableFlags
|
||||
{
|
||||
// TODO: Add more flags.
|
||||
struct
|
||||
{
|
||||
/** @brief Unknown. */
|
||||
uint8_t Unknown : 5;
|
||||
|
||||
/** @brief Long mode.
|
||||
* @details If the long mode bit is clear, the segment is in 32-bit protected mode.
|
||||
* @details If the long mode bit is set, the segment is in 64-bit long mode.
|
||||
*/
|
||||
uint8_t L : 1;
|
||||
} __packed;
|
||||
uint8_t Raw;
|
||||
};
|
||||
|
||||
typedef struct _TaskStateSegmentEntry
|
||||
struct TaskStateSegmentEntry
|
||||
{
|
||||
/* LOW */
|
||||
uint16_t Length;
|
||||
uint16_t Limit;
|
||||
uint16_t BaseLow;
|
||||
uint8_t BaseMiddle;
|
||||
GlobalDescriptorTableAccess Flags;
|
||||
union GlobalDescriptorTableAccess
|
||||
{
|
||||
struct
|
||||
{
|
||||
/** @brief Access bit.
|
||||
* @note The CPU sets this bit to 1 when the segment is accessed.
|
||||
*/
|
||||
uint8_t A : 1;
|
||||
|
||||
/** @brief Readable bit for code segments, writable bit for data segments.
|
||||
* @details For code segments, this bit must be 1 for the segment to be readable.
|
||||
* @details For data segments, this bit must be 1 for the segment to be writable.
|
||||
*/
|
||||
uint8_t RW : 1;
|
||||
|
||||
/** @brief Direction bit for data segments, conforming bit for code segments.
|
||||
* @details For data segments, this bit must be 1 for the segment to grow up (higher addresses).
|
||||
* @details For code segments, this bit must be 1 for code in the segment to be able to be executed from an equal or lower privilege level.
|
||||
*/
|
||||
uint8_t DC : 1;
|
||||
|
||||
/** @brief Executable bit.
|
||||
* @details This bit must be 1 for code-segment descriptors.
|
||||
* @details This bit must be 0 for data-segment and system descriptors.
|
||||
*/
|
||||
uint8_t E : 1;
|
||||
|
||||
/** @brief Descriptor type.
|
||||
* @details This bit must be 0 for system descriptors.
|
||||
* @details This bit must be 1 for code or data segment descriptor.
|
||||
*/
|
||||
uint8_t S : 1;
|
||||
|
||||
/** @brief Descriptor privilege level.
|
||||
* @details This field determines the privilege level of the segment.
|
||||
* @details 0 = kernel mode, 3 = user mode.
|
||||
*/
|
||||
uint8_t DPL : 2;
|
||||
|
||||
/** @brief Present bit.
|
||||
* @details This bit must be 1 for all valid descriptors.
|
||||
*/
|
||||
uint8_t P : 1;
|
||||
} __packed;
|
||||
uint8_t Raw : 8;
|
||||
} Access;
|
||||
uint8_t Granularity;
|
||||
uint8_t BaseHigh;
|
||||
/* HIGH */
|
||||
uint32_t BaseUpper;
|
||||
uint32_t Reserved;
|
||||
} __packed TaskStateSegmentEntry;
|
||||
} __packed;
|
||||
|
||||
typedef struct _TaskStateSegment
|
||||
struct TaskStateSegment
|
||||
{
|
||||
uint32_t Reserved0 __aligned(16);
|
||||
uint64_t StackPointer[3];
|
||||
uint64_t Reserved1;
|
||||
uint64_t InterruptStackTable[7];
|
||||
uint16_t Reserved2;
|
||||
uint64_t Reserved2;
|
||||
uint16_t Reserved3;
|
||||
uint16_t IOMapBaseAddressOffset;
|
||||
} __packed TaskStateSegment;
|
||||
} __packed;
|
||||
|
||||
typedef struct _GlobalDescriptorTableEntry
|
||||
struct GlobalDescriptorTableEntry
|
||||
{
|
||||
/** @brief Length */
|
||||
uint16_t Length;
|
||||
/** @brief Low Base */
|
||||
uint16_t BaseLow;
|
||||
/** @brief Middle Base */
|
||||
uint8_t BaseMiddle;
|
||||
/** @brief Access */
|
||||
GlobalDescriptorTableAccess Access;
|
||||
/** @brief Flags */
|
||||
GlobalDescriptorTableFlags Flags;
|
||||
/** @brief High Base */
|
||||
uint8_t BaseHigh;
|
||||
} __packed GlobalDescriptorTableEntry;
|
||||
/** @brief Limit 0:15 */
|
||||
uint16_t Limit0 : 16;
|
||||
|
||||
typedef struct _GlobalDescriptorTableEntries
|
||||
/** @brief Low Base 0:15 */
|
||||
uint16_t BaseLow : 16;
|
||||
|
||||
/** @brief Middle Base 16:23 */
|
||||
uint8_t BaseMiddle : 8;
|
||||
|
||||
/** @brief Access */
|
||||
union GlobalDescriptorTableAccess
|
||||
{
|
||||
struct
|
||||
{
|
||||
/** @brief Access bit.
|
||||
* @note The CPU sets this bit to 1 when the segment is accessed.
|
||||
*/
|
||||
uint8_t A : 1;
|
||||
|
||||
/** @brief Readable bit for code segments, writable bit for data segments.
|
||||
* @details For code segments, this bit must be 1 for the segment to be readable.
|
||||
* @details For data segments, this bit must be 1 for the segment to be writable.
|
||||
*/
|
||||
uint8_t RW : 1;
|
||||
|
||||
/** @brief Direction bit for data segments, conforming bit for code segments.
|
||||
* @details For data segments, this bit must be 1 for the segment to grow up (higher addresses).
|
||||
* @details For code segments, this bit must be 1 for code in the segment to be able to be executed from an equal or lower privilege level.
|
||||
*/
|
||||
uint8_t DC : 1;
|
||||
|
||||
/** @brief Executable bit.
|
||||
* @details This bit must be 1 for code-segment descriptors.
|
||||
* @details This bit must be 0 for data-segment and system descriptors.
|
||||
*/
|
||||
uint8_t E : 1;
|
||||
|
||||
/** @brief Descriptor type.
|
||||
* @details This bit must be 0 for system descriptors.
|
||||
* @details This bit must be 1 for code or data segment descriptor.
|
||||
*/
|
||||
uint8_t S : 1;
|
||||
|
||||
/** @brief Descriptor privilege level.
|
||||
* @details This field determines the privilege level of the segment.
|
||||
* @details 0 = kernel mode, 3 = user mode.
|
||||
*/
|
||||
uint8_t DPL : 2;
|
||||
|
||||
/** @brief Present bit.
|
||||
* @details This bit must be 1 for all valid descriptors.
|
||||
*/
|
||||
uint8_t P : 1;
|
||||
} __packed;
|
||||
uint8_t Raw : 8;
|
||||
} Access;
|
||||
|
||||
// /** @brief Limit 16:19 */
|
||||
// uint16_t Limit1 : 4;
|
||||
|
||||
/** @brief Flags */
|
||||
union GlobalDescriptorTableFlags
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint8_t Reserved : 4; /* FIXME: Without this, the kernel crashes. */
|
||||
/** @brief Available bit.
|
||||
* @details This bit is available for use by system software.
|
||||
*/
|
||||
uint8_t AVL : 1;
|
||||
|
||||
/** @brief Long mode.
|
||||
* @details If the long mode bit is clear, the segment is in 32-bit protected mode.
|
||||
* @details If the long mode bit is set, the segment is in 64-bit long mode.
|
||||
*/
|
||||
uint8_t L : 1;
|
||||
|
||||
/** @brief Size flag.
|
||||
* @details If the size bit is clear, the segment is in 16-bit protected mode.
|
||||
* @details If the size bit is set, the segment is in 32-bit protected mode.
|
||||
*/
|
||||
uint8_t DB : 1;
|
||||
|
||||
/** @brief Granularity bit.
|
||||
* @details If the granularity bit is clear, the segment limit is in 1 B blocks.
|
||||
* @details If the granularity bit is set, the segment limit is in 4 KiB blocks.
|
||||
*/
|
||||
uint8_t G : 1;
|
||||
} __packed;
|
||||
uint8_t Raw : 8;
|
||||
} Flags;
|
||||
|
||||
/** @brief High Base 24:31 */
|
||||
uint8_t BaseHigh : 8;
|
||||
} __packed;
|
||||
|
||||
struct GlobalDescriptorTableEntries
|
||||
{
|
||||
GlobalDescriptorTableEntry Null;
|
||||
GlobalDescriptorTableEntry Code;
|
||||
@ -137,20 +198,21 @@ namespace GlobalDescriptorTable
|
||||
GlobalDescriptorTableEntry UserData;
|
||||
GlobalDescriptorTableEntry UserCode;
|
||||
TaskStateSegmentEntry TaskStateSegment;
|
||||
} __packed GlobalDescriptorTableEntries;
|
||||
} __packed;
|
||||
|
||||
typedef struct _GlobalDescriptorTableDescriptor
|
||||
struct GlobalDescriptorTableDescriptor
|
||||
{
|
||||
/** @brief GDT entries length */
|
||||
uint16_t Length;
|
||||
/** @brief GDT entries address */
|
||||
GlobalDescriptorTableEntries *Entries;
|
||||
} __packed GlobalDescriptorTableDescriptor;
|
||||
} __packed;
|
||||
|
||||
extern void *CPUStackPointer[];
|
||||
extern TaskStateSegment tss[];
|
||||
void Init(int Core);
|
||||
void SetKernelStack(void *Stack);
|
||||
void *GetKernelStack();
|
||||
}
|
||||
|
||||
#define GDT_KERNEL_CODE offsetof(GlobalDescriptorTable::GlobalDescriptorTableEntries, Code)
|
||||
|
||||
@ -22,6 +22,48 @@
|
||||
|
||||
namespace InterruptDescriptorTable
|
||||
{
|
||||
typedef enum _InterruptGateType
|
||||
{
|
||||
TASK = 0b101,
|
||||
INT_16BIT = 0b110,
|
||||
TRAP_16BIT = 0b111,
|
||||
INT_32BIT = 0b1110,
|
||||
TRAP_32BIT = 0b1111,
|
||||
} InterruptGateType;
|
||||
|
||||
typedef enum _InterruptRingType
|
||||
{
|
||||
RING0 = 0b0,
|
||||
RING1 = 0b1,
|
||||
RING2 = 0b10,
|
||||
RING3 = 0b11,
|
||||
} InterruptRingType;
|
||||
|
||||
typedef struct _InterruptDescriptorTableEntry
|
||||
{
|
||||
uint32_t LowOffset : 16;
|
||||
uint32_t SegmentSelector : 16;
|
||||
uint32_t Reserved0 : 5;
|
||||
uint32_t Flags : 4;
|
||||
uint32_t Reserved1 : 1;
|
||||
uint32_t Ring : 2;
|
||||
uint32_t Present : 1;
|
||||
uint32_t HighOffset : 16;
|
||||
} __packed InterruptDescriptorTableEntry;
|
||||
|
||||
typedef struct _InterruptDescriptorTableDescriptor
|
||||
{
|
||||
uint16_t Length;
|
||||
InterruptDescriptorTableEntry *Entries;
|
||||
} __packed InterruptDescriptorTableDescriptor;
|
||||
|
||||
void SetEntry(uint8_t Index,
|
||||
void (*Base)(),
|
||||
InterruptGateType Gate,
|
||||
InterruptRingType Ring,
|
||||
bool Present,
|
||||
uint16_t SegmentSelector);
|
||||
|
||||
void Init(int Core);
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user