mirror of
https://github.com/Fennix-Project/Kernel.git
synced 2025-05-25 22:14:37 +00:00
Map the kernel too
This commit is contained in:
Alex
parent
73f38799eb
commit
b6f9a644a7
GPG Key ID:
EACC3AD603BAB4DD
@ -16,10 +16,22 @@ global MB2_start
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extern MB2_start_c
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[bits 32]
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section .bootstrap.data
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global MB2_HeaderMagic
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MB2_HeaderMagic:
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times (0x64) dq 0
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global MB2_HeaderInfo
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MB2_HeaderInfo:
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times (0x64) dq 0
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section .bootstrap.text
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MB2_start:
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cli
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mov word [0xb8F00], 0x072E ; .
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mov [MB2_HeaderMagic], eax
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mov [MB2_HeaderInfo], ebx
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; We need to check if the CPU supports 64-bit mode
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call DetectCPUID
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@ -88,10 +100,11 @@ HigherHalfStart:
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mov word [0xb8F08], 0x072E ; .
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mov rsp, (KernelStack + KERNEL_STACK_SIZE)
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mov rbp, (KernelStack + KERNEL_STACK_SIZE)
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cld
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cli
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push rax ; Multiboot2 Magic
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add rbx, KERNEL_VIRTUAL_BASE
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push rbx ; Multiboot2 Header
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call Multiboot2Entry
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.Loop:
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hlt
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281
Architecture/amd64/Bootstrap/Multiboot2/MB2MemoryMapper.cpp
Normal file
281
Architecture/amd64/Bootstrap/Multiboot2/MB2MemoryMapper.cpp
Normal file
@ -0,0 +1,281 @@
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#include <types.h>
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union __attribute__((packed)) PageTableEntry
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{
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struct
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{
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bool Present : 1; // 0
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bool ReadWrite : 1; // 1
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bool UserSupervisor : 1; // 2
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bool WriteThrough : 1; // 3
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bool CacheDisable : 1; // 4
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bool Accessed : 1; // 5
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bool Dirty : 1; // 6
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bool PageAttributeTable : 1; // 7
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bool Global : 1; // 8
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uint8_t Available0 : 3; // 9-11
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uint64_t Address : 40; // 12-51
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uint32_t Available1 : 7; // 52-58
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uint8_t ProtectionKey : 4; // 59-62
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bool ExecuteDisable : 1; // 63
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};
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uint64_t raw;
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__always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
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{
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_Address &= 0x000000FFFFFFFFFF;
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this->raw &= 0xFFF0000000000FFF;
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this->raw |= (_Address << 12);
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}
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__always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
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};
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struct __attribute__((packed)) PageTableEntryPtr
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{
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PageTableEntry Entries[511];
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};
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union __attribute__((packed)) PageDirectoryEntry
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{
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struct
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{
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bool Present : 1; // 0
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bool ReadWrite : 1; // 1
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bool UserSupervisor : 1; // 2
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bool WriteThrough : 1; // 3
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bool CacheDisable : 1; // 4
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bool Accessed : 1; // 5
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bool Available0 : 1; // 6
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bool PageSize : 1; // 7
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uint8_t Available1 : 4; // 8-11
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uint64_t Address : 40; // 12-51
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uint32_t Available2 : 11; // 52-62
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bool ExecuteDisable : 1; // 63
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};
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uint64_t raw;
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__always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
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{
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_Address &= 0x000000FFFFFFFFFF;
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this->raw &= 0xFFF0000000000FFF;
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this->raw |= (_Address << 12);
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}
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__always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
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};
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struct __attribute__((packed)) PageDirectoryEntryPtr
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{
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PageDirectoryEntry Entries[511];
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};
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union __attribute__((packed)) PageDirectoryPointerTableEntry
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{
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struct
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{
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bool Present : 1; // 0
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bool ReadWrite : 1; // 1
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bool UserSupervisor : 1; // 2
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bool WriteThrough : 1; // 3
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bool CacheDisable : 1; // 4
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bool Accessed : 1; // 5
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bool Available0 : 1; // 6
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bool PageSize : 1; // 7
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uint8_t Available1 : 4; // 8-11
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uint64_t Address : 40; // 12-51
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uint32_t Available2 : 11; // 52-62
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bool ExecuteDisable : 1; // 63
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};
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uint64_t raw;
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__always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
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{
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_Address &= 0x000000FFFFFFFFFF;
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this->raw &= 0xFFF0000000000FFF;
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this->raw |= (_Address << 12);
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}
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__always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
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};
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struct __attribute__((packed)) PageDirectoryPointerTableEntryPtr
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{
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PageDirectoryPointerTableEntry Entries[511];
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};
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union __attribute__((packed)) PageMapLevel4
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{
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struct
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{
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bool Present : 1; // 0
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bool ReadWrite : 1; // 1
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bool UserSupervisor : 1; // 2
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bool WriteThrough : 1; // 3
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bool CacheDisable : 1; // 4
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bool Accessed : 1; // 5
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bool Available0 : 1; // 6
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bool Reserved0 : 1; // 7
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uint8_t Available1 : 4; // 8-11
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uint64_t Address : 40; // 12-51
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uint32_t Available2 : 11; // 52-62
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bool ExecuteDisable : 1; // 63
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};
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uint64_t raw;
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__always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
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{
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_Address &= 0x000000FFFFFFFFFF;
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this->raw &= 0xFFF0000000000FFF;
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this->raw |= (_Address << 12);
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}
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__always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
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};
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struct PageTable4
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{
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PageMapLevel4 Entries[511];
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} __attribute__((aligned(0x1000)));
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extern "C" char BootPageTable[];
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extern uintptr_t _kernel_start, _kernel_end;
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__attribute__((section(".bootstrap.data"))) static PageTable4 *BPTable = (PageTable4 *)BootPageTable;
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__attribute__((section(".bootstrap.data"))) static size_t BPT_Allocated = 0x4000;
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__always_inline inline SafeFunction NIF void *RequestPage()
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{
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void *Page = (void *)(BootPageTable + BPT_Allocated);
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BPT_Allocated += 0x1000;
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if (BPT_Allocated >= 0x10000) /* The length of BootPageTable */
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{
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while (true)
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;
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}
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return Page;
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}
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class PageMapIndexer
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{
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public:
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uintptr_t PMLIndex = 0;
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uintptr_t PDPTEIndex = 0;
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uintptr_t PDEIndex = 0;
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uintptr_t PTEIndex = 0;
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__always_inline inline SafeFunction NIF PageMapIndexer(uintptr_t VirtualAddress)
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{
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uintptr_t Address = VirtualAddress;
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Address >>= 12;
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this->PTEIndex = Address & 0x1FF;
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Address >>= 9;
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this->PDEIndex = Address & 0x1FF;
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Address >>= 9;
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this->PDPTEIndex = Address & 0x1FF;
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Address >>= 9;
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this->PMLIndex = Address & 0x1FF;
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}
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};
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__always_inline inline SafeFunction NIF void Map(void *VirtualAddress, void *PhysicalAddress, uint64_t Flags)
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{
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PageMapIndexer Index = PageMapIndexer((uintptr_t)VirtualAddress);
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// Clear any flags that are not 1 << 0 (Present) - 1 << 5 (Accessed) because rest are for page table entries only
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uint64_t DirectoryFlags = Flags & 0x3F;
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PageMapLevel4 PML4 = BPTable->Entries[Index.PMLIndex];
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PageDirectoryPointerTableEntryPtr *PDPTEPtr = nullptr;
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if (!PML4.Present)
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{
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PDPTEPtr = (PageDirectoryPointerTableEntryPtr *)RequestPage();
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{
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void *ptr = PDPTEPtr;
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int value = 0;
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size_t num = 0x1000;
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uint8_t *p = (uint8_t *)ptr;
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for (size_t i = 0; i < num; i++)
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p[i] = value;
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}
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PML4.Present = true;
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PML4.SetAddress((uintptr_t)PDPTEPtr >> 12);
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}
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else
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PDPTEPtr = (PageDirectoryPointerTableEntryPtr *)((uintptr_t)PML4.GetAddress() << 12);
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PML4.raw |= DirectoryFlags;
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BPTable->Entries[Index.PMLIndex] = PML4;
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PageDirectoryPointerTableEntry PDPTE = PDPTEPtr->Entries[Index.PDPTEIndex];
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PageDirectoryEntryPtr *PDEPtr = nullptr;
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if (!PDPTE.Present)
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{
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PDEPtr = (PageDirectoryEntryPtr *)RequestPage();
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{
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void *ptr = PDEPtr;
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int value = 0;
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size_t num = 0x1000;
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uint8_t *p = (uint8_t *)ptr;
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for (size_t i = 0; i < num; i++)
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p[i] = value;
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}
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PDPTE.Present = true;
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PDPTE.SetAddress((uintptr_t)PDEPtr >> 12);
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}
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else
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PDEPtr = (PageDirectoryEntryPtr *)((uintptr_t)PDPTE.GetAddress() << 12);
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PDPTE.raw |= DirectoryFlags;
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PDPTEPtr->Entries[Index.PDPTEIndex] = PDPTE;
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PageDirectoryEntry PDE = PDEPtr->Entries[Index.PDEIndex];
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PageTableEntryPtr *PTEPtr = nullptr;
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if (!PDE.Present)
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{
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PTEPtr = (PageTableEntryPtr *)RequestPage();
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{
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void *ptr = PTEPtr;
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int value = 0;
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size_t num = 0x1000;
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uint8_t *p = (uint8_t *)ptr;
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for (size_t i = 0; i < num; i++)
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p[i] = value;
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}
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PDE.Present = true;
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PDE.SetAddress((uintptr_t)PTEPtr >> 12);
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}
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else
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PTEPtr = (PageTableEntryPtr *)((uintptr_t)PDE.GetAddress() << 12);
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PDE.raw |= DirectoryFlags;
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PDEPtr->Entries[Index.PDEIndex] = PDE;
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PageTableEntry PTE = PTEPtr->Entries[Index.PTEIndex];
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PTE.Present = true;
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PTE.raw |= Flags;
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PTE.SetAddress((uintptr_t)PhysicalAddress >> 12);
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PTEPtr->Entries[Index.PTEIndex] = PTE;
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asmv("invlpg (%0)"
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:
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: "r"(VirtualAddress)
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: "memory");
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}
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EXTERNC __attribute__((section(".bootstrap.text"))) SafeFunction NIF __attribute__((section(".bootstrap.text"))) void UpdatePageTable64()
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{
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BPTable = (PageTable4 *)BootPageTable;
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// for (size_t i = 0; i < 0x10000000; i += 0x1000)
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// Map((void *)i, (void *)i, 0x3);
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uintptr_t KernelStart = (uintptr_t)&_kernel_start;
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uintptr_t KernelEnd = (uintptr_t)&_kernel_end;
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uintptr_t PhysicalStart = KernelStart - 0xFFFFFFFF80000000;
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for (uintptr_t i = KernelStart; i < KernelEnd; i += 0x1000)
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{
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Map((void *)i, (void *)PhysicalStart, 0x3);
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PhysicalStart += 0x1000;
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}
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asmv("mov %%cr3, %%rax\n"
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"mov %%rax, %%cr3\n"
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:
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:
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: "rax");
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}
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@ -6,8 +6,6 @@
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#include "../../../../kernel.h"
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BootInfo mb2binfo;
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enum VideoType
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{
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VIDEO_TYPE_NONE = 0x00,
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@ -50,9 +48,37 @@ void GetSMBIOS()
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}
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}
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void ProcessMB2(unsigned long Info)
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extern "C" unsigned int MB2_HeaderMagic;
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extern "C" unsigned long MB2_HeaderInfo;
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EXTERNC void Multiboot2Entry()
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{
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uint8_t *VideoBuffer = (uint8_t *)0xB8F00 + 0xC0000000;
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unsigned long Info = MB2_HeaderInfo;
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unsigned int Magic = MB2_HeaderMagic;
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if (Info == NULL || Magic == NULL)
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{
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if (Magic == NULL)
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error("Multiboot magic is NULL");
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if (Info == NULL)
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error("Multiboot info is NULL");
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CPU::Stop();
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}
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else if (Magic != MULTIBOOT2_BOOTLOADER_MAGIC)
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{
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error("Multiboot magic is invalid (%#x != %#x)", Magic, MULTIBOOT2_BOOTLOADER_MAGIC);
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CPU::Stop();
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}
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uint64_t div = 1193180 / 1000;
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outb(0x43, 0xB6);
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outb(0x42, (uint8_t)div);
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outb(0x42, (uint8_t)(div >> 8));
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uint8_t tmp = inb(0x61);
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if (tmp != (tmp | 3))
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outb(0x61, tmp | 3);
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BootInfo mb2binfo;
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uint8_t *VideoBuffer = (uint8_t *)0xB8F00;
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int pos = 0;
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auto InfoAddress = Info;
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for (auto Tag = (struct multiboot_tag *)((uint8_t *)InfoAddress + 8);
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@ -90,7 +116,7 @@ void ProcessMB2(unsigned long Info)
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{
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multiboot_tag_module *module = (multiboot_tag_module *)Tag;
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static int module_count = 0;
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mb2binfo.Modules[module_count++].Address = (void *)module->mod_start;
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mb2binfo.Modules[module_count++].Address = (void *)(uint64_t)module->mod_start;
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mb2binfo.Modules[module_count++].Size = module->size;
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strncpy(mb2binfo.Modules[module_count++].Path, "(null)", 6);
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strncpy(mb2binfo.Modules[module_count++].CommandLine, module->cmdline,
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@ -187,11 +213,12 @@ void ProcessMB2(unsigned long Info)
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{
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case MULTIBOOT_FRAMEBUFFER_TYPE_INDEXED:
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{
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fixme("indexed");
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mb2binfo.Framebuffer[fb_count].Type = Indexed;
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break;
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}
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case MULTIBOOT_FRAMEBUFFER_TYPE_RGB:
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{
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mb2binfo.Framebuffer[fb_count].Type = RGB;
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mb2binfo.Framebuffer[fb_count].RedMaskSize = fb->framebuffer_red_mask_size;
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mb2binfo.Framebuffer[fb_count].RedMaskShift = fb->framebuffer_red_field_position;
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mb2binfo.Framebuffer[fb_count].GreenMaskSize = fb->framebuffer_green_mask_size;
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@ -202,11 +229,11 @@ void ProcessMB2(unsigned long Info)
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}
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case MULTIBOOT_FRAMEBUFFER_TYPE_EGA_TEXT:
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{
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fixme("ega_text");
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mb2binfo.Framebuffer[fb_count].Type = EGA;
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break;
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}
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}
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debug("Framebuffer %d: %dx%d %d bpp", Tag, fb->common.framebuffer_width, fb->common.framebuffer_height, fb->common.framebuffer_bpp);
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debug("Framebuffer %d: %dx%d %d bpp", fb_count, fb->common.framebuffer_width, fb->common.framebuffer_height, fb->common.framebuffer_bpp);
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debug("More info:\nAddress: %p\nPitch: %lld\nMemoryModel: %d\nRedMaskSize: %d\nRedMaskShift: %d\nGreenMaskSize: %d\nGreenMaskShift: %d\nBlueMaskSize: %d\nBlueMaskShift: %d",
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fb->common.framebuffer_addr, fb->common.framebuffer_pitch, fb->common.framebuffer_type,
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fb->framebuffer_red_mask_size, fb->framebuffer_red_field_position, fb->framebuffer_green_mask_size,
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@ -291,8 +318,8 @@ void ProcessMB2(unsigned long Info)
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case MULTIBOOT_TAG_TYPE_LOAD_BASE_ADDR:
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{
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multiboot_tag_load_base_addr *load_base_addr = (multiboot_tag_load_base_addr *)Tag;
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mb2binfo.Kernel.PhysicalBase = (void *)load_base_addr->load_base_addr;
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mb2binfo.Kernel.VirtualBase = (void *)(load_base_addr->load_base_addr + 0xC0000000);
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mb2binfo.Kernel.PhysicalBase = (void *)(uint64_t)load_base_addr->load_base_addr;
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mb2binfo.Kernel.VirtualBase = (void *)(uint64_t)(load_base_addr->load_base_addr + 0xFFFFFFFF80000000);
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debug("Kernel base: %p (physical) %p (virtual)", mb2binfo.Kernel.PhysicalBase, mb2binfo.Kernel.VirtualBase);
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break;
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}
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@ -303,37 +330,9 @@ void ProcessMB2(unsigned long Info)
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}
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}
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}
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}
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EXTERNC void Multiboot2Entry(unsigned long Info, unsigned int Magic)
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{
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if (Info == NULL || Magic == NULL)
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{
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if (Magic == NULL)
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error("Multiboot magic is NULL");
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if (Info == NULL)
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error("Multiboot info is NULL");
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CPU::Stop();
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}
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else if (Magic != MULTIBOOT2_BOOTLOADER_MAGIC)
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{
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error("Multiboot magic is invalid (%#x != %#x)", Magic, MULTIBOOT2_BOOTLOADER_MAGIC);
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CPU::Stop();
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}
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uint64_t div = 1193180 / 1000;
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outb(0x43, 0xB6);
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outb(0x42, (uint8_t)div);
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outb(0x42, (uint8_t)(div >> 8));
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uint8_t tmp = inb(0x61);
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if (tmp != (tmp | 3))
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outb(0x61, tmp | 3);
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ProcessMB2(Info);
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tmp = inb(0x61) & 0xFC;
|
||||
outb(0x61, tmp);
|
||||
|
||||
CPU::Stop();
|
||||
Entry(&mb2binfo);
|
||||
}
|
||||
|
||||
@ -10,76 +10,36 @@ BootPageTable:
|
||||
section .bootstrap.text
|
||||
global UpdatePageTable
|
||||
UpdatePageTable:
|
||||
mov edi, (BootPageTable + 0x0000)
|
||||
mov edi, (BootPageTable + 0x0000) ; First PML4E
|
||||
mov eax, (BootPageTable + 0x1000) ; First PDPTE
|
||||
or eax, 11b ; Bitwise OR on rax (PDPTE) with 11b (Present, Write)
|
||||
mov dword [edi], eax ; Write 11b to PML4E
|
||||
|
||||
mov eax, (BootPageTable + 0x1000)
|
||||
or eax, 0x3
|
||||
mov dword [edi], eax
|
||||
|
||||
mov ecx, PAGE_TABLE_SIZE
|
||||
mov edi, (BootPageTable + 0x1000)
|
||||
mov eax, (BootPageTable + 0x2000)
|
||||
or eax, 0x3
|
||||
mov ebx, 0x0
|
||||
mov edi, (BootPageTable + 0x1000) ; First PDPTE
|
||||
mov eax, (BootPageTable + 0x2000) ; First PDE
|
||||
or eax, 11b ; Bitwise OR on rax (PDE) with 11b (Present, Write)
|
||||
|
||||
mov ecx, PAGE_TABLE_SIZE ; For loop instruction
|
||||
mov ebx, 0x0 ; Value to store in the next 4 bytes
|
||||
.FillPageTableLevel3:
|
||||
mov dword [edi], eax
|
||||
mov dword [edi + 4], ebx
|
||||
add eax, 1 << 12
|
||||
adc ebx, 0
|
||||
add edi, 8
|
||||
loop .FillPageTableLevel3
|
||||
mov dword [edi], eax ; Store modified PDE in PDPTE
|
||||
mov dword [edi + 4], ebx ; Store the rbx value in the next 4 bytes
|
||||
add eax, 0x1000 ; Increment (page size)
|
||||
adc ebx, 0 ; Add 0 to carry flag
|
||||
add edi, 8 ; Add 8 to rdi (next PDE)
|
||||
loop .FillPageTableLevel3 ; Loop until rcx is 0
|
||||
|
||||
mov ecx, (512 * PAGE_TABLE_SIZE)
|
||||
mov edi, (BootPageTable + 0x2000)
|
||||
mov eax, 0x0 | 0x3 | 1 << 7
|
||||
mov ebx, 0x0
|
||||
mov edi, (BootPageTable + 0x2000) ; First PDE
|
||||
mov eax, 11b | 10000000b ; Present, Write, Large Page
|
||||
|
||||
mov ecx, (512 * PAGE_TABLE_SIZE) ; For loop instruction
|
||||
mov ebx, 0x0 ; Value to store in the next 4 bytes
|
||||
.FillPageTableLevel2:
|
||||
mov dword [edi], eax
|
||||
mov dword [edi + 4], ebx
|
||||
add eax, 1 << 21
|
||||
adc ebx, 0
|
||||
add edi, 8
|
||||
loop .FillPageTableLevel2
|
||||
|
||||
ret
|
||||
|
||||
[bits 64]
|
||||
section .bootstrap.text
|
||||
global UpdatePageTable64
|
||||
UpdatePageTable64:
|
||||
mov rdi, (BootPageTable + 0x0000)
|
||||
|
||||
mov rax, (BootPageTable + 0x1000)
|
||||
or rax, 0x3
|
||||
mov [rdi], rax
|
||||
|
||||
mov rcx, PAGE_TABLE_SIZE
|
||||
mov rdi, (BootPageTable + 0x1000)
|
||||
mov rax, (BootPageTable + 0x2000)
|
||||
or rax, 0x3
|
||||
mov rbx, 0x0
|
||||
|
||||
.FillPageTableLevel3:
|
||||
mov [rdi], rax
|
||||
mov [rdi + 4], rbx
|
||||
add rax, 1 << 12
|
||||
adc rbx, 0
|
||||
add rdi, 8
|
||||
loop .FillPageTableLevel3
|
||||
|
||||
mov rcx, (512 * PAGE_TABLE_SIZE)
|
||||
mov rdi, (BootPageTable + 0x2000)
|
||||
mov rax, 0x0 | 0x3 | 1 << 7
|
||||
mov rbx, 0x0
|
||||
|
||||
.FillPageTableLevel2:
|
||||
mov [rdi], rax
|
||||
mov [rdi + 4], rbx
|
||||
add rax, 1 << 21
|
||||
adc rbx, 0
|
||||
add rdi, 8
|
||||
loop .FillPageTableLevel2
|
||||
mov dword [edi], eax ; Store modified PDE in PDPTE
|
||||
mov dword [edi + 4], ebx ; Store the rbx value in the next 4 bytes
|
||||
add eax, 1 << 21 ; Increment (page size)
|
||||
adc ebx, 0 ; Add 0 (carry flag) to rbx to increment if there was a carry
|
||||
add edi, 8 ; Add 8 to rdi (next PDE)
|
||||
loop .FillPageTableLevel2 ; Loop until rcx is 0
|
||||
|
||||
ret
|
||||
|
||||
@ -71,8 +71,8 @@ NIF void MapFromZero(PageTable4 *PT, BootInfo *Info)
|
||||
for (size_t t = 0; t < MemSize; t += PAGE_SIZE)
|
||||
{
|
||||
va.Map((void *)t, (void *)t, PTFlag::RW /* | PTFlag::US */);
|
||||
va.Map((void *)VirtualOffsetNormalVMA, (void *)t, PTFlag::RW /* | PTFlag::US */);
|
||||
VirtualOffsetNormalVMA += PAGE_SIZE;
|
||||
// va.Map((void *)VirtualOffsetNormalVMA, (void *)t, PTFlag::RW /* | PTFlag::US */);
|
||||
// VirtualOffsetNormalVMA += PAGE_SIZE;
|
||||
}
|
||||
}
|
||||
else
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
|
||||
enum MemoryType
|
||||
{
|
||||
Unknown,
|
||||
Unknown_Memory_Type,
|
||||
Usable,
|
||||
Reserved,
|
||||
ACPIReclaimable,
|
||||
@ -11,7 +11,16 @@ enum MemoryType
|
||||
BadMemory,
|
||||
BootloaderReclaimable,
|
||||
KernelAndModules,
|
||||
Framebuffer
|
||||
Framebuffer,
|
||||
Unknown
|
||||
};
|
||||
|
||||
enum FramebufferType
|
||||
{
|
||||
Unknown_Framebuffer_Type,
|
||||
Indexed,
|
||||
RGB,
|
||||
EGA
|
||||
};
|
||||
|
||||
#define MAX_FRAMEBUFFERS 16
|
||||
@ -22,6 +31,7 @@ struct BootInfo
|
||||
{
|
||||
struct FramebufferInfo
|
||||
{
|
||||
enum FramebufferType Type;
|
||||
void *BaseAddress;
|
||||
__UINT64_TYPE__ Width;
|
||||
__UINT64_TYPE__ Height;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user