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Reformat comments in interrupts.hpp
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@ -28,57 +28,57 @@ namespace CPU
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{
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/* ISR */
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ISR0 = 0x0, // Divide-by-zero Error
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ISR1 = 0x1, // Debug
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ISR2 = 0x2, // Non-maskable Interrupt
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ISR3 = 0x3, // Breakpoint
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ISR4 = 0x4, // Overflow
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ISR5 = 0x5, // Bound Range Exceeded
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ISR6 = 0x6, // Invalid Opcode
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ISR7 = 0x7, // Device Not Available
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ISR8 = 0x8, // Double Fault
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ISR9 = 0x9, // Coprocessor Segment Overrun
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ISR10 = 0xa, // Invalid TSS
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ISR11 = 0xb, // Segment Not P
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ISR12 = 0xc, // Stack-Segment Fault
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ISR13 = 0xd, // General Protection Fault
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ISR14 = 0xe, // Page Fault
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ISR15 = 0xf, // Reserved
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ISR16 = 0x10, // x87 Floating-Point Exception
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ISR17 = 0x11, // Alignment Check
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ISR18 = 0x12, // Machine Check
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ISR19 = 0x13, // SIMD Floating-Point Exception
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ISR20 = 0x14, // Virtualization Exception
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ISR21 = 0x15, // Reserved
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ISR22 = 0x16, // Reserved
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ISR23 = 0x17, // Reserved
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ISR24 = 0x18, // Reserved
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ISR25 = 0x19, // Reserved
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ISR26 = 0x1a, // Reserved
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ISR27 = 0x1b, // Reserved
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ISR28 = 0x1c, // Reserved
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ISR29 = 0x1d, // Reserved
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ISR30 = 0x1e, // Security Exception
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ISR31 = 0x1f, // Reserved
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ISR0 = 0x0, /* Divide-by-zero Error */
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ISR1 = 0x1, /* Debug */
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ISR2 = 0x2, /* Non-maskable Interrupt */
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ISR3 = 0x3, /* Breakpoint */
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ISR4 = 0x4, /* Overflow */
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ISR5 = 0x5, /* Bound Range Exceeded */
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ISR6 = 0x6, /* Invalid Opcode */
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ISR7 = 0x7, /* Device Not Available */
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ISR8 = 0x8, /* Double Fault */
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ISR9 = 0x9, /* Coprocessor Segment Overrun */
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ISR10 = 0xa, /* Invalid TSS */
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ISR11 = 0xb, /* Segment Not P */
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ISR12 = 0xc, /* Stack-Segment Fault */
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ISR13 = 0xd, /* General Protection Fault */
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ISR14 = 0xe, /* Page Fault */
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ISR15 = 0xf, /* Reserved */
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ISR16 = 0x10, /* x87 Floating-Point Exception */
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ISR17 = 0x11, /* Alignment Check */
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ISR18 = 0x12, /* Machine Check */
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ISR19 = 0x13, /* SIMD Floating-Point Exception */
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ISR20 = 0x14, /* Virtualization Exception */
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ISR21 = 0x15, /* Reserved */
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ISR22 = 0x16, /* Reserved */
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ISR23 = 0x17, /* Reserved */
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ISR24 = 0x18, /* Reserved */
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ISR25 = 0x19, /* Reserved */
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ISR26 = 0x1a, /* Reserved */
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ISR27 = 0x1b, /* Reserved */
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ISR28 = 0x1c, /* Reserved */
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ISR29 = 0x1d, /* Reserved */
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ISR30 = 0x1e, /* Security Exception */
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ISR31 = 0x1f, /* Reserved */
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/* IRQ */
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IRQ0 = 0x20, // Programmable Interrupt Timer Interrupt
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IRQ1 = 0x21, // Keyboard Interrupt
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IRQ2 = 0x22, // Cascade (used internally by the two PICs. never raised)
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IRQ3 = 0x23, // COM2 (if enabled)
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IRQ4 = 0x24, // COM1 (if enabled)
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IRQ5 = 0x25, // LPT2 (if enabled)
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IRQ6 = 0x26, // Floppy Disk
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IRQ7 = 0x27, // LPT1 / Unreliable "spurious" interrupt (usually)
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IRQ8 = 0x28, // CMOS real-time clock (if enabled)
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IRQ9 = 0x29, // Free for peripherals / legacy SCSI / NIC
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IRQ10 = 0x2a, // Free for peripherals / SCSI / NIC
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IRQ11 = 0x2b, // Free for peripherals / SCSI / NIC
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IRQ12 = 0x2c, // PS2 Mouse
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IRQ13 = 0x2d, // FPU / Coprocessor / Inter-processor
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IRQ14 = 0x2e, // Primary ATA Hard Disk
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IRQ15 = 0x2f, // Secondary ATA Hard Disk
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IRQ0 = 0x20, /* Programmable Interrupt Timer Interrupt */
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IRQ1 = 0x21, /* Keyboard Interrupt */
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IRQ2 = 0x22, /* Cascade (used internally by the two PICs. never raised) */
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IRQ3 = 0x23, /* COM2/COM4 (if enabled) */
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IRQ4 = 0x24, /* COM1/COM3 (if enabled) */
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IRQ5 = 0x25, /* LPT2 (if enabled) */
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IRQ6 = 0x26, /* Floppy Disk */
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IRQ7 = 0x27, /* LPT1 / Unreliable "spurious" interrupt (usually) */
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IRQ8 = 0x28, /* CMOS real-time clock (if enabled) */
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IRQ9 = 0x29, /* Free for peripherals / legacy SCSI / NIC */
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IRQ10 = 0x2a, /* Free for peripherals / SCSI / NIC */
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IRQ11 = 0x2b, /* Free for peripherals / SCSI / NIC */
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IRQ12 = 0x2c, /* PS2 Mouse */
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IRQ13 = 0x2d, /* FPU / Coprocessor / Inter-processor */
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IRQ14 = 0x2e, /* Primary ATA Hard Disk */
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IRQ15 = 0x2f, /* Secondary ATA Hard Disk */
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/* Reserved by OS */
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