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fixme
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f767d950c4
commit
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@ -284,7 +284,7 @@ namespace InterruptDescriptorTable
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INTERRUPT_HANDLER(0x3a)
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INTERRUPT_HANDLER(0x3b)
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INTERRUPT_HANDLER(0x3c)
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EXCEPTION_HANDLER(0x3d)
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INTERRUPT_HANDLER(0x3d)
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/* Free */
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@ -724,19 +724,33 @@ namespace CrashHandler
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SafeFunction void StopAllCores()
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{
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#if defined(__amd64__) || defined(__i386__)
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if (SMP::CPUCores > 1)
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{
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CPU::Interrupts(CPU::Enable);
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for (int i = 1; i < SMP::CPUCores; i++)
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{
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APIC::InterruptCommandRegisterLow icr;
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icr.Vector = CPU::x86::IRQ29;
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icr.Level = APIC::APICLevel::Assert;
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((APIC::APIC *)Interrupts::apic[0])->IPI(i, icr);
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__sync;
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}
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CPU::Interrupts(CPU::Disable);
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}
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/* FIXME: Can't send IPIs to other cores
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* because it causes another exception on
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* the other cores.
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*
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* Also it makes every core to stay at 100% usage for some reason.
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*/
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// if (SMP::CPUCores > 1)
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// {
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// for (int i = 1; i < SMP::CPUCores; i++)
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// {
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// APIC::InterruptCommandRegisterLow icr;
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// icr.Vector = CPU::x86::IRQ29;
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// icr.Level = APIC::APICLevel::Assert;
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// ((APIC::APIC *)Interrupts::apic[i])->IPI(i, icr);
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// __sync;
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// }
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// }
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// APIC::InterruptCommandRegisterLow icr;
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// icr.Vector = CPU::x86::IRQ29;
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// icr.Level = APIC::APICLevel::Assert;
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// icr.DestinationShorthand = APIC::APICDestinationShorthand::AllExcludingSelf;
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// ((APIC::APIC *)Interrupts::apic[0])->IPI(0, icr);
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// CPU::Interrupts(CPU::Enable);
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__sync;
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CPU::Interrupts(CPU::Disable);
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// }
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#elif defined(__aarch64__)
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#endif
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}
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@ -748,9 +762,6 @@ namespace CrashHandler
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SBIdx = 255;
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CHArchTrapFrame *Frame = (CHArchTrapFrame *)Data;
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#if defined(__amd64__)
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if (Frame->InterruptNumber == CPU::x86::IRQ29)
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CPU::Stop();
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error("An exception occurred!");
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error("Exception: %#llx", Frame->InterruptNumber);
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for (size_t i = 0; i < INT_FRAMES_MAX; i++)
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@ -107,7 +107,7 @@ namespace Interrupts
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SafeFunction void RemoveAll()
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{
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for (int i = 0; i < CPU::x86::IRQ223; i++)
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RegisteredEvents->DeleteNode(i);
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RegisteredEvents->DeleteNode(i);
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}
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extern "C" SafeFunction void MainInterruptHandler(void *Data)
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@ -117,7 +117,7 @@ namespace Interrupts
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memmove(InterruptFrames + 1, InterruptFrames, sizeof(InterruptFrames) - sizeof(InterruptFrames[0]));
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InterruptFrames[0] = (void *)Frame->rip;
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CPUData *CoreData = GetCurrentCPU();
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int Core = 0;
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if (likely(CoreData != nullptr))
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@ -126,6 +126,9 @@ namespace Interrupts
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// If this is false, we have a big problem.
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if (likely(Frame->InterruptNumber < CPU::x86::IRQ223 && Frame->InterruptNumber > CPU::x86::ISR0))
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{
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if (Frame->InterruptNumber == CPU::x86::IRQ29) // Halt core interrupt
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CPU::Stop();
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Handler *handler = (Handler *)RegisteredEvents->Get(Frame->InterruptNumber);
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if (likely(handler != (Handler *)HASHMAP_ERROR))
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handler->OnInterruptReceived(Frame);
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@ -42,7 +42,6 @@ namespace Time
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Clock ConvertFromUnix(int Timestamp)
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{
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Clock result;
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if (Timestamp == 0)
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return result;
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