mirror of
https://github.com/EnderIce2/Fennix.git
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215 lines
6.5 KiB
C++
215 lines
6.5 KiB
C++
#include <ints.hpp>
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#include <syscalls.hpp>
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#include <vector.hpp>
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#include <smp.hpp>
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#include <io.h>
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#if defined(a64)
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#include "../Architecture/amd64/cpu/gdt.hpp"
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#include "../Architecture/amd64/cpu/idt.hpp"
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#include "../Architecture/amd64/acpi.hpp"
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#include "../Architecture/amd64/cpu/apic.hpp"
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#elif defined(a32)
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#include "../Architecture/i686/cpu/gdt.hpp"
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#include "../Architecture/i686/cpu/idt.hpp"
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#elif defined(aa64)
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#endif
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#include "crashhandler.hpp"
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#include "../kernel.h"
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extern "C" SafeFunction void ExceptionHandler(void *Data) { CrashHandler::Handle(Data); }
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namespace Interrupts
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{
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struct Event
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{
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int ID;
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void *Data;
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};
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Vector<Event> RegisteredEvents;
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#if defined(a64)
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/* APIC::APIC */ void *apic[MAX_CPU];
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/* APIC::Timer */ void *apicTimer[MAX_CPU];
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#elif defined(a32)
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/* APIC::APIC */ void *apic[MAX_CPU];
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#elif defined(aa64)
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#endif
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void *InterruptFrames[INT_FRAMES_MAX];
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void Initialize(int Core)
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{
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#if defined(a64)
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GlobalDescriptorTable::Init(Core);
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InterruptDescriptorTable::Init(Core);
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CPUData *CoreData = GetCPU(Core);
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CoreData->Checksum = CPU_DATA_CHECKSUM;
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CPU::x64::wrmsr(CPU::x64::MSR_GS_BASE, (uint64_t)CoreData);
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CPU::x64::wrmsr(CPU::x64::MSR_SHADOW_GS_BASE, (uint64_t)CoreData);
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CoreData->ID = Core;
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CoreData->IsActive = true;
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CoreData->SystemCallStack = (uint8_t *)((uintptr_t)KernelAllocator.RequestPages(TO_PAGES(STACK_SIZE)) + STACK_SIZE);
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CoreData->Stack = (uintptr_t)KernelAllocator.RequestPages(TO_PAGES(STACK_SIZE)) + STACK_SIZE;
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if (CoreData->Checksum != CPU_DATA_CHECKSUM)
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{
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KPrint("CPU %d checksum mismatch! %x != %x", Core, CoreData->Checksum, CPU_DATA_CHECKSUM);
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CPU::Stop();
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}
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debug("Stack for core %d is %#lx (Address: %#lx)", Core, CoreData->Stack, CoreData->Stack - STACK_SIZE);
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asmv("movq %0, %%rsp" ::"r"(CoreData->Stack));
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InitializeSystemCalls();
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#elif defined(a32)
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warn("i386 is not supported yet");
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#elif defined(aa64)
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warn("aarch64 is not supported yet");
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#endif
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}
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void Enable(int Core)
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{
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#if defined(a64)
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if (((ACPI::MADT *)PowerManager->GetMADT())->LAPICAddress != nullptr)
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{
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// TODO: This function is called by SMP too. Do not initialize timers that doesn't support multiple cores.
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apic[Core] = new APIC::APIC(Core);
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if (Core == Config.IOAPICInterruptCore) // Redirect IRQs to the specified core.
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((APIC::APIC *)apic[Core])->RedirectIRQs(Core);
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}
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else
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{
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error("LAPIC not found");
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// TODO: PIC
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}
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#elif defined(a32)
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warn("i386 is not supported yet");
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#elif defined(aa64)
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warn("aarch64 is not supported yet");
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#endif
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}
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void InitializeTimer(int Core)
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{
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// TODO: This function is called by SMP too. Do not initialize timers that doesn't support multiple cores.
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#if defined(a64)
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if (apic[Core] != nullptr)
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apicTimer[Core] = new APIC::Timer((APIC::APIC *)apic[Core]);
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else
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{
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fixme("apic not found");
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}
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#elif defined(a32)
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warn("i386 is not supported yet");
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#elif defined(aa64)
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warn("aarch64 is not supported yet");
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#endif
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}
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SafeFunction void RemoveAll()
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{
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RegisteredEvents.clear();
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}
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extern "C" SafeFunction void MainInterruptHandler(void *Data)
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{
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#if defined(a64)
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CPU::x64::TrapFrame *Frame = (CPU::x64::TrapFrame *)Data;
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memmove(InterruptFrames + 1, InterruptFrames, sizeof(InterruptFrames) - sizeof(InterruptFrames[0]));
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InterruptFrames[0] = (void *)Frame->rip;
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CPUData *CoreData = GetCurrentCPU();
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int Core = 0;
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if (likely(CoreData != nullptr))
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Core = CoreData->ID;
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/* If this is false, we have a big problem. */
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if (likely(Frame->InterruptNumber < CPU::x86::IRQ223 && Frame->InterruptNumber > CPU::x86::ISR0))
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{
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/* Halt core interrupt */
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if (unlikely(Frame->InterruptNumber == CPU::x86::IRQ29))
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CPU::Stop();
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bool InterruptHandled = false;
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foreach (auto ev in RegisteredEvents)
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{
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if (ev.ID == static_cast<int>(Frame->InterruptNumber))
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{
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((Handler *)ev.Data)->OnInterruptReceived(Frame);
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InterruptHandled = true;
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}
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}
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if (!InterruptHandled)
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{
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error("IRQ%ld is unhandled on CPU %d.", Frame->InterruptNumber - 32, Core);
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if (Frame->InterruptNumber == CPU::x86::IRQ1)
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{
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uint8_t scancode = inb(0x60);
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warn("IRQ1 is the keyboard interrupt. Scancode: %#x", scancode);
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}
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}
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if (likely(apic[Core]))
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{
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((APIC::APIC *)Interrupts::apic[Core])->EOI();
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// TODO: Handle PIC too
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return;
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}
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// TODO: PIC
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}
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#elif defined(a32)
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void *Frame = Data;
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#elif defined(aa64)
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void *Frame = Data;
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#endif
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error("HALT HALT HALT HALT HALT HALT HALT HALT HALT");
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CPU::Stop();
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}
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Handler::Handler(int InterruptNumber)
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{
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foreach (auto ev in RegisteredEvents)
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{
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if (ev.ID == InterruptNumber)
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{
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warn("IRQ%d is already registered.", InterruptNumber - 32);
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}
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}
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debug("Registering interrupt handler for IRQ%d.", InterruptNumber - 32);
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this->InterruptNumber = InterruptNumber;
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RegisteredEvents.push_back({InterruptNumber, this});
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}
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Handler::~Handler()
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{
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debug("Unregistering interrupt handler for IRQ%d.", InterruptNumber - 32);
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for (size_t i = 0; i < RegisteredEvents.size(); i++)
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{
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if (RegisteredEvents[i].ID == InterruptNumber)
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{
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RegisteredEvents.remove(i);
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return;
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}
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}
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warn("Event %d not found.", InterruptNumber);
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}
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#if defined(a64)
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void Handler::OnInterruptReceived(CPU::x64::TrapFrame *Frame)
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{
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trace("Unhandled interrupt IRQ%d", Frame->InterruptNumber - 32);
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#elif defined(a32)
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void Handler::OnInterruptReceived(CPU::x32::TrapFrame *Frame)
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{
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trace("Unhandled interrupt received");
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#elif defined(aa64)
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void Handler::OnInterruptReceived(void *Frame)
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{
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trace("Unhandled interrupt received");
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#endif
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}
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}
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