mirror of
https://github.com/EnderIce2/Fennix.git
synced 2025-05-28 15:34:31 +00:00
295 lines
6.1 KiB
C++
295 lines
6.1 KiB
C++
/*
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This file is part of Fennix Kernel.
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Fennix Kernel is free software: you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation, either version 3 of
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the License, or (at your option) any later version.
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Fennix Kernel is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include <driver.hpp>
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#include <cpu.hpp>
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#include <pci.hpp>
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#include <net/net.hpp>
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#include <io.h>
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#include "rtl8139.hpp"
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extern Driver::Manager *DriverManager;
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extern PCI::Manager *PCIManager;
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namespace Driver::RTL8139
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{
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dev_t DriverID;
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class RTL8139Device
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{
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private:
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PCI::PCIHeader0 *Header;
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bool Initialized = false;
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struct BARData
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{
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uint8_t Type;
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uint16_t IOBase;
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uint64_t MemoryBase;
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} BAR;
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const int BaseBufferSize = 8192;
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const int WRAPBytes = 1500;
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const int AdditionalBytes = 16;
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const int BufferSize = BaseBufferSize +
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WRAPBytes +
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AdditionalBytes;
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uint8_t *RXBuffer = nullptr;
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int TXCurrent = 0;
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uint16_t CurrentPacket = 0;
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uint8_t TSAD[4] = {0x20, 0x24, 0x28, 0x2C};
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uint8_t TSD[4] = {0x10, 0x14, 0x18, 0x1C};
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public:
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dev_t ID;
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bool IsInitialized() { return Initialized; }
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size_t write(uint8_t *Buffer, size_t Size)
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{
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outl(TSAD[TXCurrent], (uint32_t)(reinterpret_cast<uint64_t>(Buffer)));
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outl(TSD[TXCurrent++], (uint32_t)Size);
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if (TXCurrent > 3)
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TXCurrent = 0;
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return Size;
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}
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MediaAccessControl GetMAC()
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{
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return MediaAccessControl();
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}
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int ioctl(NetIoctl req, void *)
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{
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switch (req)
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{
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case IOCTL_NET_GET_MAC:
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{
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return -ENOSYS;
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}
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default:
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return -EINVAL;
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}
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return 0;
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}
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void OnInterruptReceived(CPU::TrapFrame *)
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{
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/* Acknowledge interrupt */
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uint16_t status = inw(RegISR);
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debug("%#lx", status);
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/* Read status */
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if (status & RecOK)
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{
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/* Get the current packet */
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uint16_t *data = (uint16_t *)(RXBuffer + CurrentPacket);
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uint16_t dataSz = *(data + 1);
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data += 2;
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// ReportNetworkPacket(ID, data, dataSz);
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/* FIXME: Implement */
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fixme("Received packet");
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(void)data;
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(void)dataSz;
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/* Update CAPR */
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#define RX_READ_PTR_MASK (~0x3)
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CurrentPacket = (uint16_t)((CurrentPacket + dataSz + 4 + 3) & RX_READ_PTR_MASK);
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if (CurrentPacket > BufferSize)
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CurrentPacket -= uint16_t(BufferSize);
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outw(RegCAPR, CurrentPacket - 0x10);
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}
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/* Clear interrupt */
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outw(RegISR, (RecOK | RecBad | SendOK | SendBad));
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}
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void Panic()
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{
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}
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RTL8139Device(PCI::PCIHeader0 *_Header)
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: Header(_Header)
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{
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uint32_t PCIBAR0 = Header->BAR0;
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uint32_t PCIBAR1 = Header->BAR1;
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BAR.Type = PCIBAR0 & 1;
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BAR.IOBase = (uint16_t)(PCIBAR0 & (~3));
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BAR.MemoryBase = PCIBAR1 & (~15);
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RXBuffer = (uint8_t *)v0::AllocateMemory(DriverID, TO_PAGES(BufferSize));
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/* Power on */
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outb(RegCONFIG1, 0x0);
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/* Software Reset */
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outb(RegCMD, 0x10);
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while (inb(RegCMD) & 0x10)
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v0::Yield(DriverID);
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/* Initialize receive buffer */
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outl(RegRBSTART, (uint32_t)(reinterpret_cast<uintptr_t>(RXBuffer)));
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/* Configure interrupt mask register */
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outw(RegIMR, (RecOK | RecBad | SendOK | SendBad));
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outl(regRCR, (RcAB | RcAM | RcAPM | RcAAP) | RcWRAP);
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/* Enable receive and transmit */
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outb(RegCMD, 0xC); /* 0xC = RE and TE bit */
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uint32_t MAC1 = inl(RegMAC);
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uint16_t MAC2 = inw(RegMAR);
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MediaAccessControl mac = {
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mac.Address[0] = (uint8_t)MAC1,
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mac.Address[1] = (uint8_t)(MAC1 >> 8),
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mac.Address[2] = (uint8_t)(MAC1 >> 16),
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mac.Address[3] = (uint8_t)(MAC1 >> 24),
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mac.Address[4] = (uint8_t)MAC2,
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mac.Address[5] = (uint8_t)(MAC2 >> 8)};
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Initialized = true;
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}
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~RTL8139Device()
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{
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if (!Initialized)
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return;
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((PCI::PCIDeviceHeader *)Header)->Command |= PCI::PCI_COMMAND_INTX_DISABLE;
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/* FIXME: Shutdown code */
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}
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};
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std::unordered_map<dev_t, RTL8139Device *> Drivers;
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int Open(struct Inode *, int, mode_t)
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{
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return 0;
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}
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int Close(struct Inode *)
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{
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return 0;
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}
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ssize_t Read(struct Inode *, void *, size_t, off_t)
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{
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return 0;
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}
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ssize_t Write(struct Inode *Node, const void *Buffer, size_t Size, off_t)
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{
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return Drivers[Node->GetMinor()]->write((uint8_t *)Buffer, Size);
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}
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int Ioctl(struct Inode *Node, unsigned long Request, void *Argp)
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{
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return Drivers[Node->GetMinor()]->ioctl((NetIoctl)Request, Argp);
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}
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const struct InodeOperations ops = {
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.Lookup = nullptr,
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.Create = nullptr,
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.Remove = nullptr,
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.Rename = nullptr,
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.Read = Read,
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.Write = Write,
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.Truncate = nullptr,
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.Open = Open,
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.Close = Close,
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.Ioctl = Ioctl,
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.ReadDir = nullptr,
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.MkDir = nullptr,
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.RmDir = nullptr,
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.SymLink = nullptr,
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.ReadLink = nullptr,
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.Seek = nullptr,
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.Stat = nullptr,
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};
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std::list<PCI::PCIDevice> Devices;
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int Entry()
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{
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for (auto &&dev : Devices)
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{
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PCIManager->InitializeDevice(dev, KernelPageTable);
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RTL8139Device *rtl8139 = new RTL8139Device((PCI::PCIHeader0 *)dev.Header);
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if (rtl8139->IsInitialized())
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{
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dev_t ret = v0::RegisterDevice(DriverID, NETWORK_TYPE_ETHERNET, &ops);
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Drivers[ret] = rtl8139;
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}
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}
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if (Drivers.empty())
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{
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trace("No valid RTL8139 device found.");
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return -EINVAL;
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}
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return 0;
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}
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int Final()
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{
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for (auto &&dev : Drivers)
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{
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dev_t ret = dev.first;
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v0::UnregisterDevice(DriverID, ret);
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delete dev.second;
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}
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return 0;
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}
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int Panic()
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{
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for (auto &&i : Drivers)
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i.second->Panic();
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return 0;
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}
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int Probe()
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{
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Devices = PCIManager->FindPCIDevice(
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{
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0x10EC, /* Realtek */
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},
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{
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0x8139, /* RTL8139 */
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});
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if (Devices.empty())
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{
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trace("No RTL8139 device found.");
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return -ENODEV;
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}
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return 0;
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}
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REGISTER_BUILTIN_DRIVER(rtl8139,
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"Realtek RTL8139 Network Driver",
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"enderice2",
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1, 0, 0,
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Entry,
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Final,
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Panic,
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Probe);
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}
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