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kernel: add arm architecture support
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Signed-off-by: EnderIce2 <enderice2@protonmail.com>
This commit is contained in:
97
Kernel/arch/arm/madt.cpp
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97
Kernel/arch/arm/madt.cpp
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/*
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This file is part of Fennix Kernel.
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Fennix Kernel is free software: you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation, either version 3 of
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the License, or (at your option) any later version.
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Fennix Kernel is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "acpi.hpp"
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#include <memory.hpp>
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#include <debug.h>
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#include "../../kernel.h"
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namespace ACPI
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{
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MADT::MADT(ACPI::MADTHeader *madt)
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{
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trace("Initializing MADT");
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if (!madt)
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{
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error("MADT is NULL");
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return;
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}
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CPUCores = 0;
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LAPICAddress = (LAPIC *)(uintptr_t)madt->LocalControllerAddress;
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for (uint8_t *ptr = (uint8_t *)(madt->Entries);
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(uintptr_t)(ptr) < (uintptr_t)(madt) + madt->Header.Length;
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ptr += *(ptr + 1))
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{
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switch (*(ptr))
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{
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case 0:
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{
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if (ptr[4] & 1)
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{
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lapic.push_back((LocalAPIC *)ptr);
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KPrint("Local APIC %d (APIC %d) found.", lapic.back()->ACPIProcessorId, lapic.back()->APICId);
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CPUCores++;
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}
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break;
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}
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case 1:
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{
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ioapic.push_back((MADTIOApic *)ptr);
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KPrint("I/O APIC %d (Address %#lx) found.", ioapic.back()->APICID, ioapic.back()->Address);
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Memory::Virtual(KernelPageTable).Map((void *)(uintptr_t)ioapic.back()->Address, (void *)(uintptr_t)ioapic.back()->Address, Memory::PTFlag::RW | Memory::PTFlag::PCD); // Make sure that the address is mapped.
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break;
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}
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case 2:
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{
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iso.push_back((MADTIso *)ptr);
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KPrint("ISO (IRQ:%#lx, BUS:%#lx, GSI:%#lx, %s/%s) found.",
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iso.back()->IRQSource, iso.back()->BuSSource, iso.back()->GSI,
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iso.back()->Flags & 0x00000004 ? "Active High" : "Active Low",
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iso.back()->Flags & 0x00000100 ? "Edge Triggered" : "Level Triggered");
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break;
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}
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case 4:
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{
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nmi.push_back((MADTNmi *)ptr);
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KPrint("NMI %#lx (lint:%#lx) found.", nmi.back()->processor, nmi.back()->lint);
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break;
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}
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case 5:
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{
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LAPICAddress = (LAPIC *)ptr;
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KPrint("APIC found at %#lx", LAPICAddress);
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break;
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}
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default:
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{
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KPrint("Unknown MADT entry %#lx", *(ptr));
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break;
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}
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}
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Memory::Virtual(KernelPageTable).Map((void *)LAPICAddress, (void *)LAPICAddress, Memory::PTFlag::RW | Memory::PTFlag::PCD); // I should map more than one page?
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}
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CPUCores--; // We start at 0 (BSP) and end at 11 (APs), so we have 12 cores.
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KPrint("Total CPU cores: %d", CPUCores + 1);
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}
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MADT::~MADT()
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{
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}
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}
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