enderice2/Fennix
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fix(kernel/bootstrap): enable SSE

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This shouldn't be an issue, I guess all 64-bit CPU's support SSE anyway...
This commit is contained in:
EnderIce2 2025-04-22 21:24:51 +00:00
parent 1e4d404a43
commit c254b96256
Signed by: enderice2
GPG Key ID: FEB6B8A8507BA62E
2 changed files with 10 additions and 5 deletions
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3
Fennix Kernel.code-workspace
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@ -24,7 +24,8 @@
"kernel/std", "kernel/std",
"kernel/vfs", "kernel/vfs",
"kernel/memory", "kernel/memory",
"kernel/efi" "kernel/efi",
"kernel/bootstrap"
] ]
} }
} }

12
Kernel/arch/amd64/bootstrap/multiboot/start.s
View File

@ -68,8 +68,10 @@ Multiboot_start:
je x32Hang je x32Hang
mov %cr4, %ecx mov %cr4, %ecx
or $0x00000010, %ecx /* PSE */ or $0x10, %ecx /* PSE */
or $0x00000020, %ecx /* PAE */ or $0x20, %ecx /* PAE */
or $0x200, %ecx /* OSFXSR */
or $0x400, %ecx /* OSXMMEXCPT */
mov %ecx, %cr4 mov %ecx, %cr4
call LoadGDT32 call LoadGDT32
@ -82,12 +84,14 @@ Multiboot_start:
rdmsr rdmsr
or $0x800, %eax /* LME */ or $0x800, %eax /* LME */
or $0x100, %eax /* LMA */ or $0x100, %eax /* LMA */
or $0x1, %eax /* SCE */ or $0x1, %eax /* SCE */
wrmsr wrmsr
mov %cr0, %ecx mov %cr0, %ecx
and $~0x4, %ecx /* EM */
or $0x2, %ecx /* MP */
or $0x80000000, %ecx /* PG */ or $0x80000000, %ecx /* PG */
or $0x1, %ecx /* PE */ or $0x1, %ecx /* PE */
mov %ecx, %cr0 mov %ecx, %cr0
lgdt [GDT64.Ptr] lgdt [GDT64.Ptr]