mirror of
https://github.com/EnderIce2/Fennix.git
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feat(kernel/drivers): migrate drivers to the kernel
make the drivers builtin Signed-off-by: EnderIce2 <enderice2@protonmail.com>
This commit is contained in:
820
Kernel/drivers/audio/ac97/ac97.cpp
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820
Kernel/drivers/audio/ac97/ac97.cpp
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@ -0,0 +1,820 @@
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/*
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This file is part of Fennix Kernel.
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Fennix Kernel is free software: you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation, either version 3 of
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the License, or (at your option) any later version.
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Fennix Kernel is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include <driver.hpp>
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#include <cpu.hpp>
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#include <pci.hpp>
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#include <io.h>
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extern Driver::Manager *DriverManager;
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extern PCI::Manager *PCIManager;
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namespace Driver::AC97
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{
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dev_t DriverID;
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#define DescriptorListLength 0x20
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enum AudioVolumeValues
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{
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AV_Maximum = 0x0,
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AV_Minimum = 0x3F,
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};
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enum AudioEncodingValues
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{
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AE_PCMs8,
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AE_PCMu8,
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AE_PCMs16le,
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AE_PCMs20le,
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AE_PCMs24le,
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AE_PCMs32le,
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AE_PCMu16le,
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AE_PCMu20le,
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AE_PCMu24le,
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AE_PCMu32le,
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AE_PCMs16be,
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AE_PCMs20be,
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AE_PCMs24be,
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AE_PCMs32be,
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AE_PCMu16be,
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AE_PCMu20be,
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AE_PCMu24be,
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AE_PCMu32be,
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};
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enum NativeAudioMixerRegisters
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{
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/**
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* @brief Reset Register
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* @note Length: word
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*/
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NAM_Reset = 0x00,
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/**
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* @brief Master Volume Register
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* @note Length: word
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*/
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NAM_MasterVolume = 0x02,
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/**
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* @brief Microphone Volume Register
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* @note Length: word
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*/
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NAM_MicrophoneVolume = 0x0E,
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/**
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* @brief PCM Out Volume Register
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* @note Length: word
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*/
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NAM_PCMOutVolume = 0x18,
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/**
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* @brief Select Record Input Register
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* @note Length: word
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*/
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NAM_SelectRecordInput = 0x1A,
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/**
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* @brief Record Gain Register
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* @note Length: word
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*/
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NAM_RecordGain = 0x1C,
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/**
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* @brief Record Gain Microphone Register
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* @note Length: word
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*/
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NAM_RecordGainMicrophone = 0x1E,
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};
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enum NativeAudioBusMasterRegisters
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{
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/**
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* @brief Register box for PCM IN
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* @note Length: below
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*/
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NABM_PCMInBox = 0x00,
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/**
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* @brief Register box for PCM OUT
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* @note Length: below
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*/
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NABM_PCMOutBox = 0x10,
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/**
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* @brief Register box for Microphone
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* @note Length: below
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*/
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NABM_MicrophoneBox = 0x20,
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/**
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* @brief Global Control Register
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* @note Length: dword
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*/
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NABM_GlobalControl = 0x2C, /* 0x30 */
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/**
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* @brief Global Status Register
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* @note Length: dword
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*/
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NABM_GlobalStatus = 0x30, /* 0x34 */
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};
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enum NativeAudioBusMasterBoxOffsets
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{
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/**
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* @brief Physical Address of Buffer Descriptor List
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* @note Length: dword
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*/
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NABMBOFF_BufferDescriptorList = 0x00,
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/**
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* @brief Number of Actual Processed Buffer Descriptor Entry
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* @note Length: byte
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*/
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NABMBOFF_BufferDescriptorEntry = 0x04,
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/**
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* @brief Number of all Descriptor Entries
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* @note Length: byte
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*/
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NABMBOFF_DescriptorEntries = 0x05,
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/**
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* @brief Status of transferring Data
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* @note Length: word
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*/
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NABMBOFF_Status = 0x06,
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/**
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* @brief Number of transferred Samples in Actual Processed Entry
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* @note Length: word
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*/
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NABMBOFF_TransferredSamples = 0x08,
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/**
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* @brief Number of next processed Buffer Entry
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* @note Length: byte
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*/
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NABMBOFF_NextProcessedBufferEntry = 0x0A,
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/**
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* @brief Transfer Control
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* @note Length: byte
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*/
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NABMBOFF_TransferControl = 0x0B,
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};
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enum OutputPulseCodeModulationRegisters
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{
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/**
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* @brief Physical Address of Buffer Descriptor List
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* @note Length: dword
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*/
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PCMOUT_BufferDescriptorList = (int)NABM_PCMOutBox + (int)NABMBOFF_BufferDescriptorList,
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/**
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* @brief Number of Actual Processed Buffer Descriptor Entry
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* @note Length: byte
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*/
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PCMOUT_BufferDescriptorEntry = (int)NABM_PCMOutBox + (int)NABMBOFF_BufferDescriptorEntry,
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/**
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* @brief Number of all Descriptor Entries
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* @note Length: byte
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*/
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PCMOUT_DescriptorEntries = (int)NABM_PCMOutBox + (int)NABMBOFF_DescriptorEntries,
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/**
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* @brief Status of transferring Data
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* @note Length: word
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*/
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PCMOUT_Status = (int)NABM_PCMOutBox + (int)NABMBOFF_Status,
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/**
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* @brief Number of transferred Samples in Actual Processed Entry
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* @note Length: word
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*/
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PCMOUT_TransferredSamples = (int)NABM_PCMOutBox + (int)NABMBOFF_TransferredSamples,
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/**
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* @brief Number of next processed Buffer Entry
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* @note Length: byte
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*/
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PCMOUT_NextProcessedBufferEntry = (int)NABM_PCMOutBox + (int)NABMBOFF_NextProcessedBufferEntry,
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/**
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* @brief Transfer Control
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* @note Length: byte
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*/
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PCMOUT_TransferControl = (int)NABM_PCMOutBox + (int)NABMBOFF_TransferControl,
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};
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enum TransferControlRegisters
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{
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/**
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* @brief DMA controller control
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*
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* 0 = Pause transfer
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* 1 = Transfer sound data
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*/
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TC_DMAControllerControl = 0x01,
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/**
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* @brief Reset
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*
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* 0 = Remove reset condition
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* 1 = Reset this NABM register box, this bit is cleared by card when is reset complete
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*/
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TC_TransferReset = 0x02,
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/**
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* @brief Last Buffer Entry Interrupt enable
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*
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* 0 = Disable interrupt
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* 1 = Enable interrupt
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*/
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TC_LastBufferEntryInterruptEnable = 0x04,
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/**
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* @brief IOC Interrupt enable
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*
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* 0 = Disable interrupt
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* 1 = Enable interrupt
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*/
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TC_IOCInterruptEnable = 0x08,
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/**
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* @brief Fifo ERROR Interrupt enable
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*
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* 0 = Disable interrupt
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* 1 = Enable interrupt
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*/
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TC_FifoERRORInterruptEnable = 0x10,
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};
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enum GlobalControlRegisters
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{
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/**
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* @brief Global Interrupt Enable
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*
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* 0 = Disable Interrupts
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* 1 = Enable Interrupts
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*/
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GC_GlobalInterruptEnable = 0x01,
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/**
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* @brief Cold reset
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*
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* 0 = Device is in reset and can not be used
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* 1 = Resume to operational state
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*/
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GC_ColdReset = 0x02,
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/**
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* @brief Warm reset
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*/
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GC_WarmReset = 0x04,
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/**
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* @brief Shut down
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*
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* 0 = Device is powered
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* 1 = Shut down
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*/
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GC_ShutDown = 0x08,
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/**
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* @brief Channels for PCM Output
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*
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* 00 = 2 channels
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* 01 = 4 channels
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* 10 = 6 channels
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* 11 = Reserved
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*/
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GC_ChannelsForPCMOutput = 0x30,
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/**
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* @brief PCM Output mode
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*
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* 00 = 16 bit samples
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* 01 = 20 bit samples
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*/
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GC_PCMOutputMode = 0xC0,
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};
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struct BufferDescriptorList
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{
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/**
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* @brief Physical Address to sound data in memory
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* @note Length: dword
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*/
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uint32_t Address;
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/**
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* @brief Number of samples in this buffer
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* @note Length: word
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*/
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uint16_t SampleCount;
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/**
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* @brief Flags
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* @note Length: word
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*
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* Bit 15 = Interrupt fired when data from this entry is transferred
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* Bit 14 = Last entry of buffer, stop playing
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* Other bits = Reserved
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*/
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uint16_t Flags;
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} __attribute__((packed));
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uint16_t MixerVolume(uint8_t Left, uint8_t Right, bool Mute)
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{
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return ((uint16_t)((Right & 0x3F) |
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((Left & 0x3F) << 0x8) |
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(Mute & 1 << 0xF)));
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}
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class AC97Device
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{
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private:
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PCI::PCIHeader0 *Header;
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BufferDescriptorList *DescriptorList = nullptr;
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uint16_t MixerAddress;
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uint16_t BusMasterAddress;
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AudioEncodingValues Encoding = AE_PCMs16le;
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char Channels = 2;
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uint8_t Volume = AV_Maximum;
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bool Mute = false;
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int SampleRate = 48000;
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char SampleSize = 2;
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public:
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size_t write(uint8_t *Buffer, size_t Size)
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{
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if (Buffer == nullptr)
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{
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info("Invalid buffer.");
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return -EINVAL;
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}
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if ((Size == 0) || (Size % (SampleSize * Channels)))
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{
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info("Invalid buffer length.");
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return -EINVAL;
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}
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int TotalBDLToFill = (int)((Size + PAGE_SIZE - 1) >> 12);
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while (Size > 0)
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{
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bool ActiveDMA = !(inw(BusMasterAddress + PCMOUT_Status) & TC_DMAControllerControl);
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if (ActiveDMA)
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{
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int RemainingBDL = 0;
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do
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{
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int CurrentBDL = inb(BusMasterAddress + PCMOUT_BufferDescriptorEntry);
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int LastBDL = inb(BusMasterAddress + PCMOUT_DescriptorEntries);
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RemainingBDL = LastBDL - CurrentBDL;
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if (RemainingBDL < 0)
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RemainingBDL += DescriptorListLength;
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RemainingBDL += 1;
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if (RemainingBDL >= DescriptorListLength - 1)
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{
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long SampleCount = DescriptorList[(CurrentBDL + 1) % DescriptorListLength].SampleCount / Channels;
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if (SampleCount > 0)
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v0::Sleep(DriverID, SampleCount * 1000 / SampleRate);
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}
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} while (RemainingBDL >= DescriptorListLength - 1 &&
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!(inw(BusMasterAddress + PCMOUT_Status) & TC_DMAControllerControl));
|
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}
|
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uint8_t CurrentBDL = inb(BusMasterAddress + PCMOUT_BufferDescriptorEntry);
|
||||
uint8_t LastBDL = inb(BusMasterAddress + PCMOUT_DescriptorEntries);
|
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uint8_t NextBDL = LastBDL % DescriptorListLength;
|
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|
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ActiveDMA = !(inw(BusMasterAddress + PCMOUT_Status) & TC_DMAControllerControl);
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if (ActiveDMA)
|
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{
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NextBDL = (uint8_t)((LastBDL + 1) % DescriptorListLength);
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if (NextBDL == CurrentBDL)
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continue;
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}
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do
|
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{
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||||
size_t Wrote = (PAGE_SIZE > Size) ? size_t(Size)
|
||||
: size_t(PAGE_SIZE);
|
||||
|
||||
if (Wrote == 0)
|
||||
{
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||||
info("Wrote 0 bytes.");
|
||||
break;
|
||||
}
|
||||
|
||||
memcpy((void *)((uint64_t)DescriptorList[NextBDL].Address), Buffer, Wrote);
|
||||
DescriptorList[NextBDL].Flags = 0;
|
||||
|
||||
Buffer += Wrote;
|
||||
Size -= (unsigned int)Wrote;
|
||||
|
||||
DescriptorList[NextBDL].SampleCount = uint16_t(Wrote / SampleSize);
|
||||
TotalBDLToFill--;
|
||||
NextBDL = (uint8_t)((NextBDL + 1) % DescriptorListLength);
|
||||
} while (TotalBDLToFill-- && NextBDL != CurrentBDL);
|
||||
|
||||
outb(BusMasterAddress + PCMOUT_DescriptorEntries, NextBDL - 1);
|
||||
|
||||
ActiveDMA = !(inw(BusMasterAddress + PCMOUT_Status) & TC_DMAControllerControl);
|
||||
if (!ActiveDMA)
|
||||
{
|
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// Start DMA
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||||
outb(BusMasterAddress + PCMOUT_TransferControl,
|
||||
inb(BusMasterAddress + PCMOUT_TransferControl) | TC_DMAControllerControl);
|
||||
}
|
||||
}
|
||||
return Size;
|
||||
}
|
||||
|
||||
int ioctl(AudioIoctl, void *)
|
||||
{
|
||||
// if (Data->AudioCallback.Adjust._Volume)
|
||||
// {
|
||||
// Volume = (uint8_t)(0x3F - (0x3F * Data->AudioCallback.Adjust.Volume / 100));
|
||||
// outw(BAR.MixerAddress + NAM_MasterVolume, MixerVolume(Volume, Volume, Mute));
|
||||
// // outw(BAR.MixerAddress + NAM_PCMOutVolume, MixerVolume(Volume, Volume, Mute));
|
||||
// }
|
||||
// else if (Data->AudioCallback.Adjust._Encoding)
|
||||
// {
|
||||
// fixme("Encoding changing not supported yet.");
|
||||
// }
|
||||
// else if (Data->AudioCallback.Adjust._SampleRate)
|
||||
// {
|
||||
// switch (Data->AudioCallback.Adjust.SampleRate)
|
||||
// {
|
||||
// case 0:
|
||||
// {
|
||||
// SampleRate = 8000;
|
||||
// break;
|
||||
// }
|
||||
// case 1:
|
||||
// {
|
||||
// SampleRate = 11025;
|
||||
// break;
|
||||
// }
|
||||
// case 2:
|
||||
// {
|
||||
// SampleRate = 16000;
|
||||
// break;
|
||||
// }
|
||||
// case 3:
|
||||
// {
|
||||
// SampleRate = 22050;
|
||||
// break;
|
||||
// }
|
||||
// case 4:
|
||||
// {
|
||||
// SampleRate = 32000;
|
||||
// break;
|
||||
// }
|
||||
// case 5:
|
||||
// {
|
||||
// SampleRate = 44100;
|
||||
// break;
|
||||
// }
|
||||
// case 6:
|
||||
// {
|
||||
// SampleRate = 48000;
|
||||
// break;
|
||||
// }
|
||||
// case 7:
|
||||
// {
|
||||
// SampleRate = 88200;
|
||||
// break;
|
||||
// }
|
||||
// case 8:
|
||||
// {
|
||||
// SampleRate = 96000;
|
||||
// break;
|
||||
// }
|
||||
// default:
|
||||
// {
|
||||
// SampleRate = 16000;
|
||||
// error("Invalid sample rate. Defaulting to 16000.");
|
||||
// break;
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
// else if (Data->AudioCallback.Adjust._Channels)
|
||||
// {
|
||||
// switch (Data->AudioCallback.Adjust.Channels)
|
||||
// {
|
||||
// case 0:
|
||||
// {
|
||||
// Channels = 1; // Mono
|
||||
// break;
|
||||
// }
|
||||
// case 1:
|
||||
// {
|
||||
// Channels = 2; // Stereo
|
||||
// break;
|
||||
// }
|
||||
// default:
|
||||
// {
|
||||
// Channels = 2;
|
||||
// error("Invalid channel count. Defaulting to 2.");
|
||||
// break;
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
return 0;
|
||||
}
|
||||
|
||||
void OnInterruptReceived(CPU::TrapFrame *)
|
||||
{
|
||||
uint16_t Status = inw(MixerAddress + PCMOUT_Status);
|
||||
if (Status & TC_IOCInterruptEnable)
|
||||
{
|
||||
debug("IOC");
|
||||
outw(MixerAddress + PCMOUT_Status, TC_IOCInterruptEnable);
|
||||
uint16_t CurrentBDL = inb(BusMasterAddress + PCMOUT_BufferDescriptorEntry);
|
||||
uint16_t LastBDL = (CurrentBDL + 2) & (DescriptorListLength - 1);
|
||||
outb(BusMasterAddress + PCMOUT_DescriptorEntries, LastBDL);
|
||||
info("FIXME: CurrentBDL: %d, LastBDL: %d", CurrentBDL, LastBDL);
|
||||
}
|
||||
else if (Status & TC_LastBufferEntryInterruptEnable)
|
||||
{
|
||||
debug("Last buffer entry");
|
||||
// Stop DMA
|
||||
uint8_t TransferControl = inb((uint16_t)(BusMasterAddress + PCMOUT_TransferControl));
|
||||
TransferControl &= ~TC_DMAControllerControl;
|
||||
outb((uint16_t)(BusMasterAddress + PCMOUT_TransferControl), TransferControl);
|
||||
|
||||
outw(MixerAddress + PCMOUT_Status, TC_LastBufferEntryInterruptEnable);
|
||||
}
|
||||
else if (Status & TC_FifoERRORInterruptEnable)
|
||||
{
|
||||
info("FIFO error");
|
||||
outw(MixerAddress + PCMOUT_Status, TC_FifoERRORInterruptEnable);
|
||||
}
|
||||
else
|
||||
{
|
||||
debug("Unknown interrupt status %#x", Status);
|
||||
outw(MixerAddress + PCMOUT_Status, 0xFFFF);
|
||||
}
|
||||
}
|
||||
|
||||
void Panic()
|
||||
{
|
||||
uint8_t TransferControl = inb((uint16_t)(BusMasterAddress + PCMOUT_TransferControl));
|
||||
TransferControl &= ~(TC_LastBufferEntryInterruptEnable |
|
||||
TC_IOCInterruptEnable |
|
||||
TC_FifoERRORInterruptEnable);
|
||||
outb((uint16_t)(BusMasterAddress + PCMOUT_TransferControl), TransferControl);
|
||||
|
||||
uint32_t GlobalControl = inl((uint16_t)(BusMasterAddress + NABM_GlobalControl));
|
||||
GlobalControl &= ~GC_GlobalInterruptEnable;
|
||||
GlobalControl |= GC_ShutDown;
|
||||
outl((uint16_t)(BusMasterAddress + NABM_GlobalControl), GlobalControl);
|
||||
}
|
||||
|
||||
AC97Device(PCI::PCIHeader0 *_Header)
|
||||
: Header(_Header)
|
||||
{
|
||||
/* Native Audio Mixer Base Address */
|
||||
uint32_t PCIBAR0 = Header->BAR0;
|
||||
|
||||
/* Native Audio Bus Master Base Address */
|
||||
uint32_t PCIBAR1 = Header->BAR1;
|
||||
|
||||
// uint8_t Type = PCIBAR0 & 1;
|
||||
MixerAddress = (uint16_t)(PCIBAR0 & (~3));
|
||||
BusMasterAddress = PCIBAR1 & (~15);
|
||||
|
||||
uint16_t OutputPCMTransferControl = BusMasterAddress + PCMOUT_TransferControl;
|
||||
|
||||
/* DescriptorList address MUST be physical. */
|
||||
DescriptorList = (BufferDescriptorList *)v0::AllocateMemory(DriverID, TO_PAGES(sizeof(BufferDescriptorList) * DescriptorListLength));
|
||||
memset(DescriptorList, 0, sizeof(BufferDescriptorList) * DescriptorListLength);
|
||||
|
||||
uint16_t DLSampleCount = (uint16_t)(PAGE_SIZE / SampleSize);
|
||||
for (int i = 0; i < DescriptorListLength; i++)
|
||||
{
|
||||
DescriptorList[i].Address = (uint32_t)(uintptr_t)v0::AllocateMemory(DriverID, TO_PAGES(sizeof(uint16_t *)));
|
||||
DescriptorList[i].SampleCount = DLSampleCount;
|
||||
DescriptorList[i].Flags = 0;
|
||||
debug("DescriptorList[%d] = { Address: %#lx, SampleCount: %d, Flags: %#lx }",
|
||||
i,
|
||||
DescriptorList[i].Address,
|
||||
DescriptorList[i].SampleCount,
|
||||
DescriptorList[i].Flags);
|
||||
}
|
||||
|
||||
outw(MixerAddress + NAM_MasterVolume, MixerVolume(Volume, Volume, Mute));
|
||||
outw(MixerAddress + NAM_PCMOutVolume, MixerVolume(Volume, Volume, Mute));
|
||||
|
||||
Volume = 0x3F - (0x3F * /* VOL 50% */ 50 / 100);
|
||||
outw(MixerAddress + NAM_MasterVolume, MixerVolume(Volume, Volume, Mute));
|
||||
|
||||
outb(OutputPCMTransferControl, inb(OutputPCMTransferControl) | TC_TransferReset);
|
||||
while (inb(OutputPCMTransferControl) & TC_TransferReset)
|
||||
;
|
||||
|
||||
uint32_t GlobalControl = inl(BusMasterAddress + NABM_GlobalControl);
|
||||
GlobalControl = (GlobalControl & ~((0x3U) << 0x16)); /* PCM 16-bit mode */
|
||||
GlobalControl = (GlobalControl & ~((0x3U) << 20)); /* 2 channels */
|
||||
GlobalControl |= GC_GlobalInterruptEnable;
|
||||
GlobalControl &= ~GC_ShutDown;
|
||||
|
||||
outl(BusMasterAddress + PCMOUT_BufferDescriptorList,
|
||||
(uint32_t)(uint64_t)DescriptorList);
|
||||
|
||||
outl(BusMasterAddress + NABM_GlobalControl, GlobalControl);
|
||||
|
||||
uint8_t TransferControl = inb(OutputPCMTransferControl);
|
||||
TransferControl |= TC_IOCInterruptEnable |
|
||||
TC_FifoERRORInterruptEnable;
|
||||
outb(OutputPCMTransferControl, TransferControl);
|
||||
|
||||
// Stop DMA
|
||||
outb(OutputPCMTransferControl, inb(OutputPCMTransferControl) & ~TC_DMAControllerControl);
|
||||
}
|
||||
|
||||
~AC97Device()
|
||||
{
|
||||
outw(MixerAddress + NAM_MasterVolume, MixerVolume(AV_Maximum, AV_Maximum, true));
|
||||
outw(MixerAddress + NAM_PCMOutVolume, MixerVolume(AV_Maximum, AV_Maximum, true));
|
||||
|
||||
// Stop DMA
|
||||
outb((uint16_t)(BusMasterAddress + PCMOUT_TransferControl),
|
||||
inb((uint16_t)(BusMasterAddress + PCMOUT_TransferControl)) & ~TC_DMAControllerControl);
|
||||
|
||||
// Disable interrupts
|
||||
uint8_t TransferControl = inb((uint16_t)(BusMasterAddress + PCMOUT_TransferControl));
|
||||
|
||||
TransferControl &= ~(TC_LastBufferEntryInterruptEnable |
|
||||
TC_IOCInterruptEnable |
|
||||
TC_FifoERRORInterruptEnable);
|
||||
outb((uint16_t)(BusMasterAddress + PCMOUT_TransferControl), TransferControl);
|
||||
|
||||
// Disable global control
|
||||
uint32_t GlobalControl = inl((uint16_t)(BusMasterAddress + NABM_GlobalControl));
|
||||
GlobalControl &= ~GC_GlobalInterruptEnable;
|
||||
GlobalControl |= GC_ShutDown;
|
||||
outl((uint16_t)(BusMasterAddress + NABM_GlobalControl), GlobalControl);
|
||||
}
|
||||
};
|
||||
|
||||
std::unordered_map<dev_t, AC97Device *> Drivers;
|
||||
|
||||
int Open(struct Inode *, int, mode_t)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int Close(struct Inode *)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
ssize_t Read(struct Inode *, void *, size_t, off_t)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
ssize_t Write(struct Inode *Node, const void *Buffer, size_t Size, off_t)
|
||||
{
|
||||
return Drivers[Node->GetMinor()]->write((uint8_t *)Buffer, Size);
|
||||
}
|
||||
|
||||
int Ioctl(struct Inode *Node, unsigned long Request, void *Argp)
|
||||
{
|
||||
return Drivers[Node->GetMinor()]->ioctl((AudioIoctl)Request, Argp);
|
||||
}
|
||||
|
||||
const struct InodeOperations ops = {
|
||||
.Lookup = nullptr,
|
||||
.Create = nullptr,
|
||||
.Remove = nullptr,
|
||||
.Rename = nullptr,
|
||||
.Read = Read,
|
||||
.Write = Write,
|
||||
.Truncate = nullptr,
|
||||
.Open = Open,
|
||||
.Close = Close,
|
||||
.Ioctl = Ioctl,
|
||||
.ReadDir = nullptr,
|
||||
.MkDir = nullptr,
|
||||
.RmDir = nullptr,
|
||||
.SymLink = nullptr,
|
||||
.ReadLink = nullptr,
|
||||
.Seek = nullptr,
|
||||
.Stat = nullptr,
|
||||
};
|
||||
|
||||
std::list<PCI::PCIDevice> Devices;
|
||||
int Entry()
|
||||
{
|
||||
for (auto &&dev : Devices)
|
||||
{
|
||||
PCIManager->InitializeDevice(dev, KernelPageTable);
|
||||
AC97Device *ac97 = new AC97Device((PCI::PCIHeader0 *)dev.Header);
|
||||
dev_t ret = v0::RegisterDevice(DriverID, NETWORK_TYPE_ETHERNET, &ops);
|
||||
Drivers[ret] = ac97;
|
||||
}
|
||||
|
||||
if (Drivers.empty())
|
||||
{
|
||||
info("No valid AC'97 device found.");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int Final()
|
||||
{
|
||||
for (auto &&dev : Drivers)
|
||||
{
|
||||
dev_t ret = dev.first;
|
||||
v0::UnregisterDevice(DriverID, ret);
|
||||
delete dev.second;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int Panic()
|
||||
{
|
||||
for (auto &&i : Drivers)
|
||||
i.second->Panic();
|
||||
return 0;
|
||||
}
|
||||
|
||||
int Probe()
|
||||
{
|
||||
Devices = PCIManager->FindPCIDevice(
|
||||
{
|
||||
0x8086, /* Intel */
|
||||
},
|
||||
{
|
||||
0x2415, /* AC'97 */
|
||||
});
|
||||
|
||||
for (auto &&i : Devices)
|
||||
{
|
||||
PCI::PCIHeader0 *hdr0 = (PCI::PCIHeader0 *)i.Header;
|
||||
uint8_t type = hdr0->BAR0 & 1;
|
||||
if (type != 1)
|
||||
{
|
||||
warn("Device %x:%x.%d BAR0 is not I/O.",
|
||||
hdr0->Header.VendorID,
|
||||
hdr0->Header.DeviceID,
|
||||
hdr0->Header.ProgIF);
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
||||
if (Devices.empty())
|
||||
{
|
||||
info("No AC'97 device found.");
|
||||
return -ENODEV;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
REGISTER_BUILTIN_DRIVER(ac97,
|
||||
"Audio Codec '97 Driver",
|
||||
"enderice2",
|
||||
1, 0, 0,
|
||||
Entry,
|
||||
Final,
|
||||
Panic,
|
||||
Probe);
|
||||
}
|
||||
Reference in New Issue
Block a user