diff --git a/Architecture/aarch64/Bootstrap/boot.S b/Architecture/aarch64/Bootstrap/boot.S
index 45ec22f1..8b881340 100644
--- a/Architecture/aarch64/Bootstrap/boot.S
+++ b/Architecture/aarch64/Bootstrap/boot.S
@@ -1,7 +1,7 @@
/* Based on this tutorial:
https://github.com/s-matyukevich/raspberry-pi-os */
-.section ".text.boot"
+.section ".text.boot", "a"
.extern _bss_start
.extern _bss_end
diff --git a/Architecture/amd64/AdvancedConfigurationAndPowerInterface.cpp b/Architecture/amd64/AdvancedConfigurationAndPowerInterface.cpp
index 046f864a..279d6de9 100644
--- a/Architecture/amd64/AdvancedConfigurationAndPowerInterface.cpp
+++ b/Architecture/amd64/AdvancedConfigurationAndPowerInterface.cpp
@@ -24,135 +24,135 @@
namespace ACPI
{
- __no_sanitize("alignment") void *ACPI::FindTable(ACPI::ACPIHeader *ACPIHeader, char *Signature)
- {
- for (uint64_t t = 0; t < ((ACPIHeader->Length - sizeof(ACPI::ACPIHeader)) / (XSDTSupported ? 8 : 4)); t++)
- {
+ __no_sanitize("alignment") void *ACPI::FindTable(ACPI::ACPIHeader *ACPIHeader, char *Signature)
+ {
+ for (uint64_t t = 0; t < ((ACPIHeader->Length - sizeof(ACPI::ACPIHeader)) / (XSDTSupported ? 8 : 4)); t++)
+ {
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wint-to-pointer-cast"
- // TODO: Should I be concerned about unaligned memory access?
- ACPI::ACPIHeader *SDTHdr = nullptr;
- if (XSDTSupported)
- SDTHdr = (ACPI::ACPIHeader *)(*(uint64_t *)((uint64_t)ACPIHeader + sizeof(ACPI::ACPIHeader) + (t * 8)));
- else
- SDTHdr = (ACPI::ACPIHeader *)(*(uint32_t *)((uint64_t)ACPIHeader + sizeof(ACPI::ACPIHeader) + (t * 4)));
+ // TODO: Should I be concerned about unaligned memory access?
+ ACPI::ACPIHeader *SDTHdr = nullptr;
+ if (XSDTSupported)
+ SDTHdr = (ACPI::ACPIHeader *)(*(uint64_t *)((uint64_t)ACPIHeader + sizeof(ACPI::ACPIHeader) + (t * 8)));
+ else
+ SDTHdr = (ACPI::ACPIHeader *)(*(uint32_t *)((uint64_t)ACPIHeader + sizeof(ACPI::ACPIHeader) + (t * 4)));
#pragma GCC diagnostic pop
- for (int i = 0; i < 4; i++)
- {
- if (SDTHdr->Signature[i] != Signature[i])
- break;
- if (i == 3)
- {
- trace("%s found at address %p", Signature, (uintptr_t)SDTHdr);
- return SDTHdr;
- }
- }
- }
- // warn("%s not found!", Signature);
- return nullptr;
- }
+ for (int i = 0; i < 4; i++)
+ {
+ if (SDTHdr->Signature[i] != Signature[i])
+ break;
+ if (i == 3)
+ {
+ trace("%s found at address %p", Signature, (uintptr_t)SDTHdr);
+ return SDTHdr;
+ }
+ }
+ }
+ // warn("%s not found!", Signature);
+ return nullptr;
+ }
- void ACPI::SearchTables(ACPIHeader *Header)
- {
- if (!Header)
- return;
+ void ACPI::SearchTables(ACPIHeader *Header)
+ {
+ if (!Header)
+ return;
- HPET = (HPETHeader *)FindTable(Header, (char *)"HPET");
- FADT = (FADTHeader *)FindTable(Header, (char *)"FACP");
- MCFG = (MCFGHeader *)FindTable(Header, (char *)"MCFG");
- BGRT = (BGRTHeader *)FindTable(Header, (char *)"BGRT");
- SRAT = (SRATHeader *)FindTable(Header, (char *)"SRAT");
- TPM2 = (TPM2Header *)FindTable(Header, (char *)"TPM2");
- TCPA = (TCPAHeader *)FindTable(Header, (char *)"TCPA");
- WAET = (WAETHeader *)FindTable(Header, (char *)"WAET");
- MADT = (MADTHeader *)FindTable(Header, (char *)"APIC");
- HEST = (HESTHeader *)FindTable(Header, (char *)"HEST");
- FindTable(Header, (char *)"BERT");
- FindTable(Header, (char *)"CPEP");
- FindTable(Header, (char *)"DSDT");
- FindTable(Header, (char *)"ECDT");
- FindTable(Header, (char *)"EINJ");
- FindTable(Header, (char *)"ERST");
- FindTable(Header, (char *)"FACS");
- FindTable(Header, (char *)"MSCT");
- FindTable(Header, (char *)"MPST");
- FindTable(Header, (char *)"OEMx");
- FindTable(Header, (char *)"PMTT");
- FindTable(Header, (char *)"PSDT");
- FindTable(Header, (char *)"RASF");
- FindTable(Header, (char *)"RSDT");
- FindTable(Header, (char *)"SBST");
- FindTable(Header, (char *)"SLIT");
- FindTable(Header, (char *)"SSDT");
- FindTable(Header, (char *)"XSDT");
- FindTable(Header, (char *)"DRTM");
- FindTable(Header, (char *)"FPDT");
- FindTable(Header, (char *)"GTDT");
- FindTable(Header, (char *)"PCCT");
- FindTable(Header, (char *)"S3PT");
- FindTable(Header, (char *)"MATR");
- FindTable(Header, (char *)"MSDM");
- FindTable(Header, (char *)"WPBT");
- FindTable(Header, (char *)"OSDT");
- FindTable(Header, (char *)"RSDP");
- FindTable(Header, (char *)"NFIT");
- FindTable(Header, (char *)"ASF!");
- FindTable(Header, (char *)"BOOT");
- FindTable(Header, (char *)"CSRT");
- FindTable(Header, (char *)"DBG2");
- FindTable(Header, (char *)"DBGP");
- FindTable(Header, (char *)"DMAR");
- FindTable(Header, (char *)"IBFT");
- FindTable(Header, (char *)"IORT");
- FindTable(Header, (char *)"IVRS");
- FindTable(Header, (char *)"LPIT");
- FindTable(Header, (char *)"MCHI");
- FindTable(Header, (char *)"MTMR");
- FindTable(Header, (char *)"SLIC");
- FindTable(Header, (char *)"SPCR");
- FindTable(Header, (char *)"SPMI");
- FindTable(Header, (char *)"UEFI");
- FindTable(Header, (char *)"VRTC");
- FindTable(Header, (char *)"WDAT");
- FindTable(Header, (char *)"WDDT");
- FindTable(Header, (char *)"WDRT");
- FindTable(Header, (char *)"ATKG");
- FindTable(Header, (char *)"GSCI");
- FindTable(Header, (char *)"IEIT");
- FindTable(Header, (char *)"HMAT");
- FindTable(Header, (char *)"CEDT");
- FindTable(Header, (char *)"AEST");
- }
+ HPET = (HPETHeader *)FindTable(Header, (char *)"HPET");
+ FADT = (FADTHeader *)FindTable(Header, (char *)"FACP");
+ MCFG = (MCFGHeader *)FindTable(Header, (char *)"MCFG");
+ BGRT = (BGRTHeader *)FindTable(Header, (char *)"BGRT");
+ SRAT = (SRATHeader *)FindTable(Header, (char *)"SRAT");
+ TPM2 = (TPM2Header *)FindTable(Header, (char *)"TPM2");
+ TCPA = (TCPAHeader *)FindTable(Header, (char *)"TCPA");
+ WAET = (WAETHeader *)FindTable(Header, (char *)"WAET");
+ MADT = (MADTHeader *)FindTable(Header, (char *)"APIC");
+ HEST = (HESTHeader *)FindTable(Header, (char *)"HEST");
+ FindTable(Header, (char *)"BERT");
+ FindTable(Header, (char *)"CPEP");
+ FindTable(Header, (char *)"DSDT");
+ FindTable(Header, (char *)"ECDT");
+ FindTable(Header, (char *)"EINJ");
+ FindTable(Header, (char *)"ERST");
+ FindTable(Header, (char *)"FACS");
+ FindTable(Header, (char *)"MSCT");
+ FindTable(Header, (char *)"MPST");
+ FindTable(Header, (char *)"OEMx");
+ FindTable(Header, (char *)"PMTT");
+ FindTable(Header, (char *)"PSDT");
+ FindTable(Header, (char *)"RASF");
+ FindTable(Header, (char *)"RSDT");
+ FindTable(Header, (char *)"SBST");
+ FindTable(Header, (char *)"SLIT");
+ FindTable(Header, (char *)"SSDT");
+ FindTable(Header, (char *)"XSDT");
+ FindTable(Header, (char *)"DRTM");
+ FindTable(Header, (char *)"FPDT");
+ FindTable(Header, (char *)"GTDT");
+ FindTable(Header, (char *)"PCCT");
+ FindTable(Header, (char *)"S3PT");
+ FindTable(Header, (char *)"MATR");
+ FindTable(Header, (char *)"MSDM");
+ FindTable(Header, (char *)"WPBT");
+ FindTable(Header, (char *)"OSDT");
+ FindTable(Header, (char *)"RSDP");
+ FindTable(Header, (char *)"NFIT");
+ FindTable(Header, (char *)"ASF!");
+ FindTable(Header, (char *)"BOOT");
+ FindTable(Header, (char *)"CSRT");
+ FindTable(Header, (char *)"DBG2");
+ FindTable(Header, (char *)"DBGP");
+ FindTable(Header, (char *)"DMAR");
+ FindTable(Header, (char *)"IBFT");
+ FindTable(Header, (char *)"IORT");
+ FindTable(Header, (char *)"IVRS");
+ FindTable(Header, (char *)"LPIT");
+ FindTable(Header, (char *)"MCHI");
+ FindTable(Header, (char *)"MTMR");
+ FindTable(Header, (char *)"SLIC");
+ FindTable(Header, (char *)"SPCR");
+ FindTable(Header, (char *)"SPMI");
+ FindTable(Header, (char *)"UEFI");
+ FindTable(Header, (char *)"VRTC");
+ FindTable(Header, (char *)"WDAT");
+ FindTable(Header, (char *)"WDDT");
+ FindTable(Header, (char *)"WDRT");
+ FindTable(Header, (char *)"ATKG");
+ FindTable(Header, (char *)"GSCI");
+ FindTable(Header, (char *)"IEIT");
+ FindTable(Header, (char *)"HMAT");
+ FindTable(Header, (char *)"CEDT");
+ FindTable(Header, (char *)"AEST");
+ }
- ACPI::ACPI()
- {
- trace("Initializing ACPI");
- if (bInfo.RSDP->Revision >= 2 && bInfo.RSDP->XSDTAddress)
- {
- debug("XSDT supported");
- XSDTSupported = true;
- XSDT = (ACPIHeader *)(bInfo.RSDP->XSDTAddress);
- }
- else
- {
- debug("RSDT supported");
- XSDT = (ACPIHeader *)(uintptr_t)bInfo.RSDP->RSDTAddress;
- }
+ ACPI::ACPI()
+ {
+ trace("Initializing ACPI");
+ if (bInfo.RSDP->Revision >= 2 && bInfo.RSDP->XSDTAddress)
+ {
+ debug("XSDT supported");
+ XSDTSupported = true;
+ XSDT = (ACPIHeader *)(bInfo.RSDP->XSDTAddress);
+ }
+ else
+ {
+ debug("RSDT supported");
+ XSDT = (ACPIHeader *)(uintptr_t)bInfo.RSDP->RSDTAddress;
+ }
- this->SearchTables(XSDT);
+ this->SearchTables(XSDT);
- if (FADT)
- {
- outb(s_cst(uint16_t, FADT->SMI_CommandPort), FADT->AcpiEnable);
- while (!(inw(s_cst(uint16_t, FADT->PM1aControlBlock)) & 1))
- ;
- }
- }
+ if (FADT)
+ {
+ outb(s_cst(uint16_t, FADT->SMI_CommandPort), FADT->AcpiEnable);
+ while (!(inw(s_cst(uint16_t, FADT->PM1aControlBlock)) & 1))
+ ;
+ }
+ }
- ACPI::~ACPI()
- {
- }
+ ACPI::~ACPI()
+ {
+ }
}
diff --git a/Architecture/amd64/Bootstrap/Limine/Limine.c b/Architecture/amd64/Bootstrap/Limine/Limine.c
index d01b47a0..d90fc649 100644
--- a/Architecture/amd64/Bootstrap/Limine/Limine.c
+++ b/Architecture/amd64/Bootstrap/Limine/Limine.c
@@ -26,292 +26,292 @@
void InitLimine();
static volatile struct limine_entry_point_request EntryPointRequest = {
- .id = LIMINE_ENTRY_POINT_REQUEST,
- .revision = 0,
- .response = NULL,
- .entry = InitLimine};
+ .id = LIMINE_ENTRY_POINT_REQUEST,
+ .revision = 0,
+ .response = NULL,
+ .entry = InitLimine};
static volatile struct limine_bootloader_info_request BootloaderInfoRequest = {
- .id = LIMINE_BOOTLOADER_INFO_REQUEST,
- .revision = 0};
+ .id = LIMINE_BOOTLOADER_INFO_REQUEST,
+ .revision = 0};
static volatile struct limine_framebuffer_request FramebufferRequest = {
- .id = LIMINE_FRAMEBUFFER_REQUEST,
- .revision = 0};
+ .id = LIMINE_FRAMEBUFFER_REQUEST,
+ .revision = 0};
static volatile struct limine_memmap_request MemmapRequest = {
- .id = LIMINE_MEMMAP_REQUEST,
- .revision = 0};
+ .id = LIMINE_MEMMAP_REQUEST,
+ .revision = 0};
static volatile struct limine_kernel_address_request KernelAddressRequest = {
- .id = LIMINE_KERNEL_ADDRESS_REQUEST,
- .revision = 0};
+ .id = LIMINE_KERNEL_ADDRESS_REQUEST,
+ .revision = 0};
static volatile struct limine_rsdp_request RsdpRequest = {
- .id = LIMINE_RSDP_REQUEST,
- .revision = 0};
+ .id = LIMINE_RSDP_REQUEST,
+ .revision = 0};
static volatile struct limine_kernel_file_request KernelFileRequest = {
- .id = LIMINE_KERNEL_FILE_REQUEST,
- .revision = 0};
+ .id = LIMINE_KERNEL_FILE_REQUEST,
+ .revision = 0};
static volatile struct limine_module_request ModuleRequest = {
- .id = LIMINE_MODULE_REQUEST,
- .revision = 0};
+ .id = LIMINE_MODULE_REQUEST,
+ .revision = 0};
static volatile struct limine_smbios_request SmbiosRequest = {
- .id = LIMINE_SMBIOS_REQUEST,
- .revision = 0};
+ .id = LIMINE_SMBIOS_REQUEST,
+ .revision = 0};
void *TempStackPtr = NULL;
__naked __used __no_stack_protector void InitLimine()
{
- asmv("mov %%rsp, %0"
- : "=r"(TempStackPtr));
+ asmv("mov %%rsp, %0"
+ : "=r"(TempStackPtr));
- asmv("mov %0, %%rsp"
- :
- : "r"((uintptr_t)TempStackPtr - 0xFFFF800000000000));
+ asmv("mov %0, %%rsp"
+ :
+ : "r"((uintptr_t)TempStackPtr - 0xFFFF800000000000));
- asmv("mov $0, %rax\n"
- "mov $0, %rbx\n"
- "mov $0, %rcx\n"
- "mov $0, %rdx\n"
- "mov $0, %rsi\n"
- "mov $0, %rdi\n"
- "mov $0, %rbp\n"
- "mov $0, %r8\n"
- "mov $0, %r9\n"
- "mov $0, %r10\n"
- "mov $0, %r11\n"
- "mov $0, %r12\n"
- "mov $0, %r13\n"
- "mov $0, %r14\n"
- "mov $0, %r15");
+ asmv("mov $0, %rax\n"
+ "mov $0, %rbx\n"
+ "mov $0, %rcx\n"
+ "mov $0, %rdx\n"
+ "mov $0, %rsi\n"
+ "mov $0, %rdi\n"
+ "mov $0, %rbp\n"
+ "mov $0, %r8\n"
+ "mov $0, %r9\n"
+ "mov $0, %r10\n"
+ "mov $0, %r11\n"
+ "mov $0, %r12\n"
+ "mov $0, %r13\n"
+ "mov $0, %r14\n"
+ "mov $0, %r15");
- asmv("jmp InitLimineAfterStack");
+ asmv("jmp InitLimineAfterStack");
}
SafeFunction NIF void InitLimineAfterStack()
{
- struct BootInfo binfo = {};
- struct limine_bootloader_info_response *BootloaderInfoResponse = BootloaderInfoRequest.response;
- info("Bootloader: %s %s", BootloaderInfoResponse->name, BootloaderInfoResponse->version);
+ struct BootInfo binfo = {};
+ struct limine_bootloader_info_response *BootloaderInfoResponse = BootloaderInfoRequest.response;
+ info("Bootloader: %s %s", BootloaderInfoResponse->name, BootloaderInfoResponse->version);
- struct limine_framebuffer_response *FrameBufferResponse = FramebufferRequest.response;
- struct limine_memmap_response *MemmapResponse = MemmapRequest.response;
- struct limine_kernel_address_response *KernelAddressResponse = KernelAddressRequest.response;
- struct limine_rsdp_response *RsdpResponse = RsdpRequest.response;
- struct limine_kernel_file_response *KernelFileResponse = KernelFileRequest.response;
- struct limine_module_response *ModuleResponse = ModuleRequest.response;
- struct limine_smbios_response *SmbiosResponse = SmbiosRequest.response;
+ struct limine_framebuffer_response *FrameBufferResponse = FramebufferRequest.response;
+ struct limine_memmap_response *MemmapResponse = MemmapRequest.response;
+ struct limine_kernel_address_response *KernelAddressResponse = KernelAddressRequest.response;
+ struct limine_rsdp_response *RsdpResponse = RsdpRequest.response;
+ struct limine_kernel_file_response *KernelFileResponse = KernelFileRequest.response;
+ struct limine_module_response *ModuleResponse = ModuleRequest.response;
+ struct limine_smbios_response *SmbiosResponse = SmbiosRequest.response;
- if (FrameBufferResponse == NULL || FrameBufferResponse->framebuffer_count < 1)
- {
- error("No framebuffer available [%#lx;%ld]", FrameBufferResponse,
- (FrameBufferResponse == NULL) ? 0 : FrameBufferResponse->framebuffer_count);
- inf_loop asmv("hlt");
- }
+ if (FrameBufferResponse == NULL || FrameBufferResponse->framebuffer_count < 1)
+ {
+ error("No framebuffer available [%#lx;%ld]", FrameBufferResponse,
+ (FrameBufferResponse == NULL) ? 0 : FrameBufferResponse->framebuffer_count);
+ inf_loop asmv("hlt");
+ }
- if (MemmapResponse == NULL || MemmapResponse->entry_count < 1)
- {
- error("No memory map available [%#lx;%ld]", MemmapResponse,
- (MemmapResponse == NULL) ? 0 : MemmapResponse->entry_count);
- inf_loop asmv("hlt");
- }
+ if (MemmapResponse == NULL || MemmapResponse->entry_count < 1)
+ {
+ error("No memory map available [%#lx;%ld]", MemmapResponse,
+ (MemmapResponse == NULL) ? 0 : MemmapResponse->entry_count);
+ inf_loop asmv("hlt");
+ }
- if (KernelAddressResponse == NULL)
- {
- error("No kernel address available [%#lx]", KernelAddressResponse);
- inf_loop asmv("hlt");
- }
+ if (KernelAddressResponse == NULL)
+ {
+ error("No kernel address available [%#lx]", KernelAddressResponse);
+ inf_loop asmv("hlt");
+ }
- if (RsdpResponse == NULL || RsdpResponse->address == 0)
- {
- error("No RSDP address available [%#lx;%#lx]", RsdpResponse,
- (RsdpResponse == NULL) ? 0 : RsdpResponse->address);
- inf_loop asmv("hlt");
- }
+ if (RsdpResponse == NULL || RsdpResponse->address == 0)
+ {
+ error("No RSDP address available [%#lx;%#lx]", RsdpResponse,
+ (RsdpResponse == NULL) ? 0 : RsdpResponse->address);
+ inf_loop asmv("hlt");
+ }
- if (KernelFileResponse == NULL || KernelFileResponse->kernel_file == NULL)
- {
- error("No kernel file available [%#lx;%#lx]", KernelFileResponse,
- (KernelFileResponse == NULL) ? 0 : KernelFileResponse->kernel_file);
- inf_loop asmv("hlt");
- }
+ if (KernelFileResponse == NULL || KernelFileResponse->kernel_file == NULL)
+ {
+ error("No kernel file available [%#lx;%#lx]", KernelFileResponse,
+ (KernelFileResponse == NULL) ? 0 : KernelFileResponse->kernel_file);
+ inf_loop asmv("hlt");
+ }
- /* Actual parsing starts here */
+ /* Actual parsing starts here */
- for (uint64_t i = 0; i < FrameBufferResponse->framebuffer_count; i++)
- {
- struct limine_framebuffer *framebuffer = FrameBufferResponse->framebuffers[i];
- switch (framebuffer->memory_model)
- {
- case LIMINE_FRAMEBUFFER_RGB:
- binfo.Framebuffer[i].Type = RGB;
- break;
- default:
- {
- error("Unsupported framebuffer memory model %d", framebuffer->memory_model);
- inf_loop asmv("hlt");
- }
- }
- binfo.Framebuffer[i].BaseAddress = (void *)((uintptr_t)framebuffer->address - 0xFFFF800000000000);
- binfo.Framebuffer[i].Width = (uint32_t)framebuffer->width;
- binfo.Framebuffer[i].Height = (uint32_t)framebuffer->height;
- binfo.Framebuffer[i].Pitch = (uint32_t)framebuffer->pitch;
- binfo.Framebuffer[i].BitsPerPixel = framebuffer->bpp;
- binfo.Framebuffer[i].RedMaskSize = framebuffer->red_mask_size;
- binfo.Framebuffer[i].RedMaskShift = framebuffer->red_mask_shift;
- binfo.Framebuffer[i].GreenMaskSize = framebuffer->green_mask_size;
- binfo.Framebuffer[i].GreenMaskShift = framebuffer->green_mask_shift;
- binfo.Framebuffer[i].BlueMaskSize = framebuffer->blue_mask_size;
- binfo.Framebuffer[i].BlueMaskShift = framebuffer->blue_mask_shift;
- binfo.Framebuffer[i].ExtendedDisplayIdentificationData = framebuffer->edid;
- binfo.Framebuffer[i].EDIDSize = framebuffer->edid_size;
+ for (uint64_t i = 0; i < FrameBufferResponse->framebuffer_count; i++)
+ {
+ struct limine_framebuffer *framebuffer = FrameBufferResponse->framebuffers[i];
+ switch (framebuffer->memory_model)
+ {
+ case LIMINE_FRAMEBUFFER_RGB:
+ binfo.Framebuffer[i].Type = RGB;
+ break;
+ default:
+ {
+ error("Unsupported framebuffer memory model %d", framebuffer->memory_model);
+ inf_loop asmv("hlt");
+ }
+ }
+ binfo.Framebuffer[i].BaseAddress = (void *)((uintptr_t)framebuffer->address - 0xFFFF800000000000);
+ binfo.Framebuffer[i].Width = (uint32_t)framebuffer->width;
+ binfo.Framebuffer[i].Height = (uint32_t)framebuffer->height;
+ binfo.Framebuffer[i].Pitch = (uint32_t)framebuffer->pitch;
+ binfo.Framebuffer[i].BitsPerPixel = framebuffer->bpp;
+ binfo.Framebuffer[i].RedMaskSize = framebuffer->red_mask_size;
+ binfo.Framebuffer[i].RedMaskShift = framebuffer->red_mask_shift;
+ binfo.Framebuffer[i].GreenMaskSize = framebuffer->green_mask_size;
+ binfo.Framebuffer[i].GreenMaskShift = framebuffer->green_mask_shift;
+ binfo.Framebuffer[i].BlueMaskSize = framebuffer->blue_mask_size;
+ binfo.Framebuffer[i].BlueMaskShift = framebuffer->blue_mask_shift;
+ binfo.Framebuffer[i].ExtendedDisplayIdentificationData = framebuffer->edid;
+ binfo.Framebuffer[i].EDIDSize = framebuffer->edid_size;
- debug("Framebuffer %d: %dx%d %d bpp", i,
- binfo.Framebuffer[i].Width,
- binfo.Framebuffer[i].Height,
- binfo.Framebuffer[i].BitsPerPixel);
+ debug("Framebuffer %d: %dx%d %d bpp", i,
+ binfo.Framebuffer[i].Width,
+ binfo.Framebuffer[i].Height,
+ binfo.Framebuffer[i].BitsPerPixel);
- debug("More info:\nAddress: %#lx\nPitch: %ld\nType: %d\nRedMaskSize: %d\nRedMaskShift: %d\nGreenMaskSize: %d\nGreenMaskShift: %d\nBlueMaskSize: %d\nBlueMaskShift: %d\nEDID: %#lx\nEDIDSize: %d",
- binfo.Framebuffer[i].BaseAddress,
- binfo.Framebuffer[i].Pitch,
- binfo.Framebuffer[i].Type,
- binfo.Framebuffer[i].RedMaskSize,
- binfo.Framebuffer[i].RedMaskShift,
- binfo.Framebuffer[i].GreenMaskSize,
- binfo.Framebuffer[i].GreenMaskShift,
- binfo.Framebuffer[i].BlueMaskSize,
- binfo.Framebuffer[i].BlueMaskShift,
- binfo.Framebuffer[i].ExtendedDisplayIdentificationData,
- binfo.Framebuffer[i].EDIDSize);
- }
+ debug("More info:\nAddress: %#lx\nPitch: %ld\nType: %d\nRedMaskSize: %d\nRedMaskShift: %d\nGreenMaskSize: %d\nGreenMaskShift: %d\nBlueMaskSize: %d\nBlueMaskShift: %d\nEDID: %#lx\nEDIDSize: %d",
+ binfo.Framebuffer[i].BaseAddress,
+ binfo.Framebuffer[i].Pitch,
+ binfo.Framebuffer[i].Type,
+ binfo.Framebuffer[i].RedMaskSize,
+ binfo.Framebuffer[i].RedMaskShift,
+ binfo.Framebuffer[i].GreenMaskSize,
+ binfo.Framebuffer[i].GreenMaskShift,
+ binfo.Framebuffer[i].BlueMaskSize,
+ binfo.Framebuffer[i].BlueMaskShift,
+ binfo.Framebuffer[i].ExtendedDisplayIdentificationData,
+ binfo.Framebuffer[i].EDIDSize);
+ }
- binfo.Memory.Entries = MemmapResponse->entry_count;
- for (uint64_t i = 0; i < MemmapResponse->entry_count; i++)
- {
- if (MemmapResponse->entry_count > MAX_MEMORY_ENTRIES)
- {
- warn("Too many memory entries, skipping the rest...");
- break;
- }
+ binfo.Memory.Entries = MemmapResponse->entry_count;
+ for (uint64_t i = 0; i < MemmapResponse->entry_count; i++)
+ {
+ if (MemmapResponse->entry_count > MAX_MEMORY_ENTRIES)
+ {
+ warn("Too many memory entries, skipping the rest...");
+ break;
+ }
- struct limine_memmap_entry *entry = MemmapResponse->entries[i];
- if (!entry)
- {
- warn("Null memory entry %ld (%#lx), skipping...", i, entry);
- continue;
- }
+ struct limine_memmap_entry *entry = MemmapResponse->entries[i];
+ if (!entry)
+ {
+ warn("Null memory entry %ld (%#lx), skipping...", i, entry);
+ continue;
+ }
- binfo.Memory.Size += entry->length;
- switch (entry->type)
- {
- case LIMINE_MEMMAP_USABLE:
- binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
- binfo.Memory.Entry[i].Length = entry->length;
- binfo.Memory.Entry[i].Type = Usable;
- break;
- case LIMINE_MEMMAP_RESERVED:
- binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
- binfo.Memory.Entry[i].Length = entry->length;
- binfo.Memory.Entry[i].Type = Reserved;
- break;
- case LIMINE_MEMMAP_ACPI_RECLAIMABLE:
- binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
- binfo.Memory.Entry[i].Length = entry->length;
- binfo.Memory.Entry[i].Type = ACPIReclaimable;
- break;
- case LIMINE_MEMMAP_ACPI_NVS:
- binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
- binfo.Memory.Entry[i].Length = entry->length;
- binfo.Memory.Entry[i].Type = ACPINVS;
- break;
- case LIMINE_MEMMAP_BAD_MEMORY:
- binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
- binfo.Memory.Entry[i].Length = entry->length;
- binfo.Memory.Entry[i].Type = BadMemory;
- break;
- case LIMINE_MEMMAP_BOOTLOADER_RECLAIMABLE:
- binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
- binfo.Memory.Entry[i].Length = entry->length;
- binfo.Memory.Entry[i].Type = BootloaderReclaimable;
- break;
- case LIMINE_MEMMAP_KERNEL_AND_MODULES:
- binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
- binfo.Memory.Entry[i].Length = entry->length;
- binfo.Memory.Entry[i].Type = KernelAndModules;
- break;
- case LIMINE_MEMMAP_FRAMEBUFFER:
- binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
- binfo.Memory.Entry[i].Length = entry->length;
- binfo.Memory.Entry[i].Type = Framebuffer;
- break;
- default:
- binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
- binfo.Memory.Entry[i].Length = entry->length;
- binfo.Memory.Entry[i].Type = Unknown;
- break;
- }
- }
+ binfo.Memory.Size += entry->length;
+ switch (entry->type)
+ {
+ case LIMINE_MEMMAP_USABLE:
+ binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
+ binfo.Memory.Entry[i].Length = entry->length;
+ binfo.Memory.Entry[i].Type = Usable;
+ break;
+ case LIMINE_MEMMAP_RESERVED:
+ binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
+ binfo.Memory.Entry[i].Length = entry->length;
+ binfo.Memory.Entry[i].Type = Reserved;
+ break;
+ case LIMINE_MEMMAP_ACPI_RECLAIMABLE:
+ binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
+ binfo.Memory.Entry[i].Length = entry->length;
+ binfo.Memory.Entry[i].Type = ACPIReclaimable;
+ break;
+ case LIMINE_MEMMAP_ACPI_NVS:
+ binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
+ binfo.Memory.Entry[i].Length = entry->length;
+ binfo.Memory.Entry[i].Type = ACPINVS;
+ break;
+ case LIMINE_MEMMAP_BAD_MEMORY:
+ binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
+ binfo.Memory.Entry[i].Length = entry->length;
+ binfo.Memory.Entry[i].Type = BadMemory;
+ break;
+ case LIMINE_MEMMAP_BOOTLOADER_RECLAIMABLE:
+ binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
+ binfo.Memory.Entry[i].Length = entry->length;
+ binfo.Memory.Entry[i].Type = BootloaderReclaimable;
+ break;
+ case LIMINE_MEMMAP_KERNEL_AND_MODULES:
+ binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
+ binfo.Memory.Entry[i].Length = entry->length;
+ binfo.Memory.Entry[i].Type = KernelAndModules;
+ break;
+ case LIMINE_MEMMAP_FRAMEBUFFER:
+ binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
+ binfo.Memory.Entry[i].Length = entry->length;
+ binfo.Memory.Entry[i].Type = Framebuffer;
+ break;
+ default:
+ binfo.Memory.Entry[i].BaseAddress = (void *)entry->base;
+ binfo.Memory.Entry[i].Length = entry->length;
+ binfo.Memory.Entry[i].Type = Unknown;
+ break;
+ }
+ }
- if (ModuleResponse != NULL && ModuleResponse->module_count > 0)
- {
- for (uint64_t i = 0; i < ModuleResponse->module_count; i++)
- {
- if (i > MAX_MODULES)
- {
- warn("Too many modules, skipping the rest...");
- break;
- }
+ if (ModuleResponse != NULL && ModuleResponse->module_count > 0)
+ {
+ for (uint64_t i = 0; i < ModuleResponse->module_count; i++)
+ {
+ if (i > MAX_MODULES)
+ {
+ warn("Too many modules, skipping the rest...");
+ break;
+ }
- binfo.Modules[i].Address = (void *)((uint64_t)ModuleResponse->modules[i]->address - 0xFFFF800000000000);
- binfo.Modules[i].Size = ModuleResponse->modules[i]->size;
+ binfo.Modules[i].Address = (void *)((uint64_t)ModuleResponse->modules[i]->address - 0xFFFF800000000000);
+ binfo.Modules[i].Size = ModuleResponse->modules[i]->size;
- strncpy(binfo.Modules[i].Path,
- ModuleResponse->modules[i]->path,
- strlen(ModuleResponse->modules[i]->path) + 1);
+ strncpy(binfo.Modules[i].Path,
+ ModuleResponse->modules[i]->path,
+ strlen(ModuleResponse->modules[i]->path) + 1);
- strncpy(binfo.Modules[i].CommandLine,
- ModuleResponse->modules[i]->cmdline,
- strlen(ModuleResponse->modules[i]->cmdline) + 1);
+ strncpy(binfo.Modules[i].CommandLine,
+ ModuleResponse->modules[i]->cmdline,
+ strlen(ModuleResponse->modules[i]->cmdline) + 1);
- debug("Module %d:\nAddress: %#lx\nPath: \"%s\"\nCommand Line: \"%s\"\nSize: %ld",
- i,
- binfo.Modules[i].Address,
- binfo.Modules[i].Path,
- binfo.Modules[i].CommandLine,
- binfo.Modules[i].Size);
- }
- }
+ debug("Module %d:\nAddress: %#lx\nPath: \"%s\"\nCommand Line: \"%s\"\nSize: %ld",
+ i,
+ binfo.Modules[i].Address,
+ binfo.Modules[i].Path,
+ binfo.Modules[i].CommandLine,
+ binfo.Modules[i].Size);
+ }
+ }
- binfo.RSDP = (struct RSDPInfo *)((uintptr_t)RsdpResponse->address - 0xFFFF800000000000);
- debug("RSDP: %#lx [Signature: \"%.8s\"] [OEM: \"%.6s\"]",
- binfo.RSDP, binfo.RSDP->Signature, binfo.RSDP->OEMID);
+ binfo.RSDP = (struct RSDPInfo *)((uintptr_t)RsdpResponse->address - 0xFFFF800000000000);
+ debug("RSDP: %#lx [Signature: \"%.8s\"] [OEM: \"%.6s\"]",
+ binfo.RSDP, binfo.RSDP->Signature, binfo.RSDP->OEMID);
- if (SmbiosResponse->entry_64 != NULL)
- binfo.SMBIOSPtr = (void *)((uintptr_t)SmbiosResponse->entry_64 - 0xFFFF800000000000);
- else if (SmbiosResponse->entry_32 != NULL)
- binfo.SMBIOSPtr = (void *)((uintptr_t)SmbiosResponse->entry_32 - 0xFFFF800000000000);
- else
- binfo.SMBIOSPtr = NULL;
- debug("SMBIOS: %#lx %#lx (binfo: %#lx)",
- SmbiosResponse->entry_32,
- SmbiosResponse->entry_64,
- binfo.SMBIOSPtr);
+ if (SmbiosResponse->entry_64 != NULL)
+ binfo.SMBIOSPtr = (void *)((uintptr_t)SmbiosResponse->entry_64 - 0xFFFF800000000000);
+ else if (SmbiosResponse->entry_32 != NULL)
+ binfo.SMBIOSPtr = (void *)((uintptr_t)SmbiosResponse->entry_32 - 0xFFFF800000000000);
+ else
+ binfo.SMBIOSPtr = NULL;
+ debug("SMBIOS: %#lx %#lx (binfo: %#lx)",
+ SmbiosResponse->entry_32,
+ SmbiosResponse->entry_64,
+ binfo.SMBIOSPtr);
- binfo.Kernel.PhysicalBase = (void *)KernelAddressResponse->physical_base;
- binfo.Kernel.VirtualBase = (void *)KernelAddressResponse->virtual_base;
- binfo.Kernel.FileBase = (void *)((uintptr_t)KernelFileResponse->kernel_file->address - 0xFFFF800000000000);
- binfo.Kernel.Size = KernelFileResponse->kernel_file->size;
+ binfo.Kernel.PhysicalBase = (void *)KernelAddressResponse->physical_base;
+ binfo.Kernel.VirtualBase = (void *)KernelAddressResponse->virtual_base;
+ binfo.Kernel.FileBase = (void *)((uintptr_t)KernelFileResponse->kernel_file->address - 0xFFFF800000000000);
+ binfo.Kernel.Size = KernelFileResponse->kernel_file->size;
- strncpy(binfo.Kernel.CommandLine,
- KernelFileResponse->kernel_file->cmdline,
- strlen(KernelFileResponse->kernel_file->cmdline) + 1);
+ strncpy(binfo.Kernel.CommandLine,
+ KernelFileResponse->kernel_file->cmdline,
+ strlen(KernelFileResponse->kernel_file->cmdline) + 1);
- debug("Kernel physical address: %#lx", binfo.Kernel.PhysicalBase);
- debug("Kernel virtual address: %#lx", binfo.Kernel.VirtualBase);
+ debug("Kernel physical address: %#lx", binfo.Kernel.PhysicalBase);
+ debug("Kernel virtual address: %#lx", binfo.Kernel.VirtualBase);
- strncpy(binfo.Bootloader.Name,
- BootloaderInfoResponse->name,
- strlen(BootloaderInfoResponse->name) + 1);
+ strncpy(binfo.Bootloader.Name,
+ BootloaderInfoResponse->name,
+ strlen(BootloaderInfoResponse->name) + 1);
- strncpy(binfo.Bootloader.Version,
- BootloaderInfoResponse->version,
- strlen(BootloaderInfoResponse->version) + 1);
+ strncpy(binfo.Bootloader.Version,
+ BootloaderInfoResponse->version,
+ strlen(BootloaderInfoResponse->version) + 1);
- Entry(&binfo);
+ Entry(&binfo);
}
diff --git a/Architecture/amd64/Bootstrap/Multiboot/1/Header.s b/Architecture/amd64/Bootstrap/Multiboot/1/Header.s
index 81fce85a..56fff329 100644
--- a/Architecture/amd64/Bootstrap/Multiboot/1/Header.s
+++ b/Architecture/amd64/Bootstrap/Multiboot/1/Header.s
@@ -18,7 +18,7 @@
.intel_syntax noprefix
.code32
-.section .multiboot
+.section .multiboot, "a"
.align 4
MULTIBOOT_HEADER:
diff --git a/Architecture/amd64/Bootstrap/Multiboot/1/Start.s b/Architecture/amd64/Bootstrap/Multiboot/1/Start.s
index 8efbeb24..8d2b2352 100644
--- a/Architecture/amd64/Bootstrap/Multiboot/1/Start.s
+++ b/Architecture/amd64/Bootstrap/Multiboot/1/Start.s
@@ -16,7 +16,7 @@
*/
.code32
-.section .bootstrap.text
+.section .bootstrap.text, "a"
.global Multiboot1_start
Multiboot1_start:
diff --git a/Architecture/amd64/Bootstrap/Multiboot/2/Detect.s b/Architecture/amd64/Bootstrap/Multiboot/2/Detect.s
index cda5c35b..2895b2e2 100644
--- a/Architecture/amd64/Bootstrap/Multiboot/2/Detect.s
+++ b/Architecture/amd64/Bootstrap/Multiboot/2/Detect.s
@@ -18,7 +18,7 @@
.intel_syntax noprefix
.code32
-.section .bootstrap.text
+.section .bootstrap.text, "a"
.global DetectCPUID
DetectCPUID:
diff --git a/Architecture/amd64/Bootstrap/Multiboot/2/GDT32.s b/Architecture/amd64/Bootstrap/Multiboot/2/GDT32.s
index 85fe29e2..2509ccdb 100644
--- a/Architecture/amd64/Bootstrap/Multiboot/2/GDT32.s
+++ b/Architecture/amd64/Bootstrap/Multiboot/2/GDT32.s
@@ -16,7 +16,7 @@
*/
.code32
-.section .bootstrap.text
+.section .bootstrap.text, "a"
.align 32
.global gdtr
diff --git a/Architecture/amd64/Bootstrap/Multiboot/2/GDT64.s b/Architecture/amd64/Bootstrap/Multiboot/2/GDT64.s
index f62ec98e..511355d5 100644
--- a/Architecture/amd64/Bootstrap/Multiboot/2/GDT64.s
+++ b/Architecture/amd64/Bootstrap/Multiboot/2/GDT64.s
@@ -16,7 +16,7 @@
*/
.code64
-.section .bootstrap.data
+.section .bootstrap.data, "a"
/* Access bits */
A = 0x1
diff --git a/Architecture/amd64/Bootstrap/Multiboot/2/Header.s b/Architecture/amd64/Bootstrap/Multiboot/2/Header.s
index 2ec235b5..05fb42eb 100644
--- a/Architecture/amd64/Bootstrap/Multiboot/2/Header.s
+++ b/Architecture/amd64/Bootstrap/Multiboot/2/Header.s
@@ -19,7 +19,7 @@
.extern Multiboot2_start
/* https://www.gnu.org/software/grub/manual/multiboot2/multiboot.html */
-.section .multiboot2
+.section .multiboot2, "a"
.align 0x1000
MULTIBOOT2_HEADER_START:
.long 0xE85250D6
diff --git a/Architecture/amd64/Bootstrap/Multiboot/2/Multiboot64bitMap.cpp b/Architecture/amd64/Bootstrap/Multiboot/2/Multiboot64bitMap.cpp
index cd5b2942..337a8310 100644
--- a/Architecture/amd64/Bootstrap/Multiboot/2/Multiboot64bitMap.cpp
+++ b/Architecture/amd64/Bootstrap/Multiboot/2/Multiboot64bitMap.cpp
@@ -19,140 +19,140 @@
union __attribute__((packed)) PageTableEntry
{
- struct
- {
- bool Present : 1; // 0
- bool ReadWrite : 1; // 1
- bool UserSupervisor : 1; // 2
- bool WriteThrough : 1; // 3
- bool CacheDisable : 1; // 4
- bool Accessed : 1; // 5
- bool Dirty : 1; // 6
- bool PageAttributeTable : 1; // 7
- bool Global : 1; // 8
- uint8_t Available0 : 3; // 9-11
- uint64_t Address : 40; // 12-51
- uint32_t Available1 : 7; // 52-58
- uint8_t ProtectionKey : 4; // 59-62
- bool ExecuteDisable : 1; // 63
- };
- uint64_t raw;
+ struct
+ {
+ bool Present : 1; // 0
+ bool ReadWrite : 1; // 1
+ bool UserSupervisor : 1; // 2
+ bool WriteThrough : 1; // 3
+ bool CacheDisable : 1; // 4
+ bool Accessed : 1; // 5
+ bool Dirty : 1; // 6
+ bool PageAttributeTable : 1; // 7
+ bool Global : 1; // 8
+ uint8_t Available0 : 3; // 9-11
+ uint64_t Address : 40; // 12-51
+ uint32_t Available1 : 7; // 52-58
+ uint8_t ProtectionKey : 4; // 59-62
+ bool ExecuteDisable : 1; // 63
+ };
+ uint64_t raw;
- __always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
- {
- _Address &= 0x000000FFFFFFFFFF;
- this->raw &= 0xFFF0000000000FFF;
- this->raw |= (_Address << 12);
- }
+ __always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
+ {
+ _Address &= 0x000000FFFFFFFFFF;
+ this->raw &= 0xFFF0000000000FFF;
+ this->raw |= (_Address << 12);
+ }
- __always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
+ __always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
};
struct __attribute__((packed)) PageTableEntryPtr
{
- PageTableEntry Entries[512];
+ PageTableEntry Entries[512];
};
union __attribute__((packed)) PageDirectoryEntry
{
- struct
- {
- bool Present : 1; // 0
- bool ReadWrite : 1; // 1
- bool UserSupervisor : 1; // 2
- bool WriteThrough : 1; // 3
- bool CacheDisable : 1; // 4
- bool Accessed : 1; // 5
- bool Available0 : 1; // 6
- bool PageSize : 1; // 7
- uint8_t Available1 : 4; // 8-11
- uint64_t Address : 40; // 12-51
- uint32_t Available2 : 11; // 52-62
- bool ExecuteDisable : 1; // 63
- };
- uint64_t raw;
+ struct
+ {
+ bool Present : 1; // 0
+ bool ReadWrite : 1; // 1
+ bool UserSupervisor : 1; // 2
+ bool WriteThrough : 1; // 3
+ bool CacheDisable : 1; // 4
+ bool Accessed : 1; // 5
+ bool Available0 : 1; // 6
+ bool PageSize : 1; // 7
+ uint8_t Available1 : 4; // 8-11
+ uint64_t Address : 40; // 12-51
+ uint32_t Available2 : 11; // 52-62
+ bool ExecuteDisable : 1; // 63
+ };
+ uint64_t raw;
- __always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
- {
- _Address &= 0x000000FFFFFFFFFF;
- this->raw &= 0xFFF0000000000FFF;
- this->raw |= (_Address << 12);
- }
+ __always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
+ {
+ _Address &= 0x000000FFFFFFFFFF;
+ this->raw &= 0xFFF0000000000FFF;
+ this->raw |= (_Address << 12);
+ }
- __always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
+ __always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
};
struct __attribute__((packed)) PageDirectoryEntryPtr
{
- PageDirectoryEntry Entries[512];
+ PageDirectoryEntry Entries[512];
};
union __attribute__((packed)) PageDirectoryPointerTableEntry
{
- struct
- {
- bool Present : 1; // 0
- bool ReadWrite : 1; // 1
- bool UserSupervisor : 1; // 2
- bool WriteThrough : 1; // 3
- bool CacheDisable : 1; // 4
- bool Accessed : 1; // 5
- bool Available0 : 1; // 6
- bool PageSize : 1; // 7
- uint8_t Available1 : 4; // 8-11
- uint64_t Address : 40; // 12-51
- uint32_t Available2 : 11; // 52-62
- bool ExecuteDisable : 1; // 63
- };
- uint64_t raw;
+ struct
+ {
+ bool Present : 1; // 0
+ bool ReadWrite : 1; // 1
+ bool UserSupervisor : 1; // 2
+ bool WriteThrough : 1; // 3
+ bool CacheDisable : 1; // 4
+ bool Accessed : 1; // 5
+ bool Available0 : 1; // 6
+ bool PageSize : 1; // 7
+ uint8_t Available1 : 4; // 8-11
+ uint64_t Address : 40; // 12-51
+ uint32_t Available2 : 11; // 52-62
+ bool ExecuteDisable : 1; // 63
+ };
+ uint64_t raw;
- __always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
- {
- _Address &= 0x000000FFFFFFFFFF;
- this->raw &= 0xFFF0000000000FFF;
- this->raw |= (_Address << 12);
- }
+ __always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
+ {
+ _Address &= 0x000000FFFFFFFFFF;
+ this->raw &= 0xFFF0000000000FFF;
+ this->raw |= (_Address << 12);
+ }
- __always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
+ __always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
};
struct __attribute__((packed)) PageDirectoryPointerTableEntryPtr
{
- PageDirectoryPointerTableEntry Entries[512];
+ PageDirectoryPointerTableEntry Entries[512];
};
union __attribute__((packed)) PageMapLevel4
{
- struct
- {
- bool Present : 1; // 0
- bool ReadWrite : 1; // 1
- bool UserSupervisor : 1; // 2
- bool WriteThrough : 1; // 3
- bool CacheDisable : 1; // 4
- bool Accessed : 1; // 5
- bool Available0 : 1; // 6
- bool Reserved0 : 1; // 7
- uint8_t Available1 : 4; // 8-11
- uint64_t Address : 40; // 12-51
- uint32_t Available2 : 11; // 52-62
- bool ExecuteDisable : 1; // 63
- };
- uint64_t raw;
+ struct
+ {
+ bool Present : 1; // 0
+ bool ReadWrite : 1; // 1
+ bool UserSupervisor : 1; // 2
+ bool WriteThrough : 1; // 3
+ bool CacheDisable : 1; // 4
+ bool Accessed : 1; // 5
+ bool Available0 : 1; // 6
+ bool Reserved0 : 1; // 7
+ uint8_t Available1 : 4; // 8-11
+ uint64_t Address : 40; // 12-51
+ uint32_t Available2 : 11; // 52-62
+ bool ExecuteDisable : 1; // 63
+ };
+ uint64_t raw;
- __always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
- {
- _Address &= 0x000000FFFFFFFFFF;
- this->raw &= 0xFFF0000000000FFF;
- this->raw |= (_Address << 12);
- }
+ __always_inline inline SafeFunction NIF void SetAddress(uintptr_t _Address)
+ {
+ _Address &= 0x000000FFFFFFFFFF;
+ this->raw &= 0xFFF0000000000FFF;
+ this->raw |= (_Address << 12);
+ }
- __always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
+ __always_inline inline SafeFunction NIF uintptr_t GetAddress() { return (this->raw & 0x000FFFFFFFFFF000) >> 12; }
};
struct PageTable4
{
- PageMapLevel4 Entries[512];
+ PageMapLevel4 Entries[512];
} __attribute__((aligned(0x1000)));
extern "C" char BootPageTable[];
@@ -163,139 +163,139 @@ __attribute__((section(".bootstrap.data"))) static size_t BPT_Allocated = 0x4000
__always_inline inline SafeFunction NIF void *RequestPage()
{
- void *Page = (void *)(BootPageTable + BPT_Allocated);
- BPT_Allocated += 0x1000;
- if (BPT_Allocated >= 0x10000) /* The length of BootPageTable */
- {
- while (true)
- ;
- }
- return Page;
+ void *Page = (void *)(BootPageTable + BPT_Allocated);
+ BPT_Allocated += 0x1000;
+ if (BPT_Allocated >= 0x10000) /* The length of BootPageTable */
+ {
+ while (true)
+ ;
+ }
+ return Page;
}
class PageMapIndexer
{
public:
- uintptr_t PMLIndex = 0;
- uintptr_t PDPTEIndex = 0;
- uintptr_t PDEIndex = 0;
- uintptr_t PTEIndex = 0;
- __always_inline inline SafeFunction NIF PageMapIndexer(uintptr_t VirtualAddress)
- {
- uintptr_t Address = VirtualAddress;
- Address >>= 12;
- this->PTEIndex = Address & 0x1FF;
- Address >>= 9;
- this->PDEIndex = Address & 0x1FF;
- Address >>= 9;
- this->PDPTEIndex = Address & 0x1FF;
- Address >>= 9;
- this->PMLIndex = Address & 0x1FF;
- }
+ uintptr_t PMLIndex = 0;
+ uintptr_t PDPTEIndex = 0;
+ uintptr_t PDEIndex = 0;
+ uintptr_t PTEIndex = 0;
+ __always_inline inline SafeFunction NIF PageMapIndexer(uintptr_t VirtualAddress)
+ {
+ uintptr_t Address = VirtualAddress;
+ Address >>= 12;
+ this->PTEIndex = Address & 0x1FF;
+ Address >>= 9;
+ this->PDEIndex = Address & 0x1FF;
+ Address >>= 9;
+ this->PDPTEIndex = Address & 0x1FF;
+ Address >>= 9;
+ this->PMLIndex = Address & 0x1FF;
+ }
};
__attribute__((section(".bootstrap.text"))) SafeFunction NIF void MB2_64_Map(void *VirtualAddress, void *PhysicalAddress, uint64_t Flags)
{
- PageMapIndexer Index = PageMapIndexer((uintptr_t)VirtualAddress);
- // Clear any flags that are not 1 << 0 (Present) - 1 << 5 (Accessed) because rest are for page table entries only
- uint64_t DirectoryFlags = Flags & 0x3F;
+ PageMapIndexer Index = PageMapIndexer((uintptr_t)VirtualAddress);
+ // Clear any flags that are not 1 << 0 (Present) - 1 << 5 (Accessed) because rest are for page table entries only
+ uint64_t DirectoryFlags = Flags & 0x3F;
- PageMapLevel4 PML4 = BPTable->Entries[Index.PMLIndex];
- PageDirectoryPointerTableEntryPtr *PDPTEPtr = nullptr;
- if (!PML4.Present)
- {
- PDPTEPtr = (PageDirectoryPointerTableEntryPtr *)RequestPage();
- if (PDPTEPtr == nullptr)
- return;
- {
- void *ptr = PDPTEPtr;
- uint8_t value = 0;
- size_t num = 0x1000;
- uint8_t *p = (uint8_t *)ptr;
- for (size_t i = 0; i < num; i++)
- p[i] = value;
- }
- PML4.Present = true;
- PML4.SetAddress((uintptr_t)PDPTEPtr >> 12);
- }
- else
- PDPTEPtr = (PageDirectoryPointerTableEntryPtr *)((uintptr_t)PML4.GetAddress() << 12);
- PML4.raw |= DirectoryFlags;
- BPTable->Entries[Index.PMLIndex] = PML4;
+ PageMapLevel4 PML4 = BPTable->Entries[Index.PMLIndex];
+ PageDirectoryPointerTableEntryPtr *PDPTEPtr = nullptr;
+ if (!PML4.Present)
+ {
+ PDPTEPtr = (PageDirectoryPointerTableEntryPtr *)RequestPage();
+ if (PDPTEPtr == nullptr)
+ return;
+ {
+ void *ptr = PDPTEPtr;
+ uint8_t value = 0;
+ size_t num = 0x1000;
+ uint8_t *p = (uint8_t *)ptr;
+ for (size_t i = 0; i < num; i++)
+ p[i] = value;
+ }
+ PML4.Present = true;
+ PML4.SetAddress((uintptr_t)PDPTEPtr >> 12);
+ }
+ else
+ PDPTEPtr = (PageDirectoryPointerTableEntryPtr *)((uintptr_t)PML4.GetAddress() << 12);
+ PML4.raw |= DirectoryFlags;
+ BPTable->Entries[Index.PMLIndex] = PML4;
- PageDirectoryPointerTableEntry PDPTE = PDPTEPtr->Entries[Index.PDPTEIndex];
- PageDirectoryEntryPtr *PDEPtr = nullptr;
- if (!PDPTE.Present)
- {
- PDEPtr = (PageDirectoryEntryPtr *)RequestPage();
- if (PDEPtr == nullptr)
- return;
- {
- void *ptr = PDEPtr;
- uint8_t value = 0;
- size_t num = 0x1000;
- uint8_t *p = (uint8_t *)ptr;
- for (size_t i = 0; i < num; i++)
- p[i] = value;
- }
- PDPTE.Present = true;
- PDPTE.SetAddress((uintptr_t)PDEPtr >> 12);
- }
- else
- PDEPtr = (PageDirectoryEntryPtr *)((uintptr_t)PDPTE.GetAddress() << 12);
- PDPTE.raw |= DirectoryFlags;
- PDPTEPtr->Entries[Index.PDPTEIndex] = PDPTE;
+ PageDirectoryPointerTableEntry PDPTE = PDPTEPtr->Entries[Index.PDPTEIndex];
+ PageDirectoryEntryPtr *PDEPtr = nullptr;
+ if (!PDPTE.Present)
+ {
+ PDEPtr = (PageDirectoryEntryPtr *)RequestPage();
+ if (PDEPtr == nullptr)
+ return;
+ {
+ void *ptr = PDEPtr;
+ uint8_t value = 0;
+ size_t num = 0x1000;
+ uint8_t *p = (uint8_t *)ptr;
+ for (size_t i = 0; i < num; i++)
+ p[i] = value;
+ }
+ PDPTE.Present = true;
+ PDPTE.SetAddress((uintptr_t)PDEPtr >> 12);
+ }
+ else
+ PDEPtr = (PageDirectoryEntryPtr *)((uintptr_t)PDPTE.GetAddress() << 12);
+ PDPTE.raw |= DirectoryFlags;
+ PDPTEPtr->Entries[Index.PDPTEIndex] = PDPTE;
- PageDirectoryEntry PDE = PDEPtr->Entries[Index.PDEIndex];
- PageTableEntryPtr *PTEPtr = nullptr;
- if (!PDE.Present)
- {
- PTEPtr = (PageTableEntryPtr *)RequestPage();
- if (PTEPtr == nullptr)
- return;
- {
- void *ptr = PTEPtr;
- uint8_t value = 0;
- size_t num = 0x1000;
- uint8_t *p = (uint8_t *)ptr;
- for (size_t i = 0; i < num; i++)
- p[i] = value;
- }
- PDE.Present = true;
- PDE.SetAddress((uintptr_t)PTEPtr >> 12);
- }
- else
- PTEPtr = (PageTableEntryPtr *)((uintptr_t)PDE.GetAddress() << 12);
- PDE.raw |= DirectoryFlags;
- PDEPtr->Entries[Index.PDEIndex] = PDE;
+ PageDirectoryEntry PDE = PDEPtr->Entries[Index.PDEIndex];
+ PageTableEntryPtr *PTEPtr = nullptr;
+ if (!PDE.Present)
+ {
+ PTEPtr = (PageTableEntryPtr *)RequestPage();
+ if (PTEPtr == nullptr)
+ return;
+ {
+ void *ptr = PTEPtr;
+ uint8_t value = 0;
+ size_t num = 0x1000;
+ uint8_t *p = (uint8_t *)ptr;
+ for (size_t i = 0; i < num; i++)
+ p[i] = value;
+ }
+ PDE.Present = true;
+ PDE.SetAddress((uintptr_t)PTEPtr >> 12);
+ }
+ else
+ PTEPtr = (PageTableEntryPtr *)((uintptr_t)PDE.GetAddress() << 12);
+ PDE.raw |= DirectoryFlags;
+ PDEPtr->Entries[Index.PDEIndex] = PDE;
- PageTableEntry PTE = PTEPtr->Entries[Index.PTEIndex];
- PTE.Present = true;
- PTE.raw |= Flags;
- PTE.SetAddress((uintptr_t)PhysicalAddress >> 12);
- PTEPtr->Entries[Index.PTEIndex] = PTE;
- asmv("invlpg (%0)"
- :
- : "r"(VirtualAddress)
- : "memory");
+ PageTableEntry PTE = PTEPtr->Entries[Index.PTEIndex];
+ PTE.Present = true;
+ PTE.raw |= Flags;
+ PTE.SetAddress((uintptr_t)PhysicalAddress >> 12);
+ PTEPtr->Entries[Index.PTEIndex] = PTE;
+ asmv("invlpg (%0)"
+ :
+ : "r"(VirtualAddress)
+ : "memory");
}
EXTERNC __attribute__((section(".bootstrap.text"))) SafeFunction NIF __attribute__((section(".bootstrap.text"))) void UpdatePageTable64()
{
- BPTable = (PageTable4 *)BootPageTable;
+ BPTable = (PageTable4 *)BootPageTable;
- uintptr_t KernelStart = (uintptr_t)&_kernel_start;
- uintptr_t KernelEnd = (uintptr_t)&_kernel_end;
- uintptr_t PhysicalStart = KernelStart - 0xFFFFFFFF80000000;
- for (uintptr_t i = KernelStart; i < KernelEnd; i += 0x1000)
- {
- MB2_64_Map((void *)i, (void *)PhysicalStart, 0x3);
- PhysicalStart += 0x1000;
- }
+ uintptr_t KernelStart = (uintptr_t)&_kernel_start;
+ uintptr_t KernelEnd = (uintptr_t)&_kernel_end;
+ uintptr_t PhysicalStart = KernelStart - 0xFFFFFFFF80000000;
+ for (uintptr_t i = KernelStart; i < KernelEnd; i += 0x1000)
+ {
+ MB2_64_Map((void *)i, (void *)PhysicalStart, 0x3);
+ PhysicalStart += 0x1000;
+ }
- asmv("mov %%cr3, %%rax\n"
- "mov %%rax, %%cr3\n"
- :
- :
- : "rax");
+ asmv("mov %%cr3, %%rax\n"
+ "mov %%rax, %%cr3\n"
+ :
+ :
+ : "rax");
}
diff --git a/Architecture/amd64/Bootstrap/Multiboot/2/Multiboot_PageTable.s b/Architecture/amd64/Bootstrap/Multiboot/2/Multiboot_PageTable.s
index 596f6355..b2d8643f 100644
--- a/Architecture/amd64/Bootstrap/Multiboot/2/Multiboot_PageTable.s
+++ b/Architecture/amd64/Bootstrap/Multiboot/2/Multiboot_PageTable.s
@@ -18,13 +18,13 @@
PAGE_TABLE_SIZE = 0x4
.code32
-.section .bootstrap.data
+.section .bootstrap.data, "a"
.align 0x1000
.global BootPageTable
BootPageTable:
.space 0x10000 /* 0x4000 bytes will be used in UpdatePageTable */
-.section .bootstrap.text
+.section .bootstrap.text, "a"
.global UpdatePageTable
UpdatePageTable:
mov $(BootPageTable + 0x0000), %edi /* First PML4E */
diff --git a/Architecture/amd64/Bootstrap/Multiboot/2/Start.s b/Architecture/amd64/Bootstrap/Multiboot/2/Start.s
index c9965c6d..2bfb9562 100644
--- a/Architecture/amd64/Bootstrap/Multiboot/2/Start.s
+++ b/Architecture/amd64/Bootstrap/Multiboot/2/Start.s
@@ -30,14 +30,14 @@ KERNEL_STACK_SIZE = 0x4000 /* 16KB */
.extern GDT64.Code
.extern GDT64.Data
-.section .bootstrap.data
+.section .bootstrap.data, "a"
MB_HeaderMagic:
.quad 0
MB_HeaderInfo:
.quad 0
-.section .bootstrap.text
+.section .bootstrap.text, "a"
.global Multiboot2_start
Multiboot2_start:
@@ -113,7 +113,7 @@ HigherHalfStart:
hlt
jmp .Hang
-.section .bootstrap.bss
+.section .bootstrap.bss, "a"
.align 16
KernelStack:
.space KERNEL_STACK_SIZE
diff --git a/Architecture/amd64/Bootstrap/Multiboot/_start.s b/Architecture/amd64/Bootstrap/Multiboot/_start.s
index eac169c6..830391e7 100644
--- a/Architecture/amd64/Bootstrap/Multiboot/_start.s
+++ b/Architecture/amd64/Bootstrap/Multiboot/_start.s
@@ -21,7 +21,7 @@
.extern Multiboot2_start
.code32
-.section .bootstrap.text
+.section .bootstrap.text, "a"
.global _start
_start:
diff --git a/Architecture/amd64/DifferentiatedSystemDescriptionTable.cpp b/Architecture/amd64/DifferentiatedSystemDescriptionTable.cpp
index 3ca6cbbd..05fce3ec 100644
--- a/Architecture/amd64/DifferentiatedSystemDescriptionTable.cpp
+++ b/Architecture/amd64/DifferentiatedSystemDescriptionTable.cpp
@@ -36,10 +36,10 @@
namespace ACPI
{
- __always_inline inline bool IsCanonical(uint64_t Address)
- {
- return ((Address <= 0x00007FFFFFFFFFFF) || ((Address >= 0xFFFF800000000000) && (Address <= 0xFFFFFFFFFFFFFFFF)));
- }
+ __always_inline inline bool IsCanonical(uint64_t Address)
+ {
+ return ((Address <= 0x00007FFFFFFFFFFF) || ((Address >= 0xFFFF800000000000) && (Address <= 0xFFFFFFFFFFFFFFFF)));
+ }
#define ACPI_ENABLED 0x0001
#define ACPI_SLEEP 0x2000
@@ -48,208 +48,208 @@ namespace ACPI
#define ACPI_GAS_IO 1
#define ACPI_GAS_PCI 2
- void DSDT::OnInterruptReceived(CPU::x64::TrapFrame *Frame)
- {
- debug("SCI Handle Triggered");
- uint16_t Event = 0;
- {
- uint16_t a = 0, b = 0;
- if (acpi->FADT->PM1aEventBlock)
- {
- a = inw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock));
- outw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock), a);
- }
- if (acpi->FADT->PM1bEventBlock)
- {
- b = inw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock));
- outw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock), b);
- }
- Event = a | b;
- }
+ void DSDT::OnInterruptReceived(CPU::x64::TrapFrame *Frame)
+ {
+ debug("SCI Handle Triggered");
+ uint16_t Event = 0;
+ {
+ uint16_t a = 0, b = 0;
+ if (acpi->FADT->PM1aEventBlock)
+ {
+ a = inw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock));
+ outw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock), a);
+ }
+ if (acpi->FADT->PM1bEventBlock)
+ {
+ b = inw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock));
+ outw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock), b);
+ }
+ Event = a | b;
+ }
- debug("SCI Event: %#lx", Event);
- if (Event & ACPI_BUSMASTER)
- {
- fixme("ACPI Busmaster");
- }
- else if (Event & ACPI_GLOBAL)
- {
- fixme("ACPI Global");
- }
- else if (Event & ACPI_POWER_BUTTON)
- {
- if (TaskManager && !TaskManager->IsPanic())
- {
- TaskManager->CreateThread(TaskManager->CreateProcess(nullptr,
- "Shutdown",
- Tasking::TaskExecutionMode::Kernel),
- Tasking::IP(KST_Shutdown));
- }
- else
- KernelShutdownThread(false);
- }
- else if (Event & ACPI_SLEEP_BUTTON)
- {
- fixme("ACPI Sleep Button");
- }
- else if (Event & ACPI_RTC_ALARM)
- {
- fixme("ACPI RTC Alarm");
- }
- else if (Event & ACPI_PCIE_WAKE)
- {
- fixme("ACPI PCIe Wake");
- }
- else if (Event & ACPI_WAKE)
- {
- fixme("ACPI Wake");
- }
- else if (Event & ACPI_TIMER)
- {
- fixme("ACPI Timer");
- }
- else
- {
- error("ACPI unknown event %#lx on CPU %d", Event, GetCurrentCPU()->ID);
- CPU::Stop();
- }
- UNUSED(Frame);
- }
+ debug("SCI Event: %#lx", Event);
+ if (Event & ACPI_BUSMASTER)
+ {
+ fixme("ACPI Busmaster");
+ }
+ else if (Event & ACPI_GLOBAL)
+ {
+ fixme("ACPI Global");
+ }
+ else if (Event & ACPI_POWER_BUTTON)
+ {
+ if (TaskManager && !TaskManager->IsPanic())
+ {
+ TaskManager->CreateThread(TaskManager->CreateProcess(nullptr,
+ "Shutdown",
+ Tasking::TaskExecutionMode::Kernel),
+ Tasking::IP(KST_Shutdown));
+ }
+ else
+ KernelShutdownThread(false);
+ }
+ else if (Event & ACPI_SLEEP_BUTTON)
+ {
+ fixme("ACPI Sleep Button");
+ }
+ else if (Event & ACPI_RTC_ALARM)
+ {
+ fixme("ACPI RTC Alarm");
+ }
+ else if (Event & ACPI_PCIE_WAKE)
+ {
+ fixme("ACPI PCIe Wake");
+ }
+ else if (Event & ACPI_WAKE)
+ {
+ fixme("ACPI Wake");
+ }
+ else if (Event & ACPI_TIMER)
+ {
+ fixme("ACPI Timer");
+ }
+ else
+ {
+ error("ACPI unknown event %#lx on CPU %d", Event, GetCurrentCPU()->ID);
+ CPU::Stop();
+ }
+ UNUSED(Frame);
+ }
- void DSDT::Shutdown()
- {
- trace("Shutting down...");
- if (SCI_EN == 1)
- {
- outw(s_cst(uint16_t, acpi->FADT->PM1aControlBlock),
- s_cst(uint16_t,
- (inw(s_cst(uint16_t,
- acpi->FADT->PM1aControlBlock)) &
- 0xE3FF) |
- ((SLP_TYPa << 10) | ACPI_SLEEP)));
+ void DSDT::Shutdown()
+ {
+ trace("Shutting down...");
+ if (SCI_EN == 1)
+ {
+ outw(s_cst(uint16_t, acpi->FADT->PM1aControlBlock),
+ s_cst(uint16_t,
+ (inw(s_cst(uint16_t,
+ acpi->FADT->PM1aControlBlock)) &
+ 0xE3FF) |
+ ((SLP_TYPa << 10) | ACPI_SLEEP)));
- if (acpi->FADT->PM1bControlBlock)
- outw(s_cst(uint16_t, acpi->FADT->PM1bControlBlock),
- s_cst(uint16_t,
- (inw(
- s_cst(uint16_t, acpi->FADT->PM1bControlBlock)) &
- 0xE3FF) |
- ((SLP_TYPb << 10) | ACPI_SLEEP)));
+ if (acpi->FADT->PM1bControlBlock)
+ outw(s_cst(uint16_t, acpi->FADT->PM1bControlBlock),
+ s_cst(uint16_t,
+ (inw(
+ s_cst(uint16_t, acpi->FADT->PM1bControlBlock)) &
+ 0xE3FF) |
+ ((SLP_TYPb << 10) | ACPI_SLEEP)));
- outw(s_cst(uint16_t, PM1a_CNT), SLP_TYPa | SLP_EN);
- if (PM1b_CNT)
- outw(s_cst(uint16_t, PM1b_CNT), SLP_TYPb | SLP_EN);
- }
- }
+ outw(s_cst(uint16_t, PM1a_CNT), SLP_TYPa | SLP_EN);
+ if (PM1b_CNT)
+ outw(s_cst(uint16_t, PM1b_CNT), SLP_TYPb | SLP_EN);
+ }
+ }
- void DSDT::Reboot()
- {
- trace("Rebooting...");
- switch (acpi->FADT->ResetReg.AddressSpace)
- {
- case ACPI_GAS_MMIO:
- {
- *(uint8_t *)(acpi->FADT->ResetReg.Address) = acpi->FADT->ResetValue;
- break;
- }
- case ACPI_GAS_IO:
- {
- outb(s_cst(uint16_t, acpi->FADT->ResetReg.Address), acpi->FADT->ResetValue);
- break;
- }
- case ACPI_GAS_PCI:
- {
- fixme("ACPI_GAS_PCI not supported.");
- /*
- seg - 0
- bus - 0
- dev - (FADT->ResetReg.Address >> 32) & 0xFFFF
- function - (FADT->ResetReg.Address >> 16) & 0xFFFF
- offset - FADT->ResetReg.Address & 0xFFFF
- value - FADT->ResetValue
- */
- break;
- }
- default:
- {
- error("Unknown reset register address space: %d", acpi->FADT->ResetReg.AddressSpace);
- break;
- }
- }
- }
+ void DSDT::Reboot()
+ {
+ trace("Rebooting...");
+ switch (acpi->FADT->ResetReg.AddressSpace)
+ {
+ case ACPI_GAS_MMIO:
+ {
+ *(uint8_t *)(acpi->FADT->ResetReg.Address) = acpi->FADT->ResetValue;
+ break;
+ }
+ case ACPI_GAS_IO:
+ {
+ outb(s_cst(uint16_t, acpi->FADT->ResetReg.Address), acpi->FADT->ResetValue);
+ break;
+ }
+ case ACPI_GAS_PCI:
+ {
+ fixme("ACPI_GAS_PCI not supported.");
+ /*
+ seg - 0
+ bus - 0
+ dev - (FADT->ResetReg.Address >> 32) & 0xFFFF
+ function - (FADT->ResetReg.Address >> 16) & 0xFFFF
+ offset - FADT->ResetReg.Address & 0xFFFF
+ value - FADT->ResetValue
+ */
+ break;
+ }
+ default:
+ {
+ error("Unknown reset register address space: %d", acpi->FADT->ResetReg.AddressSpace);
+ break;
+ }
+ }
+ }
- DSDT::DSDT(ACPI *acpi) : Interrupts::Handler(acpi->FADT->SCI_Interrupt)
- {
- this->acpi = acpi;
- uint64_t Address = ((IsCanonical(acpi->FADT->X_Dsdt) && acpi->XSDTSupported) ? acpi->FADT->X_Dsdt : acpi->FADT->Dsdt);
- uint8_t *S5Address = (uint8_t *)(Address) + 36;
- ACPI::ACPI::ACPIHeader *Header = (ACPI::ACPI::ACPIHeader *)Address;
- size_t Length = Header->Length;
- while (Length-- > 0)
- {
- if (!memcmp(S5Address, "_S5_", 4))
- break;
- S5Address++;
- }
- if (Length <= 0)
- {
- warn("_S5 not present in ACPI");
- return;
- }
- if ((*(S5Address - 1) == 0x08 || (*(S5Address - 2) == 0x08 && *(S5Address - 1) == '\\')) && *(S5Address + 4) == 0x12)
- {
- S5Address += 5;
- S5Address += ((*S5Address & 0xC0) >> 6) + 2;
- if (*S5Address == 0x0A)
- S5Address++;
- SLP_TYPa = s_cst(uint16_t, *(S5Address) << 10);
- S5Address++;
- if (*S5Address == 0x0A)
- S5Address++;
- SLP_TYPb = s_cst(uint16_t, *(S5Address) << 10);
- SMI_CMD = acpi->FADT->SMI_CommandPort;
- ACPI_ENABLE = acpi->FADT->AcpiEnable;
- ACPI_DISABLE = acpi->FADT->AcpiDisable;
- PM1a_CNT = acpi->FADT->PM1aControlBlock;
- PM1b_CNT = acpi->FADT->PM1bControlBlock;
- PM1_CNT_LEN = acpi->FADT->PM1ControlLength;
- SLP_EN = 1 << 13;
- SCI_EN = 1;
- trace("ACPI Shutdown is supported");
- ACPIShutdownSupported = true;
+ DSDT::DSDT(ACPI *acpi) : Interrupts::Handler(acpi->FADT->SCI_Interrupt)
+ {
+ this->acpi = acpi;
+ uint64_t Address = ((IsCanonical(acpi->FADT->X_Dsdt) && acpi->XSDTSupported) ? acpi->FADT->X_Dsdt : acpi->FADT->Dsdt);
+ uint8_t *S5Address = (uint8_t *)(Address) + 36;
+ ACPI::ACPI::ACPIHeader *Header = (ACPI::ACPI::ACPIHeader *)Address;
+ size_t Length = Header->Length;
+ while (Length-- > 0)
+ {
+ if (!memcmp(S5Address, "_S5_", 4))
+ break;
+ S5Address++;
+ }
+ if (Length <= 0)
+ {
+ warn("_S5 not present in ACPI");
+ return;
+ }
+ if ((*(S5Address - 1) == 0x08 || (*(S5Address - 2) == 0x08 && *(S5Address - 1) == '\\')) && *(S5Address + 4) == 0x12)
+ {
+ S5Address += 5;
+ S5Address += ((*S5Address & 0xC0) >> 6) + 2;
+ if (*S5Address == 0x0A)
+ S5Address++;
+ SLP_TYPa = s_cst(uint16_t, *(S5Address) << 10);
+ S5Address++;
+ if (*S5Address == 0x0A)
+ S5Address++;
+ SLP_TYPb = s_cst(uint16_t, *(S5Address) << 10);
+ SMI_CMD = acpi->FADT->SMI_CommandPort;
+ ACPI_ENABLE = acpi->FADT->AcpiEnable;
+ ACPI_DISABLE = acpi->FADT->AcpiDisable;
+ PM1a_CNT = acpi->FADT->PM1aControlBlock;
+ PM1b_CNT = acpi->FADT->PM1bControlBlock;
+ PM1_CNT_LEN = acpi->FADT->PM1ControlLength;
+ SLP_EN = 1 << 13;
+ SCI_EN = 1;
+ trace("ACPI Shutdown is supported");
+ ACPIShutdownSupported = true;
- uint16_t value = ACPI_POWER_BUTTON | ACPI_SLEEP_BUTTON | ACPI_WAKE;
- {
- uint16_t a = s_cst(uint16_t, acpi->FADT->PM1aEventBlock + (acpi->FADT->PM1EventLength / 2));
- uint16_t b = s_cst(uint16_t, acpi->FADT->PM1bEventBlock + (acpi->FADT->PM1EventLength / 2));
- debug("SCI Event: %#llx [a:%#x b:%#x]", value, a, b);
- if (acpi->FADT->PM1aEventBlock)
- outw(a, value);
- if (acpi->FADT->PM1bEventBlock)
- outw(b, value);
- }
+ uint16_t value = ACPI_POWER_BUTTON | ACPI_SLEEP_BUTTON | ACPI_WAKE;
+ {
+ uint16_t a = s_cst(uint16_t, acpi->FADT->PM1aEventBlock + (acpi->FADT->PM1EventLength / 2));
+ uint16_t b = s_cst(uint16_t, acpi->FADT->PM1bEventBlock + (acpi->FADT->PM1EventLength / 2));
+ debug("SCI Event: %#llx [a:%#x b:%#x]", value, a, b);
+ if (acpi->FADT->PM1aEventBlock)
+ outw(a, value);
+ if (acpi->FADT->PM1bEventBlock)
+ outw(b, value);
+ }
- {
- uint16_t a = 0, b = 0;
- if (acpi->FADT->PM1aEventBlock)
- {
- a = inw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock));
- outw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock), a);
- }
- if (acpi->FADT->PM1bEventBlock)
- {
- b = inw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock));
- outw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock), b);
- }
- }
- ((APIC::APIC *)Interrupts::apic[0])->RedirectIRQ(0, acpi->FADT->SCI_Interrupt, 1);
- return;
- }
- warn("Failed to parse _S5 in ACPI");
- SCI_EN = 0;
- }
+ {
+ uint16_t a = 0, b = 0;
+ if (acpi->FADT->PM1aEventBlock)
+ {
+ a = inw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock));
+ outw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock), a);
+ }
+ if (acpi->FADT->PM1bEventBlock)
+ {
+ b = inw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock));
+ outw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock), b);
+ }
+ }
+ ((APIC::APIC *)Interrupts::apic[0])->RedirectIRQ(0, acpi->FADT->SCI_Interrupt, 1);
+ return;
+ }
+ warn("Failed to parse _S5 in ACPI");
+ SCI_EN = 0;
+ }
- DSDT::~DSDT()
- {
- }
+ DSDT::~DSDT()
+ {
+ }
}
diff --git a/Architecture/amd64/MultipleAPICDescriptionTable.cpp b/Architecture/amd64/MultipleAPICDescriptionTable.cpp
index 70177fc3..f1176edf 100644
--- a/Architecture/amd64/MultipleAPICDescriptionTable.cpp
+++ b/Architecture/amd64/MultipleAPICDescriptionTable.cpp
@@ -24,68 +24,68 @@
namespace ACPI
{
- MADT::MADT(ACPI::MADTHeader *madt)
- {
- trace("Initializing MADT");
- CPUCores = 0;
- LAPICAddress = (LAPIC *)(uintptr_t)madt->LocalControllerAddress;
- for (uint8_t *ptr = (uint8_t *)(madt->Entries);
- (uintptr_t)(ptr) < (uintptr_t)(madt) + madt->Header.Length;
- ptr += *(ptr + 1))
- {
- switch (*(ptr))
- {
- case 0:
- {
- if (ptr[4] & 1)
- {
- lapic.push_back((LocalAPIC *)ptr);
- KPrint("Local APIC \e8888FF%d\eCCCCCC (APIC \e8888FF%d\eCCCCCC) found.", lapic.back()->ACPIProcessorId, lapic.back()->APICId);
- CPUCores++;
- }
- break;
- }
- case 1:
- {
- ioapic.push_back((MADTIOApic *)ptr);
- KPrint("I/O APIC \e8888FF%d\eCCCCCC (Address \e8888FF%#lx\eCCCCCC) found.", ioapic.back()->APICID, ioapic.back()->Address);
- Memory::Virtual(KernelPageTable).Map((void *)(uintptr_t)ioapic.back()->Address, (void *)(uintptr_t)ioapic.back()->Address, Memory::PTFlag::RW | Memory::PTFlag::PCD); // Make sure that the address is mapped.
- break;
- }
- case 2:
- {
- iso.push_back((MADTIso *)ptr);
- KPrint("ISO (IRQ:\e8888FF%#lx\eCCCCCC, BUS:\e8888FF%#lx\eCCCCCC, GSI:\e8888FF%#lx\eCCCCCC, %s\eCCCCCC/%s\eCCCCCC) found.",
- iso.back()->IRQSource, iso.back()->BuSSource, iso.back()->GSI,
- iso.back()->Flags & 0x00000004 ? "\e1770FFActive High" : "\e475EFFActive Low",
- iso.back()->Flags & 0x00000100 ? "\e00962DEdge Triggered" : "\e008F58Level Triggered");
- break;
- }
- case 4:
- {
- nmi.push_back((MADTNmi *)ptr);
- KPrint("NMI \e8888FF%#lx\eCCCCCC (lint:\e8888FF%#lx\eCCCCCC) found.", nmi.back()->processor, nmi.back()->lint);
- break;
- }
- case 5:
- {
- LAPICAddress = (LAPIC *)ptr;
- KPrint("APIC found at \e8888FF%#lx\eCCCCCC", LAPICAddress);
- break;
- }
- default:
- {
- KPrint("Unknown MADT entry \e8888FF%#lx\eCCCCCC", *(ptr));
- break;
- }
- }
- Memory::Virtual(KernelPageTable).Map((void *)LAPICAddress, (void *)LAPICAddress, Memory::PTFlag::RW | Memory::PTFlag::PCD); // I should map more than one page?
- }
- CPUCores--; // We start at 0 (BSP) and end at 11 (APs), so we have 12 cores.
- KPrint("Total CPU cores: %d", CPUCores + 1);
- }
+ MADT::MADT(ACPI::MADTHeader *madt)
+ {
+ trace("Initializing MADT");
+ CPUCores = 0;
+ LAPICAddress = (LAPIC *)(uintptr_t)madt->LocalControllerAddress;
+ for (uint8_t *ptr = (uint8_t *)(madt->Entries);
+ (uintptr_t)(ptr) < (uintptr_t)(madt) + madt->Header.Length;
+ ptr += *(ptr + 1))
+ {
+ switch (*(ptr))
+ {
+ case 0:
+ {
+ if (ptr[4] & 1)
+ {
+ lapic.push_back((LocalAPIC *)ptr);
+ KPrint("Local APIC \e8888FF%d\eCCCCCC (APIC \e8888FF%d\eCCCCCC) found.", lapic.back()->ACPIProcessorId, lapic.back()->APICId);
+ CPUCores++;
+ }
+ break;
+ }
+ case 1:
+ {
+ ioapic.push_back((MADTIOApic *)ptr);
+ KPrint("I/O APIC \e8888FF%d\eCCCCCC (Address \e8888FF%#lx\eCCCCCC) found.", ioapic.back()->APICID, ioapic.back()->Address);
+ Memory::Virtual(KernelPageTable).Map((void *)(uintptr_t)ioapic.back()->Address, (void *)(uintptr_t)ioapic.back()->Address, Memory::PTFlag::RW | Memory::PTFlag::PCD); // Make sure that the address is mapped.
+ break;
+ }
+ case 2:
+ {
+ iso.push_back((MADTIso *)ptr);
+ KPrint("ISO (IRQ:\e8888FF%#lx\eCCCCCC, BUS:\e8888FF%#lx\eCCCCCC, GSI:\e8888FF%#lx\eCCCCCC, %s\eCCCCCC/%s\eCCCCCC) found.",
+ iso.back()->IRQSource, iso.back()->BuSSource, iso.back()->GSI,
+ iso.back()->Flags & 0x00000004 ? "\e1770FFActive High" : "\e475EFFActive Low",
+ iso.back()->Flags & 0x00000100 ? "\e00962DEdge Triggered" : "\e008F58Level Triggered");
+ break;
+ }
+ case 4:
+ {
+ nmi.push_back((MADTNmi *)ptr);
+ KPrint("NMI \e8888FF%#lx\eCCCCCC (lint:\e8888FF%#lx\eCCCCCC) found.", nmi.back()->processor, nmi.back()->lint);
+ break;
+ }
+ case 5:
+ {
+ LAPICAddress = (LAPIC *)ptr;
+ KPrint("APIC found at \e8888FF%#lx\eCCCCCC", LAPICAddress);
+ break;
+ }
+ default:
+ {
+ KPrint("Unknown MADT entry \e8888FF%#lx\eCCCCCC", *(ptr));
+ break;
+ }
+ }
+ Memory::Virtual(KernelPageTable).Map((void *)LAPICAddress, (void *)LAPICAddress, Memory::PTFlag::RW | Memory::PTFlag::PCD); // I should map more than one page?
+ }
+ CPUCores--; // We start at 0 (BSP) and end at 11 (APs), so we have 12 cores.
+ KPrint("Total CPU cores: %d", CPUCores + 1);
+ }
- MADT::~MADT()
- {
- }
+ MADT::~MADT()
+ {
+ }
}
diff --git a/Architecture/amd64/cpu/InterruptDescriptorTable.cpp b/Architecture/amd64/cpu/InterruptDescriptorTable.cpp
index 55434ae7..67114ca4 100644
--- a/Architecture/amd64/cpu/InterruptDescriptorTable.cpp
+++ b/Architecture/amd64/cpu/InterruptDescriptorTable.cpp
@@ -33,721 +33,721 @@ extern "C" void ExceptionHandler(void *Data);
namespace InterruptDescriptorTable
{
- static InterruptDescriptorTableEntry Entries[0x100];
+ static InterruptDescriptorTableEntry Entries[0x100];
- InterruptDescriptorTableDescriptor idtd = {
- .Length = sizeof(Entries) - 1,
- .Entries = Entries,
- };
+ InterruptDescriptorTableDescriptor idtd = {
+ .Length = sizeof(Entries) - 1,
+ .Entries = Entries,
+ };
- void SetEntry(uint8_t Index,
- void (*Base)(),
- InterruptStackTableType InterruptStackTable,
- InterruptGateType Gate,
- InterruptRingType Ring,
- bool Present,
- uint16_t SegmentSelector)
- {
- Entries[Index].BaseLow = s_cst(uint16_t, ((uint64_t)Base & 0xFFFF));
- Entries[Index].BaseHigh = s_cst(uint64_t, ((uint64_t)Base >> 16 /* & 0xFFFF */));
- Entries[Index].SegmentSelector = SegmentSelector;
- Entries[Index].Flags = Gate;
- Entries[Index].Reserved1 = 0;
- Entries[Index].Reserved2 = 0;
- Entries[Index].Reserved3 = 0;
- Entries[Index].InterruptStackTable = InterruptStackTable;
- Entries[Index].Ring = Ring;
- Entries[Index].Present = Present;
- }
+ void SetEntry(uint8_t Index,
+ void (*Base)(),
+ InterruptStackTableType InterruptStackTable,
+ InterruptGateType Gate,
+ InterruptRingType Ring,
+ bool Present,
+ uint16_t SegmentSelector)
+ {
+ Entries[Index].BaseLow = s_cst(uint16_t, ((uint64_t)Base & 0xFFFF));
+ Entries[Index].BaseHigh = s_cst(uint64_t, ((uint64_t)Base >> 16 /* & 0xFFFF */));
+ Entries[Index].SegmentSelector = SegmentSelector;
+ Entries[Index].Flags = Gate;
+ Entries[Index].Reserved1 = 0;
+ Entries[Index].Reserved2 = 0;
+ Entries[Index].Reserved3 = 0;
+ Entries[Index].InterruptStackTable = InterruptStackTable;
+ Entries[Index].Ring = Ring;
+ Entries[Index].Present = Present;
+ }
- extern "C" __naked __used __no_stack_protector __aligned(16) void ExceptionHandlerStub()
- {
- asm("cld\n"
- "cli\n"
+ extern "C" __naked __used __no_stack_protector __aligned(16) void ExceptionHandlerStub()
+ {
+ asm("cld\n"
+ "cli\n"
- "pushq %rax\n"
- "pushq %rbx\n"
- "pushq %rcx\n"
- "pushq %rdx\n"
- "pushq %rsi\n"
- "pushq %rdi\n"
- "pushq %rbp\n"
- "pushq %r8\n"
- "pushq %r9\n"
- "pushq %r10\n"
- "pushq %r11\n"
- "pushq %r12\n"
- "pushq %r13\n"
- "pushq %r14\n"
- "pushq %r15\n"
+ "pushq %rax\n"
+ "pushq %rbx\n"
+ "pushq %rcx\n"
+ "pushq %rdx\n"
+ "pushq %rsi\n"
+ "pushq %rdi\n"
+ "pushq %rbp\n"
+ "pushq %r8\n"
+ "pushq %r9\n"
+ "pushq %r10\n"
+ "pushq %r11\n"
+ "pushq %r12\n"
+ "pushq %r13\n"
+ "pushq %r14\n"
+ "pushq %r15\n"
- "movq %rsp, %rdi\n"
- "call ExceptionHandler\n"
+ "movq %rsp, %rdi\n"
+ "call ExceptionHandler\n"
- "popq %r15\n"
- "popq %r14\n"
- "popq %r13\n"
- "popq %r12\n"
- "popq %r11\n"
- "popq %r10\n"
- "popq %r9\n"
- "popq %r8\n"
- "popq %rbp\n"
- "popq %rdi\n"
- "popq %rsi\n"
- "popq %rdx\n"
- "popq %rcx\n"
- "popq %rbx\n"
- "popq %rax\n"
+ "popq %r15\n"
+ "popq %r14\n"
+ "popq %r13\n"
+ "popq %r12\n"
+ "popq %r11\n"
+ "popq %r10\n"
+ "popq %r9\n"
+ "popq %r8\n"
+ "popq %rbp\n"
+ "popq %rdi\n"
+ "popq %rsi\n"
+ "popq %rdx\n"
+ "popq %rcx\n"
+ "popq %rbx\n"
+ "popq %rax\n"
- "addq $16, %rsp\n"
+ "addq $16, %rsp\n"
- "iretq"); // pop CS RIP RFLAGS SS RSP
- }
+ "iretq"); // pop CS RIP RFLAGS SS RSP
+ }
- extern "C" __naked __used __no_stack_protector __aligned(16) void InterruptHandlerStub()
- {
- asm("cld\n"
- "cli\n"
+ extern "C" __naked __used __no_stack_protector __aligned(16) void InterruptHandlerStub()
+ {
+ asm("cld\n"
+ "cli\n"
- "pushq %rax\n"
- "pushq %rbx\n"
- "pushq %rcx\n"
- "pushq %rdx\n"
- "pushq %rsi\n"
- "pushq %rdi\n"
- "pushq %rbp\n"
- "pushq %r8\n"
- "pushq %r9\n"
- "pushq %r10\n"
- "pushq %r11\n"
- "pushq %r12\n"
- "pushq %r13\n"
- "pushq %r14\n"
- "pushq %r15\n"
+ "pushq %rax\n"
+ "pushq %rbx\n"
+ "pushq %rcx\n"
+ "pushq %rdx\n"
+ "pushq %rsi\n"
+ "pushq %rdi\n"
+ "pushq %rbp\n"
+ "pushq %r8\n"
+ "pushq %r9\n"
+ "pushq %r10\n"
+ "pushq %r11\n"
+ "pushq %r12\n"
+ "pushq %r13\n"
+ "pushq %r14\n"
+ "pushq %r15\n"
- "movq %rsp, %rdi\n"
- "call MainInterruptHandler\n"
+ "movq %rsp, %rdi\n"
+ "call MainInterruptHandler\n"
- "popq %r15\n"
- "popq %r14\n"
- "popq %r13\n"
- "popq %r12\n"
- "popq %r11\n"
- "popq %r10\n"
- "popq %r9\n"
- "popq %r8\n"
- "popq %rbp\n"
- "popq %rdi\n"
- "popq %rsi\n"
- "popq %rdx\n"
- "popq %rcx\n"
- "popq %rbx\n"
- "popq %rax\n"
+ "popq %r15\n"
+ "popq %r14\n"
+ "popq %r13\n"
+ "popq %r12\n"
+ "popq %r11\n"
+ "popq %r10\n"
+ "popq %r9\n"
+ "popq %r8\n"
+ "popq %rbp\n"
+ "popq %rdi\n"
+ "popq %rsi\n"
+ "popq %rdx\n"
+ "popq %rcx\n"
+ "popq %rbx\n"
+ "popq %rax\n"
- "addq $16, %rsp\n"
+ "addq $16, %rsp\n"
- "sti\n"
- "iretq"); // pop CS RIP RFLAGS SS RSP
- }
+ "sti\n"
+ "iretq"); // pop CS RIP RFLAGS SS RSP
+ }
#pragma region Exceptions
#define EXCEPTION_HANDLER(num) \
- __naked __used __no_stack_protector __aligned(16) static void InterruptHandler_##num() \
- { \
- asm("pushq $0\npushq $" #num "\n" \
- "jmp ExceptionHandlerStub"); \
- }
+ __naked __used __no_stack_protector __aligned(16) static void InterruptHandler_##num() \
+ { \
+ asm("pushq $0\npushq $" #num "\n" \
+ "jmp ExceptionHandlerStub"); \
+ }
#define EXCEPTION_ERROR_HANDLER(num) \
- __naked __used __no_stack_protector __aligned(16) static void InterruptHandler_##num() \
- { \
- asm("pushq $" #num "\n" \
- "jmp ExceptionHandlerStub"); \
- }
+ __naked __used __no_stack_protector __aligned(16) static void InterruptHandler_##num() \
+ { \
+ asm("pushq $" #num "\n" \
+ "jmp ExceptionHandlerStub"); \
+ }
#define INTERRUPT_HANDLER(num) \
- __naked __used __no_stack_protector __aligned(16) void InterruptHandler_##num() \
- { \
- asm("pushq $0\npushq $" #num "\n" \
- "jmp InterruptHandlerStub\n"); \
- }
+ __naked __used __no_stack_protector __aligned(16) void InterruptHandler_##num() \
+ { \
+ asm("pushq $0\npushq $" #num "\n" \
+ "jmp InterruptHandlerStub\n"); \
+ }
- /* ISR */
+ /* ISR */
- EXCEPTION_HANDLER(0x0);
- EXCEPTION_HANDLER(0x1);
- EXCEPTION_HANDLER(0x2);
- EXCEPTION_HANDLER(0x3);
- EXCEPTION_HANDLER(0x4);
- EXCEPTION_HANDLER(0x5);
- EXCEPTION_HANDLER(0x6);
- EXCEPTION_HANDLER(0x7);
- EXCEPTION_ERROR_HANDLER(0x8);
- EXCEPTION_HANDLER(0x9);
- EXCEPTION_ERROR_HANDLER(0xa);
- EXCEPTION_ERROR_HANDLER(0xb);
- EXCEPTION_ERROR_HANDLER(0xc);
- EXCEPTION_ERROR_HANDLER(0xd);
- EXCEPTION_ERROR_HANDLER(0xe);
- EXCEPTION_HANDLER(0xf);
- EXCEPTION_ERROR_HANDLER(0x10);
- EXCEPTION_HANDLER(0x11);
- EXCEPTION_HANDLER(0x12);
- EXCEPTION_HANDLER(0x13);
- EXCEPTION_HANDLER(0x14);
- EXCEPTION_HANDLER(0x15);
- EXCEPTION_HANDLER(0x16);
- EXCEPTION_HANDLER(0x17);
- EXCEPTION_HANDLER(0x18);
- EXCEPTION_HANDLER(0x19);
- EXCEPTION_HANDLER(0x1a);
- EXCEPTION_HANDLER(0x1b);
- EXCEPTION_HANDLER(0x1c);
- EXCEPTION_HANDLER(0x1d);
- EXCEPTION_HANDLER(0x1e);
- EXCEPTION_HANDLER(0x1f);
+ EXCEPTION_HANDLER(0x0);
+ EXCEPTION_HANDLER(0x1);
+ EXCEPTION_HANDLER(0x2);
+ EXCEPTION_HANDLER(0x3);
+ EXCEPTION_HANDLER(0x4);
+ EXCEPTION_HANDLER(0x5);
+ EXCEPTION_HANDLER(0x6);
+ EXCEPTION_HANDLER(0x7);
+ EXCEPTION_ERROR_HANDLER(0x8);
+ EXCEPTION_HANDLER(0x9);
+ EXCEPTION_ERROR_HANDLER(0xa);
+ EXCEPTION_ERROR_HANDLER(0xb);
+ EXCEPTION_ERROR_HANDLER(0xc);
+ EXCEPTION_ERROR_HANDLER(0xd);
+ EXCEPTION_ERROR_HANDLER(0xe);
+ EXCEPTION_HANDLER(0xf);
+ EXCEPTION_ERROR_HANDLER(0x10);
+ EXCEPTION_HANDLER(0x11);
+ EXCEPTION_HANDLER(0x12);
+ EXCEPTION_HANDLER(0x13);
+ EXCEPTION_HANDLER(0x14);
+ EXCEPTION_HANDLER(0x15);
+ EXCEPTION_HANDLER(0x16);
+ EXCEPTION_HANDLER(0x17);
+ EXCEPTION_HANDLER(0x18);
+ EXCEPTION_HANDLER(0x19);
+ EXCEPTION_HANDLER(0x1a);
+ EXCEPTION_HANDLER(0x1b);
+ EXCEPTION_HANDLER(0x1c);
+ EXCEPTION_HANDLER(0x1d);
+ EXCEPTION_HANDLER(0x1e);
+ EXCEPTION_HANDLER(0x1f);
- /* IRQ */
+ /* IRQ */
- INTERRUPT_HANDLER(0x20)
- INTERRUPT_HANDLER(0x21)
- INTERRUPT_HANDLER(0x22)
- INTERRUPT_HANDLER(0x23)
- INTERRUPT_HANDLER(0x24)
- INTERRUPT_HANDLER(0x25)
- INTERRUPT_HANDLER(0x26)
- INTERRUPT_HANDLER(0x27)
- INTERRUPT_HANDLER(0x28)
- INTERRUPT_HANDLER(0x29)
- INTERRUPT_HANDLER(0x2a)
- INTERRUPT_HANDLER(0x2b)
- INTERRUPT_HANDLER(0x2c)
- INTERRUPT_HANDLER(0x2d)
- INTERRUPT_HANDLER(0x2e)
- INTERRUPT_HANDLER(0x2f)
+ INTERRUPT_HANDLER(0x20)
+ INTERRUPT_HANDLER(0x21)
+ INTERRUPT_HANDLER(0x22)
+ INTERRUPT_HANDLER(0x23)
+ INTERRUPT_HANDLER(0x24)
+ INTERRUPT_HANDLER(0x25)
+ INTERRUPT_HANDLER(0x26)
+ INTERRUPT_HANDLER(0x27)
+ INTERRUPT_HANDLER(0x28)
+ INTERRUPT_HANDLER(0x29)
+ INTERRUPT_HANDLER(0x2a)
+ INTERRUPT_HANDLER(0x2b)
+ INTERRUPT_HANDLER(0x2c)
+ INTERRUPT_HANDLER(0x2d)
+ INTERRUPT_HANDLER(0x2e)
+ INTERRUPT_HANDLER(0x2f)
- /* Reserved by OS */
+ /* Reserved by OS */
- INTERRUPT_HANDLER(0x30)
- INTERRUPT_HANDLER(0x31)
- INTERRUPT_HANDLER(0x32)
- INTERRUPT_HANDLER(0x33)
- INTERRUPT_HANDLER(0x34)
- INTERRUPT_HANDLER(0x35)
- INTERRUPT_HANDLER(0x36)
- INTERRUPT_HANDLER(0x37)
- INTERRUPT_HANDLER(0x38)
- INTERRUPT_HANDLER(0x39)
- INTERRUPT_HANDLER(0x3a)
- INTERRUPT_HANDLER(0x3b)
- INTERRUPT_HANDLER(0x3c)
- INTERRUPT_HANDLER(0x3d)
+ INTERRUPT_HANDLER(0x30)
+ INTERRUPT_HANDLER(0x31)
+ INTERRUPT_HANDLER(0x32)
+ INTERRUPT_HANDLER(0x33)
+ INTERRUPT_HANDLER(0x34)
+ INTERRUPT_HANDLER(0x35)
+ INTERRUPT_HANDLER(0x36)
+ INTERRUPT_HANDLER(0x37)
+ INTERRUPT_HANDLER(0x38)
+ INTERRUPT_HANDLER(0x39)
+ INTERRUPT_HANDLER(0x3a)
+ INTERRUPT_HANDLER(0x3b)
+ INTERRUPT_HANDLER(0x3c)
+ INTERRUPT_HANDLER(0x3d)
- /* Free */
+ /* Free */
- INTERRUPT_HANDLER(0x3e)
- INTERRUPT_HANDLER(0x3f)
- INTERRUPT_HANDLER(0x40)
- INTERRUPT_HANDLER(0x41)
- INTERRUPT_HANDLER(0x42)
- INTERRUPT_HANDLER(0x43)
- INTERRUPT_HANDLER(0x44)
- INTERRUPT_HANDLER(0x45)
- INTERRUPT_HANDLER(0x46)
- INTERRUPT_HANDLER(0x47)
- INTERRUPT_HANDLER(0x48)
- INTERRUPT_HANDLER(0x49)
- INTERRUPT_HANDLER(0x4a)
- INTERRUPT_HANDLER(0x4b)
- INTERRUPT_HANDLER(0x4c)
- INTERRUPT_HANDLER(0x4d)
- INTERRUPT_HANDLER(0x4e)
- INTERRUPT_HANDLER(0x4f)
- INTERRUPT_HANDLER(0x50)
- INTERRUPT_HANDLER(0x51)
- INTERRUPT_HANDLER(0x52)
- INTERRUPT_HANDLER(0x53)
- INTERRUPT_HANDLER(0x54)
- INTERRUPT_HANDLER(0x55)
- INTERRUPT_HANDLER(0x56)
- INTERRUPT_HANDLER(0x57)
- INTERRUPT_HANDLER(0x58)
- INTERRUPT_HANDLER(0x59)
- INTERRUPT_HANDLER(0x5a)
- INTERRUPT_HANDLER(0x5b)
- INTERRUPT_HANDLER(0x5c)
- INTERRUPT_HANDLER(0x5d)
- INTERRUPT_HANDLER(0x5e)
- INTERRUPT_HANDLER(0x5f)
- INTERRUPT_HANDLER(0x60)
- INTERRUPT_HANDLER(0x61)
- INTERRUPT_HANDLER(0x62)
- INTERRUPT_HANDLER(0x63)
- INTERRUPT_HANDLER(0x64)
- INTERRUPT_HANDLER(0x65)
- INTERRUPT_HANDLER(0x66)
- INTERRUPT_HANDLER(0x67)
- INTERRUPT_HANDLER(0x68)
- INTERRUPT_HANDLER(0x69)
- INTERRUPT_HANDLER(0x6a)
- INTERRUPT_HANDLER(0x6b)
- INTERRUPT_HANDLER(0x6c)
- INTERRUPT_HANDLER(0x6d)
- INTERRUPT_HANDLER(0x6e)
- INTERRUPT_HANDLER(0x6f)
- INTERRUPT_HANDLER(0x70)
- INTERRUPT_HANDLER(0x71)
- INTERRUPT_HANDLER(0x72)
- INTERRUPT_HANDLER(0x73)
- INTERRUPT_HANDLER(0x74)
- INTERRUPT_HANDLER(0x75)
- INTERRUPT_HANDLER(0x76)
- INTERRUPT_HANDLER(0x77)
- INTERRUPT_HANDLER(0x78)
- INTERRUPT_HANDLER(0x79)
- INTERRUPT_HANDLER(0x7a)
- INTERRUPT_HANDLER(0x7b)
- INTERRUPT_HANDLER(0x7c)
- INTERRUPT_HANDLER(0x7d)
- INTERRUPT_HANDLER(0x7e)
- INTERRUPT_HANDLER(0x7f)
- INTERRUPT_HANDLER(0x80)
- INTERRUPT_HANDLER(0x81)
- INTERRUPT_HANDLER(0x82)
- INTERRUPT_HANDLER(0x83)
- INTERRUPT_HANDLER(0x84)
- INTERRUPT_HANDLER(0x85)
- INTERRUPT_HANDLER(0x86)
- INTERRUPT_HANDLER(0x87)
- INTERRUPT_HANDLER(0x88)
- INTERRUPT_HANDLER(0x89)
- INTERRUPT_HANDLER(0x8a)
- INTERRUPT_HANDLER(0x8b)
- INTERRUPT_HANDLER(0x8c)
- INTERRUPT_HANDLER(0x8d)
- INTERRUPT_HANDLER(0x8e)
- INTERRUPT_HANDLER(0x8f)
- INTERRUPT_HANDLER(0x90)
- INTERRUPT_HANDLER(0x91)
- INTERRUPT_HANDLER(0x92)
- INTERRUPT_HANDLER(0x93)
- INTERRUPT_HANDLER(0x94)
- INTERRUPT_HANDLER(0x95)
- INTERRUPT_HANDLER(0x96)
- INTERRUPT_HANDLER(0x97)
- INTERRUPT_HANDLER(0x98)
- INTERRUPT_HANDLER(0x99)
- INTERRUPT_HANDLER(0x9a)
- INTERRUPT_HANDLER(0x9b)
- INTERRUPT_HANDLER(0x9c)
- INTERRUPT_HANDLER(0x9d)
- INTERRUPT_HANDLER(0x9e)
- INTERRUPT_HANDLER(0x9f)
- INTERRUPT_HANDLER(0xa0)
- INTERRUPT_HANDLER(0xa1)
- INTERRUPT_HANDLER(0xa2)
- INTERRUPT_HANDLER(0xa3)
- INTERRUPT_HANDLER(0xa4)
- INTERRUPT_HANDLER(0xa5)
- INTERRUPT_HANDLER(0xa6)
- INTERRUPT_HANDLER(0xa7)
- INTERRUPT_HANDLER(0xa8)
- INTERRUPT_HANDLER(0xa9)
- INTERRUPT_HANDLER(0xaa)
- INTERRUPT_HANDLER(0xab)
- INTERRUPT_HANDLER(0xac)
- INTERRUPT_HANDLER(0xad)
- INTERRUPT_HANDLER(0xae)
- INTERRUPT_HANDLER(0xaf)
- INTERRUPT_HANDLER(0xb0)
- INTERRUPT_HANDLER(0xb1)
- INTERRUPT_HANDLER(0xb2)
- INTERRUPT_HANDLER(0xb3)
- INTERRUPT_HANDLER(0xb4)
- INTERRUPT_HANDLER(0xb5)
- INTERRUPT_HANDLER(0xb6)
- INTERRUPT_HANDLER(0xb7)
- INTERRUPT_HANDLER(0xb8)
- INTERRUPT_HANDLER(0xb9)
- INTERRUPT_HANDLER(0xba)
- INTERRUPT_HANDLER(0xbb)
- INTERRUPT_HANDLER(0xbc)
- INTERRUPT_HANDLER(0xbd)
- INTERRUPT_HANDLER(0xbe)
- INTERRUPT_HANDLER(0xbf)
- INTERRUPT_HANDLER(0xc0)
- INTERRUPT_HANDLER(0xc1)
- INTERRUPT_HANDLER(0xc2)
- INTERRUPT_HANDLER(0xc3)
- INTERRUPT_HANDLER(0xc4)
- INTERRUPT_HANDLER(0xc5)
- INTERRUPT_HANDLER(0xc6)
- INTERRUPT_HANDLER(0xc7)
- INTERRUPT_HANDLER(0xc8)
- INTERRUPT_HANDLER(0xc9)
- INTERRUPT_HANDLER(0xca)
- INTERRUPT_HANDLER(0xcb)
- INTERRUPT_HANDLER(0xcc)
- INTERRUPT_HANDLER(0xcd)
- INTERRUPT_HANDLER(0xce)
- INTERRUPT_HANDLER(0xcf)
- INTERRUPT_HANDLER(0xd0)
- INTERRUPT_HANDLER(0xd1)
- INTERRUPT_HANDLER(0xd2)
- INTERRUPT_HANDLER(0xd3)
- INTERRUPT_HANDLER(0xd4)
- INTERRUPT_HANDLER(0xd5)
- INTERRUPT_HANDLER(0xd6)
- INTERRUPT_HANDLER(0xd7)
- INTERRUPT_HANDLER(0xd8)
- INTERRUPT_HANDLER(0xd9)
- INTERRUPT_HANDLER(0xda)
- INTERRUPT_HANDLER(0xdb)
- INTERRUPT_HANDLER(0xdc)
- INTERRUPT_HANDLER(0xdd)
- INTERRUPT_HANDLER(0xde)
- INTERRUPT_HANDLER(0xdf)
- INTERRUPT_HANDLER(0xe0)
- INTERRUPT_HANDLER(0xe1)
- INTERRUPT_HANDLER(0xe2)
- INTERRUPT_HANDLER(0xe3)
- INTERRUPT_HANDLER(0xe4)
- INTERRUPT_HANDLER(0xe5)
- INTERRUPT_HANDLER(0xe6)
- INTERRUPT_HANDLER(0xe7)
- INTERRUPT_HANDLER(0xe8)
- INTERRUPT_HANDLER(0xe9)
- INTERRUPT_HANDLER(0xea)
- INTERRUPT_HANDLER(0xeb)
- INTERRUPT_HANDLER(0xec)
- INTERRUPT_HANDLER(0xed)
- INTERRUPT_HANDLER(0xee)
- INTERRUPT_HANDLER(0xef)
- INTERRUPT_HANDLER(0xf0)
- INTERRUPT_HANDLER(0xf1)
- INTERRUPT_HANDLER(0xf2)
- INTERRUPT_HANDLER(0xf3)
- INTERRUPT_HANDLER(0xf4)
- INTERRUPT_HANDLER(0xf5)
- INTERRUPT_HANDLER(0xf6)
- INTERRUPT_HANDLER(0xf7)
- INTERRUPT_HANDLER(0xf8)
- INTERRUPT_HANDLER(0xf9)
- INTERRUPT_HANDLER(0xfa)
- INTERRUPT_HANDLER(0xfb)
- INTERRUPT_HANDLER(0xfc)
- INTERRUPT_HANDLER(0xfd)
- INTERRUPT_HANDLER(0xfe)
- INTERRUPT_HANDLER(0xff)
+ INTERRUPT_HANDLER(0x3e)
+ INTERRUPT_HANDLER(0x3f)
+ INTERRUPT_HANDLER(0x40)
+ INTERRUPT_HANDLER(0x41)
+ INTERRUPT_HANDLER(0x42)
+ INTERRUPT_HANDLER(0x43)
+ INTERRUPT_HANDLER(0x44)
+ INTERRUPT_HANDLER(0x45)
+ INTERRUPT_HANDLER(0x46)
+ INTERRUPT_HANDLER(0x47)
+ INTERRUPT_HANDLER(0x48)
+ INTERRUPT_HANDLER(0x49)
+ INTERRUPT_HANDLER(0x4a)
+ INTERRUPT_HANDLER(0x4b)
+ INTERRUPT_HANDLER(0x4c)
+ INTERRUPT_HANDLER(0x4d)
+ INTERRUPT_HANDLER(0x4e)
+ INTERRUPT_HANDLER(0x4f)
+ INTERRUPT_HANDLER(0x50)
+ INTERRUPT_HANDLER(0x51)
+ INTERRUPT_HANDLER(0x52)
+ INTERRUPT_HANDLER(0x53)
+ INTERRUPT_HANDLER(0x54)
+ INTERRUPT_HANDLER(0x55)
+ INTERRUPT_HANDLER(0x56)
+ INTERRUPT_HANDLER(0x57)
+ INTERRUPT_HANDLER(0x58)
+ INTERRUPT_HANDLER(0x59)
+ INTERRUPT_HANDLER(0x5a)
+ INTERRUPT_HANDLER(0x5b)
+ INTERRUPT_HANDLER(0x5c)
+ INTERRUPT_HANDLER(0x5d)
+ INTERRUPT_HANDLER(0x5e)
+ INTERRUPT_HANDLER(0x5f)
+ INTERRUPT_HANDLER(0x60)
+ INTERRUPT_HANDLER(0x61)
+ INTERRUPT_HANDLER(0x62)
+ INTERRUPT_HANDLER(0x63)
+ INTERRUPT_HANDLER(0x64)
+ INTERRUPT_HANDLER(0x65)
+ INTERRUPT_HANDLER(0x66)
+ INTERRUPT_HANDLER(0x67)
+ INTERRUPT_HANDLER(0x68)
+ INTERRUPT_HANDLER(0x69)
+ INTERRUPT_HANDLER(0x6a)
+ INTERRUPT_HANDLER(0x6b)
+ INTERRUPT_HANDLER(0x6c)
+ INTERRUPT_HANDLER(0x6d)
+ INTERRUPT_HANDLER(0x6e)
+ INTERRUPT_HANDLER(0x6f)
+ INTERRUPT_HANDLER(0x70)
+ INTERRUPT_HANDLER(0x71)
+ INTERRUPT_HANDLER(0x72)
+ INTERRUPT_HANDLER(0x73)
+ INTERRUPT_HANDLER(0x74)
+ INTERRUPT_HANDLER(0x75)
+ INTERRUPT_HANDLER(0x76)
+ INTERRUPT_HANDLER(0x77)
+ INTERRUPT_HANDLER(0x78)
+ INTERRUPT_HANDLER(0x79)
+ INTERRUPT_HANDLER(0x7a)
+ INTERRUPT_HANDLER(0x7b)
+ INTERRUPT_HANDLER(0x7c)
+ INTERRUPT_HANDLER(0x7d)
+ INTERRUPT_HANDLER(0x7e)
+ INTERRUPT_HANDLER(0x7f)
+ INTERRUPT_HANDLER(0x80)
+ INTERRUPT_HANDLER(0x81)
+ INTERRUPT_HANDLER(0x82)
+ INTERRUPT_HANDLER(0x83)
+ INTERRUPT_HANDLER(0x84)
+ INTERRUPT_HANDLER(0x85)
+ INTERRUPT_HANDLER(0x86)
+ INTERRUPT_HANDLER(0x87)
+ INTERRUPT_HANDLER(0x88)
+ INTERRUPT_HANDLER(0x89)
+ INTERRUPT_HANDLER(0x8a)
+ INTERRUPT_HANDLER(0x8b)
+ INTERRUPT_HANDLER(0x8c)
+ INTERRUPT_HANDLER(0x8d)
+ INTERRUPT_HANDLER(0x8e)
+ INTERRUPT_HANDLER(0x8f)
+ INTERRUPT_HANDLER(0x90)
+ INTERRUPT_HANDLER(0x91)
+ INTERRUPT_HANDLER(0x92)
+ INTERRUPT_HANDLER(0x93)
+ INTERRUPT_HANDLER(0x94)
+ INTERRUPT_HANDLER(0x95)
+ INTERRUPT_HANDLER(0x96)
+ INTERRUPT_HANDLER(0x97)
+ INTERRUPT_HANDLER(0x98)
+ INTERRUPT_HANDLER(0x99)
+ INTERRUPT_HANDLER(0x9a)
+ INTERRUPT_HANDLER(0x9b)
+ INTERRUPT_HANDLER(0x9c)
+ INTERRUPT_HANDLER(0x9d)
+ INTERRUPT_HANDLER(0x9e)
+ INTERRUPT_HANDLER(0x9f)
+ INTERRUPT_HANDLER(0xa0)
+ INTERRUPT_HANDLER(0xa1)
+ INTERRUPT_HANDLER(0xa2)
+ INTERRUPT_HANDLER(0xa3)
+ INTERRUPT_HANDLER(0xa4)
+ INTERRUPT_HANDLER(0xa5)
+ INTERRUPT_HANDLER(0xa6)
+ INTERRUPT_HANDLER(0xa7)
+ INTERRUPT_HANDLER(0xa8)
+ INTERRUPT_HANDLER(0xa9)
+ INTERRUPT_HANDLER(0xaa)
+ INTERRUPT_HANDLER(0xab)
+ INTERRUPT_HANDLER(0xac)
+ INTERRUPT_HANDLER(0xad)
+ INTERRUPT_HANDLER(0xae)
+ INTERRUPT_HANDLER(0xaf)
+ INTERRUPT_HANDLER(0xb0)
+ INTERRUPT_HANDLER(0xb1)
+ INTERRUPT_HANDLER(0xb2)
+ INTERRUPT_HANDLER(0xb3)
+ INTERRUPT_HANDLER(0xb4)
+ INTERRUPT_HANDLER(0xb5)
+ INTERRUPT_HANDLER(0xb6)
+ INTERRUPT_HANDLER(0xb7)
+ INTERRUPT_HANDLER(0xb8)
+ INTERRUPT_HANDLER(0xb9)
+ INTERRUPT_HANDLER(0xba)
+ INTERRUPT_HANDLER(0xbb)
+ INTERRUPT_HANDLER(0xbc)
+ INTERRUPT_HANDLER(0xbd)
+ INTERRUPT_HANDLER(0xbe)
+ INTERRUPT_HANDLER(0xbf)
+ INTERRUPT_HANDLER(0xc0)
+ INTERRUPT_HANDLER(0xc1)
+ INTERRUPT_HANDLER(0xc2)
+ INTERRUPT_HANDLER(0xc3)
+ INTERRUPT_HANDLER(0xc4)
+ INTERRUPT_HANDLER(0xc5)
+ INTERRUPT_HANDLER(0xc6)
+ INTERRUPT_HANDLER(0xc7)
+ INTERRUPT_HANDLER(0xc8)
+ INTERRUPT_HANDLER(0xc9)
+ INTERRUPT_HANDLER(0xca)
+ INTERRUPT_HANDLER(0xcb)
+ INTERRUPT_HANDLER(0xcc)
+ INTERRUPT_HANDLER(0xcd)
+ INTERRUPT_HANDLER(0xce)
+ INTERRUPT_HANDLER(0xcf)
+ INTERRUPT_HANDLER(0xd0)
+ INTERRUPT_HANDLER(0xd1)
+ INTERRUPT_HANDLER(0xd2)
+ INTERRUPT_HANDLER(0xd3)
+ INTERRUPT_HANDLER(0xd4)
+ INTERRUPT_HANDLER(0xd5)
+ INTERRUPT_HANDLER(0xd6)
+ INTERRUPT_HANDLER(0xd7)
+ INTERRUPT_HANDLER(0xd8)
+ INTERRUPT_HANDLER(0xd9)
+ INTERRUPT_HANDLER(0xda)
+ INTERRUPT_HANDLER(0xdb)
+ INTERRUPT_HANDLER(0xdc)
+ INTERRUPT_HANDLER(0xdd)
+ INTERRUPT_HANDLER(0xde)
+ INTERRUPT_HANDLER(0xdf)
+ INTERRUPT_HANDLER(0xe0)
+ INTERRUPT_HANDLER(0xe1)
+ INTERRUPT_HANDLER(0xe2)
+ INTERRUPT_HANDLER(0xe3)
+ INTERRUPT_HANDLER(0xe4)
+ INTERRUPT_HANDLER(0xe5)
+ INTERRUPT_HANDLER(0xe6)
+ INTERRUPT_HANDLER(0xe7)
+ INTERRUPT_HANDLER(0xe8)
+ INTERRUPT_HANDLER(0xe9)
+ INTERRUPT_HANDLER(0xea)
+ INTERRUPT_HANDLER(0xeb)
+ INTERRUPT_HANDLER(0xec)
+ INTERRUPT_HANDLER(0xed)
+ INTERRUPT_HANDLER(0xee)
+ INTERRUPT_HANDLER(0xef)
+ INTERRUPT_HANDLER(0xf0)
+ INTERRUPT_HANDLER(0xf1)
+ INTERRUPT_HANDLER(0xf2)
+ INTERRUPT_HANDLER(0xf3)
+ INTERRUPT_HANDLER(0xf4)
+ INTERRUPT_HANDLER(0xf5)
+ INTERRUPT_HANDLER(0xf6)
+ INTERRUPT_HANDLER(0xf7)
+ INTERRUPT_HANDLER(0xf8)
+ INTERRUPT_HANDLER(0xf9)
+ INTERRUPT_HANDLER(0xfa)
+ INTERRUPT_HANDLER(0xfb)
+ INTERRUPT_HANDLER(0xfc)
+ INTERRUPT_HANDLER(0xfd)
+ INTERRUPT_HANDLER(0xfe)
+ INTERRUPT_HANDLER(0xff)
#pragma endregion Exceptions
- void Init(int Core)
- {
- if (Core == 0) /* Disable PIC using BSP */
- {
- // PIC
- outb(0x20, 0x10 | 0x1);
- outb(0x80, 0);
- outb(0xA0, 0x10 | 0x10);
- outb(0x80, 0);
+ void Init(int Core)
+ {
+ if (Core == 0) /* Disable PIC using BSP */
+ {
+ // PIC
+ outb(0x20, 0x10 | 0x1);
+ outb(0x80, 0);
+ outb(0xA0, 0x10 | 0x10);
+ outb(0x80, 0);
- outb(0x21, 0x20);
- outb(0x80, 0);
- outb(0xA1, 0x28);
- outb(0x80, 0);
+ outb(0x21, 0x20);
+ outb(0x80, 0);
+ outb(0xA1, 0x28);
+ outb(0x80, 0);
- outb(0x21, 0x04);
- outb(0x80, 0);
- outb(0xA1, 0x02);
- outb(0x80, 0);
+ outb(0x21, 0x04);
+ outb(0x80, 0);
+ outb(0xA1, 0x02);
+ outb(0x80, 0);
- outb(0x21, 1);
- outb(0x80, 0);
- outb(0xA1, 1);
- outb(0x80, 0);
+ outb(0x21, 1);
+ outb(0x80, 0);
+ outb(0xA1, 1);
+ outb(0x80, 0);
- // Masking and disabling PIC
- outb(0x21, 0xff);
- outb(0x80, 0);
- outb(0xA1, 0xff);
- }
+ // Masking and disabling PIC
+ outb(0x21, 0xff);
+ outb(0x80, 0);
+ outb(0xA1, 0xff);
+ }
- bool EnableISRs = true;
+ bool EnableISRs = true;
#ifdef DEBUG
- EnableISRs = !DebuggerIsAttached;
- if (!EnableISRs)
- KPrint("\eFFA500The debugger is attached, disabling all ISRs.");
+ EnableISRs = !DebuggerIsAttached;
+ if (!EnableISRs)
+ KPrint("\eFFA500The debugger is attached, disabling all ISRs.");
#endif
- /* ISR */
- SetEntry(0x0, InterruptHandler_0x0, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x1, InterruptHandler_0x1, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x2, InterruptHandler_0x2, IST2, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x3, InterruptHandler_0x3, IST1, TRAP_32BIT, RING3, (!DebuggerIsAttached), GDT_KERNEL_CODE); /* Do not handle breakpoints if we are debugging the kernel. */
- SetEntry(0x4, InterruptHandler_0x4, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x5, InterruptHandler_0x5, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x6, InterruptHandler_0x6, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x7, InterruptHandler_0x7, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x8, InterruptHandler_0x8, IST3, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x9, InterruptHandler_0x9, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0xa, InterruptHandler_0xa, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0xb, InterruptHandler_0xb, IST1, TRAP_32BIT, RING0, (!DebuggerIsAttached), GDT_KERNEL_CODE);
- SetEntry(0xc, InterruptHandler_0xc, IST3, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0xd, InterruptHandler_0xd, IST3, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0xe, InterruptHandler_0xe, IST3, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0xf, InterruptHandler_0xf, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x10, InterruptHandler_0x10, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x11, InterruptHandler_0x11, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x12, InterruptHandler_0x12, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x13, InterruptHandler_0x13, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x14, InterruptHandler_0x14, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x15, InterruptHandler_0x15, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x16, InterruptHandler_0x16, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x17, InterruptHandler_0x17, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x18, InterruptHandler_0x18, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x19, InterruptHandler_0x19, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x1a, InterruptHandler_0x1a, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x1b, InterruptHandler_0x1b, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x1c, InterruptHandler_0x1c, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x1d, InterruptHandler_0x1d, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x1e, InterruptHandler_0x1e, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- SetEntry(0x1f, InterruptHandler_0x1f, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ /* ISR */
+ SetEntry(0x0, InterruptHandler_0x0, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x1, InterruptHandler_0x1, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x2, InterruptHandler_0x2, IST2, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x3, InterruptHandler_0x3, IST1, TRAP_32BIT, RING3, (!DebuggerIsAttached), GDT_KERNEL_CODE); /* Do not handle breakpoints if we are debugging the kernel. */
+ SetEntry(0x4, InterruptHandler_0x4, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x5, InterruptHandler_0x5, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x6, InterruptHandler_0x6, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x7, InterruptHandler_0x7, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x8, InterruptHandler_0x8, IST3, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x9, InterruptHandler_0x9, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0xa, InterruptHandler_0xa, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0xb, InterruptHandler_0xb, IST1, TRAP_32BIT, RING0, (!DebuggerIsAttached), GDT_KERNEL_CODE);
+ SetEntry(0xc, InterruptHandler_0xc, IST3, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0xd, InterruptHandler_0xd, IST3, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0xe, InterruptHandler_0xe, IST3, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0xf, InterruptHandler_0xf, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x10, InterruptHandler_0x10, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x11, InterruptHandler_0x11, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x12, InterruptHandler_0x12, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x13, InterruptHandler_0x13, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x14, InterruptHandler_0x14, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x15, InterruptHandler_0x15, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x16, InterruptHandler_0x16, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x17, InterruptHandler_0x17, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x18, InterruptHandler_0x18, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x19, InterruptHandler_0x19, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x1a, InterruptHandler_0x1a, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x1b, InterruptHandler_0x1b, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x1c, InterruptHandler_0x1c, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x1d, InterruptHandler_0x1d, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x1e, InterruptHandler_0x1e, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
+ SetEntry(0x1f, InterruptHandler_0x1f, IST1, TRAP_32BIT, RING0, EnableISRs, GDT_KERNEL_CODE);
- /* IRQ */
+ /* IRQ */
- SetEntry(0x20, InterruptHandler_0x20, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x21, InterruptHandler_0x21, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x22, InterruptHandler_0x22, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x23, InterruptHandler_0x23, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x24, InterruptHandler_0x24, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x25, InterruptHandler_0x25, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x26, InterruptHandler_0x26, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x27, InterruptHandler_0x27, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x28, InterruptHandler_0x28, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x29, InterruptHandler_0x29, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2a, InterruptHandler_0x2a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2b, InterruptHandler_0x2b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2c, InterruptHandler_0x2c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2d, InterruptHandler_0x2d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2e, InterruptHandler_0x2e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2f, InterruptHandler_0x2f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x20, InterruptHandler_0x20, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x21, InterruptHandler_0x21, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x22, InterruptHandler_0x22, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x23, InterruptHandler_0x23, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x24, InterruptHandler_0x24, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x25, InterruptHandler_0x25, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x26, InterruptHandler_0x26, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x27, InterruptHandler_0x27, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x28, InterruptHandler_0x28, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x29, InterruptHandler_0x29, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2a, InterruptHandler_0x2a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2b, InterruptHandler_0x2b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2c, InterruptHandler_0x2c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2d, InterruptHandler_0x2d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2e, InterruptHandler_0x2e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2f, InterruptHandler_0x2f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- /* Reserved by OS */
+ /* Reserved by OS */
- SetEntry(0x30, InterruptHandler_0x30, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x31, InterruptHandler_0x31, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x32, InterruptHandler_0x32, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x33, InterruptHandler_0x33, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x34, InterruptHandler_0x34, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x35, InterruptHandler_0x35, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x36, InterruptHandler_0x36, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x37, InterruptHandler_0x37, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x38, InterruptHandler_0x38, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x39, InterruptHandler_0x39, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x3a, InterruptHandler_0x3a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x3b, InterruptHandler_0x3b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x3c, InterruptHandler_0x3c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x3d, InterruptHandler_0x3d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x30, InterruptHandler_0x30, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x31, InterruptHandler_0x31, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x32, InterruptHandler_0x32, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x33, InterruptHandler_0x33, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x34, InterruptHandler_0x34, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x35, InterruptHandler_0x35, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x36, InterruptHandler_0x36, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x37, InterruptHandler_0x37, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x38, InterruptHandler_0x38, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x39, InterruptHandler_0x39, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x3a, InterruptHandler_0x3a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x3b, InterruptHandler_0x3b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x3c, InterruptHandler_0x3c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x3d, InterruptHandler_0x3d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- /* Free */
+ /* Free */
- SetEntry(0x3e, InterruptHandler_0x3e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x3f, InterruptHandler_0x3f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x40, InterruptHandler_0x40, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x41, InterruptHandler_0x41, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x42, InterruptHandler_0x42, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x43, InterruptHandler_0x43, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x44, InterruptHandler_0x44, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x45, InterruptHandler_0x45, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x46, InterruptHandler_0x46, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x47, InterruptHandler_0x47, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x48, InterruptHandler_0x48, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x49, InterruptHandler_0x49, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4a, InterruptHandler_0x4a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4b, InterruptHandler_0x4b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4c, InterruptHandler_0x4c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4d, InterruptHandler_0x4d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4e, InterruptHandler_0x4e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4f, InterruptHandler_0x4f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x50, InterruptHandler_0x50, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x51, InterruptHandler_0x51, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x52, InterruptHandler_0x52, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x53, InterruptHandler_0x53, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x54, InterruptHandler_0x54, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x55, InterruptHandler_0x55, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x56, InterruptHandler_0x56, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x57, InterruptHandler_0x57, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x58, InterruptHandler_0x58, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x59, InterruptHandler_0x59, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5a, InterruptHandler_0x5a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5b, InterruptHandler_0x5b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5c, InterruptHandler_0x5c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5d, InterruptHandler_0x5d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5e, InterruptHandler_0x5e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5f, InterruptHandler_0x5f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x60, InterruptHandler_0x60, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x61, InterruptHandler_0x61, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x62, InterruptHandler_0x62, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x63, InterruptHandler_0x63, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x64, InterruptHandler_0x64, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x65, InterruptHandler_0x65, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x66, InterruptHandler_0x66, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x67, InterruptHandler_0x67, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x68, InterruptHandler_0x68, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x69, InterruptHandler_0x69, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6a, InterruptHandler_0x6a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6b, InterruptHandler_0x6b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6c, InterruptHandler_0x6c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6d, InterruptHandler_0x6d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6e, InterruptHandler_0x6e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6f, InterruptHandler_0x6f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x70, InterruptHandler_0x70, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x71, InterruptHandler_0x71, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x72, InterruptHandler_0x72, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x73, InterruptHandler_0x73, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x74, InterruptHandler_0x74, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x75, InterruptHandler_0x75, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x76, InterruptHandler_0x76, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x77, InterruptHandler_0x77, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x78, InterruptHandler_0x78, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x79, InterruptHandler_0x79, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7a, InterruptHandler_0x7a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7b, InterruptHandler_0x7b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7c, InterruptHandler_0x7c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7d, InterruptHandler_0x7d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7e, InterruptHandler_0x7e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7f, InterruptHandler_0x7f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x80, InterruptHandler_0x80, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x81, InterruptHandler_0x81, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x82, InterruptHandler_0x82, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x83, InterruptHandler_0x83, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x84, InterruptHandler_0x84, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x85, InterruptHandler_0x85, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x86, InterruptHandler_0x86, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x87, InterruptHandler_0x87, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x88, InterruptHandler_0x88, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x89, InterruptHandler_0x89, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8a, InterruptHandler_0x8a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8b, InterruptHandler_0x8b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8c, InterruptHandler_0x8c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8d, InterruptHandler_0x8d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8e, InterruptHandler_0x8e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8f, InterruptHandler_0x8f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x90, InterruptHandler_0x90, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x91, InterruptHandler_0x91, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x92, InterruptHandler_0x92, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x93, InterruptHandler_0x93, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x94, InterruptHandler_0x94, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x95, InterruptHandler_0x95, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x96, InterruptHandler_0x96, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x97, InterruptHandler_0x97, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x98, InterruptHandler_0x98, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x99, InterruptHandler_0x99, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9a, InterruptHandler_0x9a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9b, InterruptHandler_0x9b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9c, InterruptHandler_0x9c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9d, InterruptHandler_0x9d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9e, InterruptHandler_0x9e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9f, InterruptHandler_0x9f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa0, InterruptHandler_0xa0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa1, InterruptHandler_0xa1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa2, InterruptHandler_0xa2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa3, InterruptHandler_0xa3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa4, InterruptHandler_0xa4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa5, InterruptHandler_0xa5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa6, InterruptHandler_0xa6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa7, InterruptHandler_0xa7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa8, InterruptHandler_0xa8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa9, InterruptHandler_0xa9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xaa, InterruptHandler_0xaa, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xab, InterruptHandler_0xab, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xac, InterruptHandler_0xac, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xad, InterruptHandler_0xad, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xae, InterruptHandler_0xae, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xaf, InterruptHandler_0xaf, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb0, InterruptHandler_0xb0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb1, InterruptHandler_0xb1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb2, InterruptHandler_0xb2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb3, InterruptHandler_0xb3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb4, InterruptHandler_0xb4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb5, InterruptHandler_0xb5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb6, InterruptHandler_0xb6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb7, InterruptHandler_0xb7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb8, InterruptHandler_0xb8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb9, InterruptHandler_0xb9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xba, InterruptHandler_0xba, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xbb, InterruptHandler_0xbb, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xbc, InterruptHandler_0xbc, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xbd, InterruptHandler_0xbd, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xbe, InterruptHandler_0xbe, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xbf, InterruptHandler_0xbf, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc0, InterruptHandler_0xc0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc1, InterruptHandler_0xc1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc2, InterruptHandler_0xc2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc3, InterruptHandler_0xc3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc4, InterruptHandler_0xc4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc5, InterruptHandler_0xc5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc6, InterruptHandler_0xc6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc7, InterruptHandler_0xc7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc8, InterruptHandler_0xc8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc9, InterruptHandler_0xc9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xca, InterruptHandler_0xca, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xcb, InterruptHandler_0xcb, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xcc, InterruptHandler_0xcc, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xcd, InterruptHandler_0xcd, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xce, InterruptHandler_0xce, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xcf, InterruptHandler_0xcf, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd0, InterruptHandler_0xd0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd1, InterruptHandler_0xd1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd2, InterruptHandler_0xd2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd3, InterruptHandler_0xd3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd4, InterruptHandler_0xd4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd5, InterruptHandler_0xd5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd6, InterruptHandler_0xd6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd7, InterruptHandler_0xd7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd8, InterruptHandler_0xd8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd9, InterruptHandler_0xd9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xda, InterruptHandler_0xda, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xdb, InterruptHandler_0xdb, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xdc, InterruptHandler_0xdc, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xdd, InterruptHandler_0xdd, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xde, InterruptHandler_0xde, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xdf, InterruptHandler_0xdf, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe0, InterruptHandler_0xe0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe1, InterruptHandler_0xe1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe2, InterruptHandler_0xe2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe3, InterruptHandler_0xe3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe4, InterruptHandler_0xe4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe5, InterruptHandler_0xe5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe6, InterruptHandler_0xe6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe7, InterruptHandler_0xe7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe8, InterruptHandler_0xe8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe9, InterruptHandler_0xe9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xea, InterruptHandler_0xea, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xeb, InterruptHandler_0xeb, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xec, InterruptHandler_0xec, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xed, InterruptHandler_0xed, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xee, InterruptHandler_0xee, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xef, InterruptHandler_0xef, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf0, InterruptHandler_0xf0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf1, InterruptHandler_0xf1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf2, InterruptHandler_0xf2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf3, InterruptHandler_0xf3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf4, InterruptHandler_0xf4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf5, InterruptHandler_0xf5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf6, InterruptHandler_0xf6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf7, InterruptHandler_0xf7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf8, InterruptHandler_0xf8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf9, InterruptHandler_0xf9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xfa, InterruptHandler_0xfa, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xfb, InterruptHandler_0xfb, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xfc, InterruptHandler_0xfc, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xfd, InterruptHandler_0xfd, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xfe, InterruptHandler_0xfe, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xff, InterruptHandler_0xff, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- CPU::x64::lidt(&idtd);
- }
+ SetEntry(0x3e, InterruptHandler_0x3e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x3f, InterruptHandler_0x3f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x40, InterruptHandler_0x40, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x41, InterruptHandler_0x41, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x42, InterruptHandler_0x42, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x43, InterruptHandler_0x43, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x44, InterruptHandler_0x44, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x45, InterruptHandler_0x45, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x46, InterruptHandler_0x46, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x47, InterruptHandler_0x47, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x48, InterruptHandler_0x48, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x49, InterruptHandler_0x49, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4a, InterruptHandler_0x4a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4b, InterruptHandler_0x4b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4c, InterruptHandler_0x4c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4d, InterruptHandler_0x4d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4e, InterruptHandler_0x4e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4f, InterruptHandler_0x4f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x50, InterruptHandler_0x50, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x51, InterruptHandler_0x51, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x52, InterruptHandler_0x52, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x53, InterruptHandler_0x53, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x54, InterruptHandler_0x54, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x55, InterruptHandler_0x55, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x56, InterruptHandler_0x56, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x57, InterruptHandler_0x57, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x58, InterruptHandler_0x58, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x59, InterruptHandler_0x59, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5a, InterruptHandler_0x5a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5b, InterruptHandler_0x5b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5c, InterruptHandler_0x5c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5d, InterruptHandler_0x5d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5e, InterruptHandler_0x5e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5f, InterruptHandler_0x5f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x60, InterruptHandler_0x60, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x61, InterruptHandler_0x61, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x62, InterruptHandler_0x62, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x63, InterruptHandler_0x63, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x64, InterruptHandler_0x64, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x65, InterruptHandler_0x65, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x66, InterruptHandler_0x66, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x67, InterruptHandler_0x67, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x68, InterruptHandler_0x68, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x69, InterruptHandler_0x69, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6a, InterruptHandler_0x6a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6b, InterruptHandler_0x6b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6c, InterruptHandler_0x6c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6d, InterruptHandler_0x6d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6e, InterruptHandler_0x6e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6f, InterruptHandler_0x6f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x70, InterruptHandler_0x70, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x71, InterruptHandler_0x71, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x72, InterruptHandler_0x72, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x73, InterruptHandler_0x73, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x74, InterruptHandler_0x74, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x75, InterruptHandler_0x75, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x76, InterruptHandler_0x76, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x77, InterruptHandler_0x77, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x78, InterruptHandler_0x78, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x79, InterruptHandler_0x79, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7a, InterruptHandler_0x7a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7b, InterruptHandler_0x7b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7c, InterruptHandler_0x7c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7d, InterruptHandler_0x7d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7e, InterruptHandler_0x7e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7f, InterruptHandler_0x7f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x80, InterruptHandler_0x80, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x81, InterruptHandler_0x81, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x82, InterruptHandler_0x82, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x83, InterruptHandler_0x83, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x84, InterruptHandler_0x84, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x85, InterruptHandler_0x85, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x86, InterruptHandler_0x86, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x87, InterruptHandler_0x87, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x88, InterruptHandler_0x88, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x89, InterruptHandler_0x89, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8a, InterruptHandler_0x8a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8b, InterruptHandler_0x8b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8c, InterruptHandler_0x8c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8d, InterruptHandler_0x8d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8e, InterruptHandler_0x8e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8f, InterruptHandler_0x8f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x90, InterruptHandler_0x90, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x91, InterruptHandler_0x91, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x92, InterruptHandler_0x92, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x93, InterruptHandler_0x93, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x94, InterruptHandler_0x94, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x95, InterruptHandler_0x95, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x96, InterruptHandler_0x96, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x97, InterruptHandler_0x97, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x98, InterruptHandler_0x98, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x99, InterruptHandler_0x99, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9a, InterruptHandler_0x9a, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9b, InterruptHandler_0x9b, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9c, InterruptHandler_0x9c, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9d, InterruptHandler_0x9d, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9e, InterruptHandler_0x9e, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9f, InterruptHandler_0x9f, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa0, InterruptHandler_0xa0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa1, InterruptHandler_0xa1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa2, InterruptHandler_0xa2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa3, InterruptHandler_0xa3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa4, InterruptHandler_0xa4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa5, InterruptHandler_0xa5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa6, InterruptHandler_0xa6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa7, InterruptHandler_0xa7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa8, InterruptHandler_0xa8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa9, InterruptHandler_0xa9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xaa, InterruptHandler_0xaa, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xab, InterruptHandler_0xab, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xac, InterruptHandler_0xac, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xad, InterruptHandler_0xad, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xae, InterruptHandler_0xae, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xaf, InterruptHandler_0xaf, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb0, InterruptHandler_0xb0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb1, InterruptHandler_0xb1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb2, InterruptHandler_0xb2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb3, InterruptHandler_0xb3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb4, InterruptHandler_0xb4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb5, InterruptHandler_0xb5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb6, InterruptHandler_0xb6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb7, InterruptHandler_0xb7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb8, InterruptHandler_0xb8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb9, InterruptHandler_0xb9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xba, InterruptHandler_0xba, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xbb, InterruptHandler_0xbb, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xbc, InterruptHandler_0xbc, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xbd, InterruptHandler_0xbd, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xbe, InterruptHandler_0xbe, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xbf, InterruptHandler_0xbf, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc0, InterruptHandler_0xc0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc1, InterruptHandler_0xc1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc2, InterruptHandler_0xc2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc3, InterruptHandler_0xc3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc4, InterruptHandler_0xc4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc5, InterruptHandler_0xc5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc6, InterruptHandler_0xc6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc7, InterruptHandler_0xc7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc8, InterruptHandler_0xc8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc9, InterruptHandler_0xc9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xca, InterruptHandler_0xca, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xcb, InterruptHandler_0xcb, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xcc, InterruptHandler_0xcc, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xcd, InterruptHandler_0xcd, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xce, InterruptHandler_0xce, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xcf, InterruptHandler_0xcf, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd0, InterruptHandler_0xd0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd1, InterruptHandler_0xd1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd2, InterruptHandler_0xd2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd3, InterruptHandler_0xd3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd4, InterruptHandler_0xd4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd5, InterruptHandler_0xd5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd6, InterruptHandler_0xd6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd7, InterruptHandler_0xd7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd8, InterruptHandler_0xd8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd9, InterruptHandler_0xd9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xda, InterruptHandler_0xda, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xdb, InterruptHandler_0xdb, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xdc, InterruptHandler_0xdc, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xdd, InterruptHandler_0xdd, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xde, InterruptHandler_0xde, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xdf, InterruptHandler_0xdf, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe0, InterruptHandler_0xe0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe1, InterruptHandler_0xe1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe2, InterruptHandler_0xe2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe3, InterruptHandler_0xe3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe4, InterruptHandler_0xe4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe5, InterruptHandler_0xe5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe6, InterruptHandler_0xe6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe7, InterruptHandler_0xe7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe8, InterruptHandler_0xe8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe9, InterruptHandler_0xe9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xea, InterruptHandler_0xea, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xeb, InterruptHandler_0xeb, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xec, InterruptHandler_0xec, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xed, InterruptHandler_0xed, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xee, InterruptHandler_0xee, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xef, InterruptHandler_0xef, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf0, InterruptHandler_0xf0, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf1, InterruptHandler_0xf1, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf2, InterruptHandler_0xf2, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf3, InterruptHandler_0xf3, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf4, InterruptHandler_0xf4, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf5, InterruptHandler_0xf5, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf6, InterruptHandler_0xf6, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf7, InterruptHandler_0xf7, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf8, InterruptHandler_0xf8, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf9, InterruptHandler_0xf9, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xfa, InterruptHandler_0xfa, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xfb, InterruptHandler_0xfb, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xfc, InterruptHandler_0xfc, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xfd, InterruptHandler_0xfd, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xfe, InterruptHandler_0xfe, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xff, InterruptHandler_0xff, IST0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ CPU::x64::lidt(&idtd);
+ }
}
diff --git a/Architecture/amd64/cpu/SMPTrampoline.s b/Architecture/amd64/cpu/SMPTrampoline.s
index 71794432..fb427729 100644
--- a/Architecture/amd64/cpu/SMPTrampoline.s
+++ b/Architecture/amd64/cpu/SMPTrampoline.s
@@ -24,7 +24,7 @@ TRAMPOLINE_IDT = 0x590
TRAMPOLINE_CORE = 0x600
TRAMPOLINE_START = 0x2000
-.section .text
+.section .text, "a"
/* ========== 16-bit ========== */
diff --git a/Architecture/amd64/cpu/apic.hpp b/Architecture/amd64/cpu/apic.hpp
index e93c33a0..a69b6d90 100644
--- a/Architecture/amd64/cpu/apic.hpp
+++ b/Architecture/amd64/cpu/apic.hpp
@@ -25,330 +25,330 @@
namespace APIC
{
- enum APICRegisters
- {
- // source from: https://github.com/pdoane/osdev/blob/master/intr/local_apic.c
- APIC_ID = 0x20, // Local APIC ID
- APIC_VER = 0x30, // Local APIC Version
- APIC_TPR = 0x80, // Task Priority
- APIC_APR = 0x90, // Arbitration Priority
- APIC_PPR = 0xA0, // Processor Priority
- APIC_EOI = 0xB0, // EOI
- APIC_RRD = 0xC0, // Remote Read
- APIC_LDR = 0xD0, // Logical Destination
- APIC_DFR = 0xE0, // Destination Format
- APIC_SVR = 0xF0, // Spurious Interrupt Vector
- APIC_ISR = 0x100, // In-Service (8 registers)
- APIC_TMR = 0x180, // Trigger Mode (8 registers)
- APIC_IRR = 0x200, // Interrupt Request (8 registers)
- APIC_ESR = 0x280, // Error Status
- APIC_ICRLO = 0x300, // Interrupt Command
- APIC_ICRHI = 0x310, // Interrupt Command [63:32]
- APIC_TIMER = 0x320, // LVT Timer
- APIC_THERMAL = 0x330, // LVT Thermal Sensor
- APIC_PERF = 0x340, // LVT Performance Counter
- APIC_LINT0 = 0x350, // LVT LINT0
- APIC_LINT1 = 0x360, // LVT LINT1
- APIC_ERROR = 0x370, // LVT Error
- APIC_TICR = 0x380, // Initial Count (for Timer)
- APIC_TCCR = 0x390, // Current Count (for Timer)
- APIC_TDCR = 0x3E0, // Divide Configuration (for Timer)
- };
+ enum APICRegisters
+ {
+ // source from: https://github.com/pdoane/osdev/blob/master/intr/local_apic.c
+ APIC_ID = 0x20, // Local APIC ID
+ APIC_VER = 0x30, // Local APIC Version
+ APIC_TPR = 0x80, // Task Priority
+ APIC_APR = 0x90, // Arbitration Priority
+ APIC_PPR = 0xA0, // Processor Priority
+ APIC_EOI = 0xB0, // EOI
+ APIC_RRD = 0xC0, // Remote Read
+ APIC_LDR = 0xD0, // Logical Destination
+ APIC_DFR = 0xE0, // Destination Format
+ APIC_SVR = 0xF0, // Spurious Interrupt Vector
+ APIC_ISR = 0x100, // In-Service (8 registers)
+ APIC_TMR = 0x180, // Trigger Mode (8 registers)
+ APIC_IRR = 0x200, // Interrupt Request (8 registers)
+ APIC_ESR = 0x280, // Error Status
+ APIC_ICRLO = 0x300, // Interrupt Command
+ APIC_ICRHI = 0x310, // Interrupt Command [63:32]
+ APIC_TIMER = 0x320, // LVT Timer
+ APIC_THERMAL = 0x330, // LVT Thermal Sensor
+ APIC_PERF = 0x340, // LVT Performance Counter
+ APIC_LINT0 = 0x350, // LVT LINT0
+ APIC_LINT1 = 0x360, // LVT LINT1
+ APIC_ERROR = 0x370, // LVT Error
+ APIC_TICR = 0x380, // Initial Count (for Timer)
+ APIC_TCCR = 0x390, // Current Count (for Timer)
+ APIC_TDCR = 0x3E0, // Divide Configuration (for Timer)
+ };
- enum IOAPICRegisters
- {
- GetIOAPICVersion = 0x1
- };
+ enum IOAPICRegisters
+ {
+ GetIOAPICVersion = 0x1
+ };
- enum IOAPICFlags
- {
- ActiveHighLow = 2,
- EdgeLevel = 8
- };
+ enum IOAPICFlags
+ {
+ ActiveHighLow = 2,
+ EdgeLevel = 8
+ };
- enum APICDeliveryMode
- {
- Fixed = 0b000,
- LowestPriority = 0b001, /* Reserved */
- SMI = 0b010,
- APIC_DELIVERY_MODE_RESERVED0 = 0b011, /* Reserved */
- NMI = 0b100,
- INIT = 0b101,
- Startup = 0b110,
- ExtINT = 0b111 /* Reserved */
- };
+ enum APICDeliveryMode
+ {
+ Fixed = 0b000,
+ LowestPriority = 0b001, /* Reserved */
+ SMI = 0b010,
+ APIC_DELIVERY_MODE_RESERVED0 = 0b011, /* Reserved */
+ NMI = 0b100,
+ INIT = 0b101,
+ Startup = 0b110,
+ ExtINT = 0b111 /* Reserved */
+ };
- enum APICDestinationMode
- {
- Physical = 0b0,
- Logical = 0b1
- };
+ enum APICDestinationMode
+ {
+ Physical = 0b0,
+ Logical = 0b1
+ };
- enum APICDeliveryStatus
- {
- Idle = 0b0,
- SendPending = 0b1
- };
+ enum APICDeliveryStatus
+ {
+ Idle = 0b0,
+ SendPending = 0b1
+ };
- enum APICLevel
- {
- DeAssert = 0b0,
- Assert = 0b1
- };
+ enum APICLevel
+ {
+ DeAssert = 0b0,
+ Assert = 0b1
+ };
- enum APICTriggerMode
- {
- Edge = 0b0,
- Level = 0b1
- };
+ enum APICTriggerMode
+ {
+ Edge = 0b0,
+ Level = 0b1
+ };
- enum APICDestinationShorthand
- {
- NoShorthand = 0b00,
- Self = 0b01,
- AllIncludingSelf = 0b10,
- AllExcludingSelf = 0b11
- };
+ enum APICDestinationShorthand
+ {
+ NoShorthand = 0b00,
+ Self = 0b01,
+ AllIncludingSelf = 0b10,
+ AllExcludingSelf = 0b11
+ };
- enum LVTTimerDivide
- {
- DivideBy2 = 0b000,
- DivideBy4 = 0b001,
- DivideBy8 = 0b010,
- DivideBy16 = 0b011,
- DivideBy32 = 0b100,
- DivideBy64 = 0b101,
- DivideBy128 = 0b110,
- DivideBy1 = 0b111
- };
+ enum LVTTimerDivide
+ {
+ DivideBy2 = 0b000,
+ DivideBy4 = 0b001,
+ DivideBy8 = 0b010,
+ DivideBy16 = 0b011,
+ DivideBy32 = 0b100,
+ DivideBy64 = 0b101,
+ DivideBy128 = 0b110,
+ DivideBy1 = 0b111
+ };
- enum LVTTimerMask
- {
- Unmasked = 0b0,
- Masked = 0b1
- };
+ enum LVTTimerMask
+ {
+ Unmasked = 0b0,
+ Masked = 0b1
+ };
- enum LVTTimerMode
- {
- OneShot = 0b00,
- Periodic = 0b01,
- TSCDeadline = 0b10
- };
+ enum LVTTimerMode
+ {
+ OneShot = 0b00,
+ Periodic = 0b01,
+ TSCDeadline = 0b10
+ };
- typedef union
- {
- struct
- {
- /** @brief Interrupt Vector */
- uint64_t Vector : 8;
- /** @brief Reserved */
- uint64_t Reserved0 : 4;
- /**
- * @brief Delivery Status
- *
- * 0: Idle
- * 1: Send Pending
- */
- uint64_t DeliveryStatus : 1;
- /** @brief Reserved */
- uint64_t Reserved1 : 3;
- /**
- * @brief Mask
- *
- * 0: Not masked
- * 1: Masked
- */
- uint64_t Mask : 1;
- /** @brief Timer Mode
- *
- * 0: One-shot
- * 1: Periodic
- * 2: TSC-Deadline
- */
- uint64_t TimerMode : 1;
- /** @brief Reserved */
- uint64_t Reserved2 : 14;
- };
- uint64_t raw;
- } __packed LVTTimer;
+ typedef union
+ {
+ struct
+ {
+ /** @brief Interrupt Vector */
+ uint64_t Vector : 8;
+ /** @brief Reserved */
+ uint64_t Reserved0 : 4;
+ /**
+ * @brief Delivery Status
+ *
+ * 0: Idle
+ * 1: Send Pending
+ */
+ uint64_t DeliveryStatus : 1;
+ /** @brief Reserved */
+ uint64_t Reserved1 : 3;
+ /**
+ * @brief Mask
+ *
+ * 0: Not masked
+ * 1: Masked
+ */
+ uint64_t Mask : 1;
+ /** @brief Timer Mode
+ *
+ * 0: One-shot
+ * 1: Periodic
+ * 2: TSC-Deadline
+ */
+ uint64_t TimerMode : 1;
+ /** @brief Reserved */
+ uint64_t Reserved2 : 14;
+ };
+ uint64_t raw;
+ } __packed LVTTimer;
- typedef union
- {
- struct
- {
- /** @brief Spurious Vector */
- uint64_t Vector : 8;
- /** @brief Enable or disable APIC software */
- uint64_t Software : 1;
- /** @brief Focus Processor Checking */
- uint64_t FocusProcessorChecking : 1;
- /** @brief Reserved */
- uint64_t Reserved : 2;
- /** @brief Disable EOI Broadcast */
- uint64_t DisableEOIBroadcast : 1;
- /** @brief Reserved */
- uint64_t Reserved1 : 19;
- };
- uint64_t raw;
- } __packed Spurious;
+ typedef union
+ {
+ struct
+ {
+ /** @brief Spurious Vector */
+ uint64_t Vector : 8;
+ /** @brief Enable or disable APIC software */
+ uint64_t Software : 1;
+ /** @brief Focus Processor Checking */
+ uint64_t FocusProcessorChecking : 1;
+ /** @brief Reserved */
+ uint64_t Reserved : 2;
+ /** @brief Disable EOI Broadcast */
+ uint64_t DisableEOIBroadcast : 1;
+ /** @brief Reserved */
+ uint64_t Reserved1 : 19;
+ };
+ uint64_t raw;
+ } __packed Spurious;
- typedef union
- {
- struct
- {
- /** @brief Interrupt Vector */
- uint64_t Vector : 8;
- /** @brief Delivery Mode */
- uint64_t DeliveryMode : 3;
- /** @brief Destination Mode
- *
- * 0: Physical
- * 1: Logical
- */
- uint64_t DestinationMode : 1;
- /** @brief Delivery Status
- *
- * @note Reserved when in x2APIC mode
- */
- uint64_t DeliveryStatus : 1;
- /** @brief Reserved */
- uint64_t Reserved0 : 1;
- /** @brief Level
- *
- * 0: Deassert
- * 1: Assert
- */
- uint64_t Level : 1;
- /** @brief Trigger Mode
- *
- * 0: Edge
- * 1: Level
- */
- uint64_t TriggerMode : 1;
- /** @brief Reserved */
- uint64_t Reserved1 : 2;
- /** @brief Destination Shorthand
- *
- * 0: No shorthand
- * 1: Self
- * 2: All including self
- * 3: All excluding self
- */
- uint64_t DestinationShorthand : 2;
- /** @brief Reserved */
- uint64_t Reserved2 : 12;
- };
- uint64_t raw;
- } __packed InterruptCommandRegisterLow;
+ typedef union
+ {
+ struct
+ {
+ /** @brief Interrupt Vector */
+ uint64_t Vector : 8;
+ /** @brief Delivery Mode */
+ uint64_t DeliveryMode : 3;
+ /** @brief Destination Mode
+ *
+ * 0: Physical
+ * 1: Logical
+ */
+ uint64_t DestinationMode : 1;
+ /** @brief Delivery Status
+ *
+ * @note Reserved when in x2APIC mode
+ */
+ uint64_t DeliveryStatus : 1;
+ /** @brief Reserved */
+ uint64_t Reserved0 : 1;
+ /** @brief Level
+ *
+ * 0: Deassert
+ * 1: Assert
+ */
+ uint64_t Level : 1;
+ /** @brief Trigger Mode
+ *
+ * 0: Edge
+ * 1: Level
+ */
+ uint64_t TriggerMode : 1;
+ /** @brief Reserved */
+ uint64_t Reserved1 : 2;
+ /** @brief Destination Shorthand
+ *
+ * 0: No shorthand
+ * 1: Self
+ * 2: All including self
+ * 3: All excluding self
+ */
+ uint64_t DestinationShorthand : 2;
+ /** @brief Reserved */
+ uint64_t Reserved2 : 12;
+ };
+ uint64_t raw;
+ } __packed InterruptCommandRegisterLow;
- typedef union
- {
- struct
- {
- /** @brief Reserved */
- uint64_t Reserved0 : 24;
- /** @brief Destination */
- uint64_t Destination : 8;
- };
- uint64_t raw;
- } __packed InterruptCommandRegisterHigh;
+ typedef union
+ {
+ struct
+ {
+ /** @brief Reserved */
+ uint64_t Reserved0 : 24;
+ /** @brief Destination */
+ uint64_t Destination : 8;
+ };
+ uint64_t raw;
+ } __packed InterruptCommandRegisterHigh;
- typedef union
- {
- struct
- {
- /** @brief Interrupt Vector */
- uint64_t Vector : 8;
- /** @brief Delivery Mode */
- uint64_t DeliveryMode : 3;
- /** @brief Destination Mode
- *
- * 0: Physical
- * 1: Logical
- */
- uint64_t DestinationMode : 1;
- /** @brief Delivery Status */
- uint64_t DeliveryStatus : 1;
- /** @brief Interrupt Input Pin Polarity
- *
- * 0: Active High
- * 1: Active Low
- */
- uint64_t Polarity : 1;
- /** @brief Remote IRR */
- uint64_t RemoteIRR : 1;
- /** @brief Trigger Mode
- *
- * 0: Edge
- * 1: Level
- */
- uint64_t TriggerMode : 1;
- /** @brief Mask */
- uint64_t Mask : 1;
- /** @brief Reserved */
- uint64_t Reserved0 : 15;
- /** @brief Reserved */
- uint64_t Reserved1 : 24;
- /** @brief Destination */
- uint64_t DestinationID : 8;
- };
- struct
- {
- uint64_t Low;
- uint64_t High;
- } split;
- uint64_t raw;
- } __packed IOAPICRedirectEntry;
+ typedef union
+ {
+ struct
+ {
+ /** @brief Interrupt Vector */
+ uint64_t Vector : 8;
+ /** @brief Delivery Mode */
+ uint64_t DeliveryMode : 3;
+ /** @brief Destination Mode
+ *
+ * 0: Physical
+ * 1: Logical
+ */
+ uint64_t DestinationMode : 1;
+ /** @brief Delivery Status */
+ uint64_t DeliveryStatus : 1;
+ /** @brief Interrupt Input Pin Polarity
+ *
+ * 0: Active High
+ * 1: Active Low
+ */
+ uint64_t Polarity : 1;
+ /** @brief Remote IRR */
+ uint64_t RemoteIRR : 1;
+ /** @brief Trigger Mode
+ *
+ * 0: Edge
+ * 1: Level
+ */
+ uint64_t TriggerMode : 1;
+ /** @brief Mask */
+ uint64_t Mask : 1;
+ /** @brief Reserved */
+ uint64_t Reserved0 : 15;
+ /** @brief Reserved */
+ uint64_t Reserved1 : 24;
+ /** @brief Destination */
+ uint64_t DestinationID : 8;
+ };
+ struct
+ {
+ uint64_t Low;
+ uint64_t High;
+ } split;
+ uint64_t raw;
+ } __packed IOAPICRedirectEntry;
- typedef union
- {
- struct
- {
- uint64_t Version : 8;
- uint64_t Reserved : 8;
- uint64_t MaximumRedirectionEntry : 8;
- uint64_t Reserved2 : 8;
- };
- uint64_t raw;
- } __packed IOAPICVersion;
+ typedef union
+ {
+ struct
+ {
+ uint64_t Version : 8;
+ uint64_t Reserved : 8;
+ uint64_t MaximumRedirectionEntry : 8;
+ uint64_t Reserved2 : 8;
+ };
+ uint64_t raw;
+ } __packed IOAPICVersion;
- class APIC
- {
- private:
- bool x2APICSupported = false;
- uint64_t APICBaseAddress = 0;
+ class APIC
+ {
+ private:
+ bool x2APICSupported = false;
+ uint64_t APICBaseAddress = 0;
- public:
- uint32_t Read(uint32_t Register);
- void Write(uint32_t Register, uint32_t Value);
- void IOWrite(uint64_t Base, uint32_t Register, uint32_t Value);
- uint32_t IORead(uint64_t Base, uint32_t Register);
- void EOI();
- void RedirectIRQs(int CPU = 0);
- void WaitForIPI();
- void IPI(int CPU, InterruptCommandRegisterLow icr);
- void SendInitIPI(int CPU);
- void SendStartupIPI(int CPU, uint64_t StartupAddress);
- uint32_t IOGetMaxRedirect(uint32_t APICID);
- void RawRedirectIRQ(uint16_t Vector, uint32_t GSI, uint16_t Flags, int CPU, int Status);
- void RedirectIRQ(int CPU, uint16_t IRQ, int Status);
- APIC(int Core);
- ~APIC();
- };
+ public:
+ uint32_t Read(uint32_t Register);
+ void Write(uint32_t Register, uint32_t Value);
+ void IOWrite(uint64_t Base, uint32_t Register, uint32_t Value);
+ uint32_t IORead(uint64_t Base, uint32_t Register);
+ void EOI();
+ void RedirectIRQs(int CPU = 0);
+ void WaitForIPI();
+ void IPI(int CPU, InterruptCommandRegisterLow icr);
+ void SendInitIPI(int CPU);
+ void SendStartupIPI(int CPU, uint64_t StartupAddress);
+ uint32_t IOGetMaxRedirect(uint32_t APICID);
+ void RawRedirectIRQ(uint16_t Vector, uint32_t GSI, uint16_t Flags, int CPU, int Status);
+ void RedirectIRQ(int CPU, uint16_t IRQ, int Status);
+ APIC(int Core);
+ ~APIC();
+ };
- class Timer : public Interrupts::Handler
- {
- private:
- APIC *lapic;
- uint64_t Ticks = 0;
- void OnInterruptReceived(CPU::x64::TrapFrame *Frame);
+ class Timer : public Interrupts::Handler
+ {
+ private:
+ APIC *lapic;
+ uint64_t Ticks = 0;
+ void OnInterruptReceived(CPU::x64::TrapFrame *Frame);
- public:
- uint64_t GetTicks() { return Ticks; }
- void OneShot(uint32_t Vector, uint64_t Miliseconds);
- Timer(APIC *apic);
- ~Timer();
- };
+ public:
+ uint64_t GetTicks() { return Ticks; }
+ void OneShot(uint32_t Vector, uint64_t Miliseconds);
+ Timer(APIC *apic);
+ ~Timer();
+ };
}
#endif // !__FENNIX_KERNEL_APIC_H__
diff --git a/Architecture/amd64/cpu/idt.hpp b/Architecture/amd64/cpu/idt.hpp
index ccc1da87..95ff5fbd 100644
--- a/Architecture/amd64/cpu/idt.hpp
+++ b/Architecture/amd64/cpu/idt.hpp
@@ -22,63 +22,63 @@
namespace InterruptDescriptorTable
{
- typedef enum _InterruptGateType
- {
- TASK = 0b101,
- INT_16BIT = 0b110,
- TRAP_16BIT = 0b111,
- INT_32BIT = 0b1110,
- TRAP_32BIT = 0b1111,
- } InterruptGateType;
+ typedef enum _InterruptGateType
+ {
+ TASK = 0b101,
+ INT_16BIT = 0b110,
+ TRAP_16BIT = 0b111,
+ INT_32BIT = 0b1110,
+ TRAP_32BIT = 0b1111,
+ } InterruptGateType;
- typedef enum _InterruptRingType
- {
- RING0 = 0b0,
- RING1 = 0b1,
- RING2 = 0b10,
- RING3 = 0b11,
- } InterruptRingType;
+ typedef enum _InterruptRingType
+ {
+ RING0 = 0b0,
+ RING1 = 0b1,
+ RING2 = 0b10,
+ RING3 = 0b11,
+ } InterruptRingType;
- typedef enum _InterruptStackTableType
- {
- IST0 = 0b0,
- IST1 = 0b1,
- IST2 = 0b10,
- IST3 = 0b11,
- IST4 = 0b100,
- IST5 = 0b101,
- IST6 = 0b110,
- } InterruptStackTableType;
+ typedef enum _InterruptStackTableType
+ {
+ IST0 = 0b0,
+ IST1 = 0b1,
+ IST2 = 0b10,
+ IST3 = 0b11,
+ IST4 = 0b100,
+ IST5 = 0b101,
+ IST6 = 0b110,
+ } InterruptStackTableType;
- typedef struct _InterruptDescriptorTableEntry
- {
- uint64_t BaseLow : 16;
- uint64_t SegmentSelector : 16;
- uint64_t InterruptStackTable : 3;
- uint64_t Reserved1 : 5;
- uint64_t Flags : 4;
- uint64_t Reserved2 : 1;
- uint64_t Ring : 2;
- uint64_t Present : 1;
- uint64_t BaseHigh : 48;
- uint64_t Reserved3 : 32;
- } __packed InterruptDescriptorTableEntry;
+ typedef struct _InterruptDescriptorTableEntry
+ {
+ uint64_t BaseLow : 16;
+ uint64_t SegmentSelector : 16;
+ uint64_t InterruptStackTable : 3;
+ uint64_t Reserved1 : 5;
+ uint64_t Flags : 4;
+ uint64_t Reserved2 : 1;
+ uint64_t Ring : 2;
+ uint64_t Present : 1;
+ uint64_t BaseHigh : 48;
+ uint64_t Reserved3 : 32;
+ } __packed InterruptDescriptorTableEntry;
- typedef struct _InterruptDescriptorTableDescriptor
- {
- uint16_t Length;
- InterruptDescriptorTableEntry *Entries;
- } __packed InterruptDescriptorTableDescriptor;
+ typedef struct _InterruptDescriptorTableDescriptor
+ {
+ uint16_t Length;
+ InterruptDescriptorTableEntry *Entries;
+ } __packed InterruptDescriptorTableDescriptor;
- void SetEntry(uint8_t Index,
- void (*Base)(),
- InterruptStackTableType InterruptStackTable,
- InterruptGateType Gate,
- InterruptRingType Ring,
- bool Present,
- uint16_t SegmentSelector);
+ void SetEntry(uint8_t Index,
+ void (*Base)(),
+ InterruptStackTableType InterruptStackTable,
+ InterruptGateType Gate,
+ InterruptRingType Ring,
+ bool Present,
+ uint16_t SegmentSelector);
- void Init(int Core);
+ void Init(int Core);
}
#endif // !__FENNIX_KERNEL_IDT_H__
diff --git a/Architecture/i386/AdvancedConfigurationAndPowerInterface.cpp b/Architecture/i386/AdvancedConfigurationAndPowerInterface.cpp
new file mode 100644
index 00000000..046f864a
--- /dev/null
+++ b/Architecture/i386/AdvancedConfigurationAndPowerInterface.cpp
@@ -0,0 +1,158 @@
+/*
+ This file is part of Fennix Kernel.
+
+ Fennix Kernel is free software: you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation, either version 3 of
+ the License, or (at your option) any later version.
+
+ Fennix Kernel is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with Fennix Kernel. If not, see .
+*/
+
+#include "acpi.hpp"
+
+#include
+#include
+
+#include "../../kernel.h"
+
+namespace ACPI
+{
+ __no_sanitize("alignment") void *ACPI::FindTable(ACPI::ACPIHeader *ACPIHeader, char *Signature)
+ {
+ for (uint64_t t = 0; t < ((ACPIHeader->Length - sizeof(ACPI::ACPIHeader)) / (XSDTSupported ? 8 : 4)); t++)
+ {
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wint-to-pointer-cast"
+
+ // TODO: Should I be concerned about unaligned memory access?
+ ACPI::ACPIHeader *SDTHdr = nullptr;
+ if (XSDTSupported)
+ SDTHdr = (ACPI::ACPIHeader *)(*(uint64_t *)((uint64_t)ACPIHeader + sizeof(ACPI::ACPIHeader) + (t * 8)));
+ else
+ SDTHdr = (ACPI::ACPIHeader *)(*(uint32_t *)((uint64_t)ACPIHeader + sizeof(ACPI::ACPIHeader) + (t * 4)));
+
+#pragma GCC diagnostic pop
+
+ for (int i = 0; i < 4; i++)
+ {
+ if (SDTHdr->Signature[i] != Signature[i])
+ break;
+ if (i == 3)
+ {
+ trace("%s found at address %p", Signature, (uintptr_t)SDTHdr);
+ return SDTHdr;
+ }
+ }
+ }
+ // warn("%s not found!", Signature);
+ return nullptr;
+ }
+
+ void ACPI::SearchTables(ACPIHeader *Header)
+ {
+ if (!Header)
+ return;
+
+ HPET = (HPETHeader *)FindTable(Header, (char *)"HPET");
+ FADT = (FADTHeader *)FindTable(Header, (char *)"FACP");
+ MCFG = (MCFGHeader *)FindTable(Header, (char *)"MCFG");
+ BGRT = (BGRTHeader *)FindTable(Header, (char *)"BGRT");
+ SRAT = (SRATHeader *)FindTable(Header, (char *)"SRAT");
+ TPM2 = (TPM2Header *)FindTable(Header, (char *)"TPM2");
+ TCPA = (TCPAHeader *)FindTable(Header, (char *)"TCPA");
+ WAET = (WAETHeader *)FindTable(Header, (char *)"WAET");
+ MADT = (MADTHeader *)FindTable(Header, (char *)"APIC");
+ HEST = (HESTHeader *)FindTable(Header, (char *)"HEST");
+ FindTable(Header, (char *)"BERT");
+ FindTable(Header, (char *)"CPEP");
+ FindTable(Header, (char *)"DSDT");
+ FindTable(Header, (char *)"ECDT");
+ FindTable(Header, (char *)"EINJ");
+ FindTable(Header, (char *)"ERST");
+ FindTable(Header, (char *)"FACS");
+ FindTable(Header, (char *)"MSCT");
+ FindTable(Header, (char *)"MPST");
+ FindTable(Header, (char *)"OEMx");
+ FindTable(Header, (char *)"PMTT");
+ FindTable(Header, (char *)"PSDT");
+ FindTable(Header, (char *)"RASF");
+ FindTable(Header, (char *)"RSDT");
+ FindTable(Header, (char *)"SBST");
+ FindTable(Header, (char *)"SLIT");
+ FindTable(Header, (char *)"SSDT");
+ FindTable(Header, (char *)"XSDT");
+ FindTable(Header, (char *)"DRTM");
+ FindTable(Header, (char *)"FPDT");
+ FindTable(Header, (char *)"GTDT");
+ FindTable(Header, (char *)"PCCT");
+ FindTable(Header, (char *)"S3PT");
+ FindTable(Header, (char *)"MATR");
+ FindTable(Header, (char *)"MSDM");
+ FindTable(Header, (char *)"WPBT");
+ FindTable(Header, (char *)"OSDT");
+ FindTable(Header, (char *)"RSDP");
+ FindTable(Header, (char *)"NFIT");
+ FindTable(Header, (char *)"ASF!");
+ FindTable(Header, (char *)"BOOT");
+ FindTable(Header, (char *)"CSRT");
+ FindTable(Header, (char *)"DBG2");
+ FindTable(Header, (char *)"DBGP");
+ FindTable(Header, (char *)"DMAR");
+ FindTable(Header, (char *)"IBFT");
+ FindTable(Header, (char *)"IORT");
+ FindTable(Header, (char *)"IVRS");
+ FindTable(Header, (char *)"LPIT");
+ FindTable(Header, (char *)"MCHI");
+ FindTable(Header, (char *)"MTMR");
+ FindTable(Header, (char *)"SLIC");
+ FindTable(Header, (char *)"SPCR");
+ FindTable(Header, (char *)"SPMI");
+ FindTable(Header, (char *)"UEFI");
+ FindTable(Header, (char *)"VRTC");
+ FindTable(Header, (char *)"WDAT");
+ FindTable(Header, (char *)"WDDT");
+ FindTable(Header, (char *)"WDRT");
+ FindTable(Header, (char *)"ATKG");
+ FindTable(Header, (char *)"GSCI");
+ FindTable(Header, (char *)"IEIT");
+ FindTable(Header, (char *)"HMAT");
+ FindTable(Header, (char *)"CEDT");
+ FindTable(Header, (char *)"AEST");
+ }
+
+ ACPI::ACPI()
+ {
+ trace("Initializing ACPI");
+ if (bInfo.RSDP->Revision >= 2 && bInfo.RSDP->XSDTAddress)
+ {
+ debug("XSDT supported");
+ XSDTSupported = true;
+ XSDT = (ACPIHeader *)(bInfo.RSDP->XSDTAddress);
+ }
+ else
+ {
+ debug("RSDT supported");
+ XSDT = (ACPIHeader *)(uintptr_t)bInfo.RSDP->RSDTAddress;
+ }
+
+ this->SearchTables(XSDT);
+
+ if (FADT)
+ {
+ outb(s_cst(uint16_t, FADT->SMI_CommandPort), FADT->AcpiEnable);
+ while (!(inw(s_cst(uint16_t, FADT->PM1aControlBlock)) & 1))
+ ;
+ }
+ }
+
+ ACPI::~ACPI()
+ {
+ }
+}
diff --git a/Architecture/i386/Bootstrap/Multiboot/1/Header.s b/Architecture/i386/Bootstrap/Multiboot/1/Header.s
index 81fce85a..56fff329 100644
--- a/Architecture/i386/Bootstrap/Multiboot/1/Header.s
+++ b/Architecture/i386/Bootstrap/Multiboot/1/Header.s
@@ -18,7 +18,7 @@
.intel_syntax noprefix
.code32
-.section .multiboot
+.section .multiboot, "a"
.align 4
MULTIBOOT_HEADER:
diff --git a/Architecture/i386/Bootstrap/Multiboot/1/Start.s b/Architecture/i386/Bootstrap/Multiboot/1/Start.s
index 8efbeb24..8d2b2352 100644
--- a/Architecture/i386/Bootstrap/Multiboot/1/Start.s
+++ b/Architecture/i386/Bootstrap/Multiboot/1/Start.s
@@ -16,7 +16,7 @@
*/
.code32
-.section .bootstrap.text
+.section .bootstrap.text, "a"
.global Multiboot1_start
Multiboot1_start:
diff --git a/Architecture/i386/Bootstrap/Multiboot/2/Detect.s b/Architecture/i386/Bootstrap/Multiboot/2/Detect.s
index 319d180e..44f6415a 100644
--- a/Architecture/i386/Bootstrap/Multiboot/2/Detect.s
+++ b/Architecture/i386/Bootstrap/Multiboot/2/Detect.s
@@ -18,7 +18,7 @@
.intel_syntax noprefix
.code32
-.section .bootstrap.text
+.section .bootstrap.text, "a"
.global DetectCPUID
DetectCPUID:
diff --git a/Architecture/i386/Bootstrap/Multiboot/2/GDT32.s b/Architecture/i386/Bootstrap/Multiboot/2/GDT32.s
index 30974ac9..5768dff2 100644
--- a/Architecture/i386/Bootstrap/Multiboot/2/GDT32.s
+++ b/Architecture/i386/Bootstrap/Multiboot/2/GDT32.s
@@ -18,7 +18,7 @@
.intel_syntax noprefix
.code32
-.section .bootstrap.text
+.section .bootstrap.text, "a"
.align 32
.global gdtr
diff --git a/Architecture/i386/Bootstrap/Multiboot/2/Header.s b/Architecture/i386/Bootstrap/Multiboot/2/Header.s
index 2f8d0f74..5f00e96e 100644
--- a/Architecture/i386/Bootstrap/Multiboot/2/Header.s
+++ b/Architecture/i386/Bootstrap/Multiboot/2/Header.s
@@ -21,7 +21,7 @@
.extern Multiboot2_start
/* https://www.gnu.org/software/grub/manual/multiboot2/multiboot.html */
-.section .multiboot2
+.section .multiboot2, "a"
.align 0x1000
MULTIBOOT2_HEADER_START:
.long 0xE85250D6
diff --git a/Architecture/i386/Bootstrap/Multiboot/2/Multiboot.cpp b/Architecture/i386/Bootstrap/Multiboot/2/Multiboot.cpp
index db3e3d41..0a4e5caf 100644
--- a/Architecture/i386/Bootstrap/Multiboot/2/Multiboot.cpp
+++ b/Architecture/i386/Bootstrap/Multiboot/2/Multiboot.cpp
@@ -25,291 +25,291 @@
EXTERNC void multiboot_main(uintptr_t Magic, uintptr_t Info)
{
- if (Info == NULL || Magic == NULL)
- {
- if (Magic == NULL)
- error("Multiboot magic is NULL");
- if (Info == NULL)
- error("Multiboot info is NULL");
- CPU::Stop();
- }
- else if (Magic != MULTIBOOT2_BOOTLOADER_MAGIC)
- {
- error("Multiboot magic is invalid (%#x != %#x)", Magic, MULTIBOOT2_BOOTLOADER_MAGIC);
- CPU::Stop();
- }
+ if (Info == NULL || Magic == NULL)
+ {
+ if (Magic == NULL)
+ error("Multiboot magic is NULL");
+ if (Info == NULL)
+ error("Multiboot info is NULL");
+ CPU::Stop();
+ }
+ else if (Magic != MULTIBOOT2_BOOTLOADER_MAGIC)
+ {
+ error("Multiboot magic is invalid (%#x != %#x)", Magic, MULTIBOOT2_BOOTLOADER_MAGIC);
+ CPU::Stop();
+ }
- BootInfo mb2binfo{};
+ BootInfo mb2binfo{};
- {
- uint64_t div = 1193180 / 1000;
- outb(0x43, 0xB6);
- outb(0x42, (uint8_t)div);
- outb(0x42, (uint8_t)(div >> 8));
- uint8_t tmp = inb(0x61);
- if (tmp != (tmp | 3))
- outb(0x61, tmp | 3);
+ {
+ uint64_t div = 1193180 / 1000;
+ outb(0x43, 0xB6);
+ outb(0x42, (uint8_t)div);
+ outb(0x42, (uint8_t)(div >> 8));
+ uint8_t tmp = inb(0x61);
+ if (tmp != (tmp | 3))
+ outb(0x61, tmp | 3);
- int pos = 0;
- auto InfoAddress = Info;
- for (auto Tag = (struct multiboot_tag *)((uint8_t *)InfoAddress + 8);
- ;
- Tag = (struct multiboot_tag *)((multiboot_uint8_t *)Tag + ((Tag->size + 7) & ~7)))
- {
- if (Tag->type == MULTIBOOT_TAG_TYPE_END)
- {
- debug("End of multiboot2 tags");
- break;
- }
+ int pos = 0;
+ auto InfoAddress = Info;
+ for (auto Tag = (struct multiboot_tag *)((uint8_t *)InfoAddress + 8);
+ ;
+ Tag = (struct multiboot_tag *)((multiboot_uint8_t *)Tag + ((Tag->size + 7) & ~7)))
+ {
+ if (Tag->type == MULTIBOOT_TAG_TYPE_END)
+ {
+ debug("End of multiboot2 tags");
+ break;
+ }
- switch (Tag->type)
- {
- case MULTIBOOT_TAG_TYPE_CMDLINE:
- {
- strncpy(mb2binfo.Kernel.CommandLine,
- ((multiboot_tag_string *)Tag)->string,
- strlen(((multiboot_tag_string *)Tag)->string));
- debug("Kernel command line: %s", mb2binfo.Kernel.CommandLine);
- break;
- }
- case MULTIBOOT_TAG_TYPE_BOOT_LOADER_NAME:
- {
- strncpy(mb2binfo.Bootloader.Name,
- ((multiboot_tag_string *)Tag)->string,
- strlen(((multiboot_tag_string *)Tag)->string));
- debug("Bootloader name: %s", mb2binfo.Bootloader.Name);
- break;
- }
- case MULTIBOOT_TAG_TYPE_MODULE:
- {
- multiboot_tag_module *module = (multiboot_tag_module *)Tag;
- static int module_count = 0;
- mb2binfo.Modules[module_count].Address = (void *)(uint64_t)module->mod_start;
- mb2binfo.Modules[module_count].Size = module->mod_end - module->mod_start;
- strncpy(mb2binfo.Modules[module_count].Path, "(null)", 6);
- strncpy(mb2binfo.Modules[module_count].CommandLine, module->cmdline,
- strlen(module->cmdline));
- debug("Module: %s", mb2binfo.Modules[module_count].Path);
- module_count++;
- break;
- }
- case MULTIBOOT_TAG_TYPE_BASIC_MEMINFO:
- {
- multiboot_tag_basic_meminfo *meminfo = (multiboot_tag_basic_meminfo *)Tag;
- fixme("basic_meminfo->[mem_lower: %#x, mem_upper: %#x]",
- meminfo->mem_lower, meminfo->mem_upper);
- break;
- }
- case MULTIBOOT_TAG_TYPE_BOOTDEV:
- {
- multiboot_tag_bootdev *bootdev = (multiboot_tag_bootdev *)Tag;
- fixme("bootdev->[biosdev: %#x, slice: %#x, part: %#x]",
- bootdev->biosdev, bootdev->slice, bootdev->part);
- break;
- }
- case MULTIBOOT_TAG_TYPE_MMAP:
- {
- multiboot_tag_mmap *mmap = (multiboot_tag_mmap *)Tag;
- size_t EntryCount = mmap->size / sizeof(multiboot_mmap_entry);
- mb2binfo.Memory.Entries = EntryCount;
- for (uint32_t i = 0; i < EntryCount; i++)
- {
- if (i > MAX_MEMORY_ENTRIES)
- {
- warn("Too many memory entries, skipping the rest...");
- break;
- }
- multiboot_mmap_entry entry = mmap->entries[i];
- mb2binfo.Memory.Size += (size_t)entry.len;
- switch (entry.type)
- {
- case MULTIBOOT_MEMORY_AVAILABLE:
- mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
- mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
- mb2binfo.Memory.Entry[i].Type = Usable;
- break;
- case MULTIBOOT_MEMORY_RESERVED:
- mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
- mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
- mb2binfo.Memory.Entry[i].Type = Reserved;
- break;
- case MULTIBOOT_MEMORY_ACPI_RECLAIMABLE:
- mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
- mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
- mb2binfo.Memory.Entry[i].Type = ACPIReclaimable;
- break;
- case MULTIBOOT_MEMORY_NVS:
- mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
- mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
- mb2binfo.Memory.Entry[i].Type = ACPINVS;
- break;
- case MULTIBOOT_MEMORY_BADRAM:
- mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
- mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
- mb2binfo.Memory.Entry[i].Type = BadMemory;
- break;
- default:
- mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
- mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
- mb2binfo.Memory.Entry[i].Type = Unknown;
- break;
- }
- debug("Memory entry: [BaseAddress: %#x, Length: %#x, Type: %d]",
- mb2binfo.Memory.Entry[i].BaseAddress,
- mb2binfo.Memory.Entry[i].Length,
- mb2binfo.Memory.Entry[i].Type);
- }
- break;
- }
- case MULTIBOOT_TAG_TYPE_VBE:
- {
- multiboot_tag_vbe *vbe = (multiboot_tag_vbe *)Tag;
- fixme("vbe->[vbe_mode: %#x, vbe_interface_seg: %#x, vbe_interface_off: %#x, vbe_interface_len: %#x]",
- vbe->vbe_mode, vbe->vbe_interface_seg, vbe->vbe_interface_off, vbe->vbe_interface_len);
- break;
- }
- case MULTIBOOT_TAG_TYPE_FRAMEBUFFER:
- {
- multiboot_tag_framebuffer *fb = (multiboot_tag_framebuffer *)Tag;
- static int fb_count = 0;
- mb2binfo.Framebuffer[fb_count].BaseAddress = (void *)fb->common.framebuffer_addr;
- mb2binfo.Framebuffer[fb_count].Width = fb->common.framebuffer_width;
- mb2binfo.Framebuffer[fb_count].Height = fb->common.framebuffer_height;
- mb2binfo.Framebuffer[fb_count].Pitch = fb->common.framebuffer_pitch;
- mb2binfo.Framebuffer[fb_count].BitsPerPixel = fb->common.framebuffer_bpp;
- switch (fb->common.framebuffer_type)
- {
- case MULTIBOOT_FRAMEBUFFER_TYPE_INDEXED:
- {
- mb2binfo.Framebuffer[fb_count].Type = Indexed;
- break;
- }
- case MULTIBOOT_FRAMEBUFFER_TYPE_RGB:
- {
- mb2binfo.Framebuffer[fb_count].Type = RGB;
- mb2binfo.Framebuffer[fb_count].RedMaskSize = fb->framebuffer_red_mask_size;
- mb2binfo.Framebuffer[fb_count].RedMaskShift = fb->framebuffer_red_field_position;
- mb2binfo.Framebuffer[fb_count].GreenMaskSize = fb->framebuffer_green_mask_size;
- mb2binfo.Framebuffer[fb_count].GreenMaskShift = fb->framebuffer_green_field_position;
- mb2binfo.Framebuffer[fb_count].BlueMaskSize = fb->framebuffer_blue_mask_size;
- mb2binfo.Framebuffer[fb_count].BlueMaskShift = fb->framebuffer_blue_field_position;
- break;
- }
- case MULTIBOOT_FRAMEBUFFER_TYPE_EGA_TEXT:
- {
- mb2binfo.Framebuffer[fb_count].Type = EGA;
- break;
- }
- default:
- {
- mb2binfo.Framebuffer[fb_count].Type = Unknown_Framebuffer_Type;
- break;
- }
- }
- debug("Framebuffer %d: %dx%d %d bpp", fb_count, fb->common.framebuffer_width, fb->common.framebuffer_height, fb->common.framebuffer_bpp);
- debug("More info:\nAddress: %p\nPitch: %lld\nMemoryModel: %d\nRedMaskSize: %d\nRedMaskShift: %d\nGreenMaskSize: %d\nGreenMaskShift: %d\nBlueMaskSize: %d\nBlueMaskShift: %d",
- fb->common.framebuffer_addr, fb->common.framebuffer_pitch, fb->common.framebuffer_type,
- fb->framebuffer_red_mask_size, fb->framebuffer_red_field_position, fb->framebuffer_green_mask_size,
- fb->framebuffer_green_field_position, fb->framebuffer_blue_mask_size, fb->framebuffer_blue_field_position);
- fb_count++;
- break;
- }
- case MULTIBOOT_TAG_TYPE_ELF_SECTIONS:
- {
- multiboot_tag_elf_sections *elf = (multiboot_tag_elf_sections *)Tag;
- mb2binfo.Kernel.Symbols.Num = elf->num;
- mb2binfo.Kernel.Symbols.EntSize = elf->entsize;
- mb2binfo.Kernel.Symbols.Shndx = elf->shndx;
- mb2binfo.Kernel.Symbols.Sections = (uintptr_t)&elf->sections;
- break;
- }
- case MULTIBOOT_TAG_TYPE_APM:
- {
- multiboot_tag_apm *apm = (multiboot_tag_apm *)Tag;
- fixme("apm->[version: %d, cseg: %d, offset: %d, cseg_16: %d, dseg: %d, flags: %d, cseg_len: %d, cseg_16_len: %d, dseg_len: %d]",
- apm->version, apm->cseg, apm->offset, apm->cseg_16, apm->dseg, apm->flags, apm->cseg_len, apm->cseg_16_len, apm->dseg_len);
- break;
- }
- case MULTIBOOT_TAG_TYPE_EFI32:
- {
- multiboot_tag_efi32 *efi32 = (multiboot_tag_efi32 *)Tag;
- fixme("efi32->[pointer: %p, size: %d]", efi32->pointer, efi32->size);
- break;
- }
- case MULTIBOOT_TAG_TYPE_EFI64:
- {
- multiboot_tag_efi64 *efi64 = (multiboot_tag_efi64 *)Tag;
- fixme("efi64->[pointer: %p, size: %d]", efi64->pointer, efi64->size);
- break;
- }
- case MULTIBOOT_TAG_TYPE_SMBIOS:
- {
- multiboot_tag_smbios *smbios = (multiboot_tag_smbios *)Tag;
- fixme("smbios->[major: %d, minor: %d]", smbios->major, smbios->minor);
- break;
- }
- case MULTIBOOT_TAG_TYPE_ACPI_OLD:
- {
- mb2binfo.RSDP = (BootInfo::RSDPInfo *)((multiboot_tag_old_acpi *)Tag)->rsdp;
- debug("OLD ACPI RSDP: %p", mb2binfo.RSDP);
- break;
- }
- case MULTIBOOT_TAG_TYPE_ACPI_NEW:
- {
- mb2binfo.RSDP = (BootInfo::RSDPInfo *)((multiboot_tag_new_acpi *)Tag)->rsdp;
- debug("NEW ACPI RSDP: %p", mb2binfo.RSDP);
- break;
- }
- case MULTIBOOT_TAG_TYPE_NETWORK:
- {
- multiboot_tag_network *net = (multiboot_tag_network *)Tag;
- fixme("network->[dhcpack: %p]", net->dhcpack);
- break;
- }
- case MULTIBOOT_TAG_TYPE_EFI_MMAP:
- {
- multiboot_tag_efi_mmap *efi_mmap = (multiboot_tag_efi_mmap *)Tag;
- fixme("efi_mmap->[descr_size: %d, descr_vers: %d, efi_mmap: %p]",
- efi_mmap->descr_size, efi_mmap->descr_vers, efi_mmap->efi_mmap);
- break;
- }
- case MULTIBOOT_TAG_TYPE_EFI_BS:
- {
- fixme("efi_bs->[%p] (unknown structure)", Tag);
- break;
- }
- case MULTIBOOT_TAG_TYPE_EFI32_IH:
- {
- multiboot_tag_efi32_ih *efi32_ih = (multiboot_tag_efi32_ih *)Tag;
- fixme("efi32_ih->[pointer: %p]", efi32_ih->pointer);
- break;
- }
- case MULTIBOOT_TAG_TYPE_EFI64_IH:
- {
- multiboot_tag_efi64_ih *efi64_ih = (multiboot_tag_efi64_ih *)Tag;
- fixme("efi64_ih->[pointer: %p]", efi64_ih->pointer);
- break;
- }
- case MULTIBOOT_TAG_TYPE_LOAD_BASE_ADDR:
- {
- multiboot_tag_load_base_addr *load_base_addr = (multiboot_tag_load_base_addr *)Tag;
- mb2binfo.Kernel.PhysicalBase = (void *)(uint64_t)load_base_addr->load_base_addr;
- mb2binfo.Kernel.VirtualBase = (void *)(uint64_t)(load_base_addr->load_base_addr + 0xFFFFFFFF80000000);
- mb2binfo.Kernel.Size = (size_t)(((uint64_t)&_kernel_end - (uint64_t)&_kernel_start) + ((uint64_t)&_bootstrap_end - (uint64_t)&_bootstrap_start));
- debug("Kernel base: %p (physical) %p (virtual)", mb2binfo.Kernel.PhysicalBase, mb2binfo.Kernel.VirtualBase);
- break;
- }
- default:
- {
- error("Unknown multiboot2 tag type: %d", Tag->type);
- break;
- }
- }
- }
+ switch (Tag->type)
+ {
+ case MULTIBOOT_TAG_TYPE_CMDLINE:
+ {
+ strncpy(mb2binfo.Kernel.CommandLine,
+ ((multiboot_tag_string *)Tag)->string,
+ strlen(((multiboot_tag_string *)Tag)->string));
+ debug("Kernel command line: %s", mb2binfo.Kernel.CommandLine);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_BOOT_LOADER_NAME:
+ {
+ strncpy(mb2binfo.Bootloader.Name,
+ ((multiboot_tag_string *)Tag)->string,
+ strlen(((multiboot_tag_string *)Tag)->string));
+ debug("Bootloader name: %s", mb2binfo.Bootloader.Name);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_MODULE:
+ {
+ multiboot_tag_module *module = (multiboot_tag_module *)Tag;
+ static int module_count = 0;
+ mb2binfo.Modules[module_count].Address = (void *)(uint64_t)module->mod_start;
+ mb2binfo.Modules[module_count].Size = module->mod_end - module->mod_start;
+ strncpy(mb2binfo.Modules[module_count].Path, "(null)", 6);
+ strncpy(mb2binfo.Modules[module_count].CommandLine, module->cmdline,
+ strlen(module->cmdline));
+ debug("Module: %s", mb2binfo.Modules[module_count].Path);
+ module_count++;
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_BASIC_MEMINFO:
+ {
+ multiboot_tag_basic_meminfo *meminfo = (multiboot_tag_basic_meminfo *)Tag;
+ fixme("basic_meminfo->[mem_lower: %#x, mem_upper: %#x]",
+ meminfo->mem_lower, meminfo->mem_upper);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_BOOTDEV:
+ {
+ multiboot_tag_bootdev *bootdev = (multiboot_tag_bootdev *)Tag;
+ fixme("bootdev->[biosdev: %#x, slice: %#x, part: %#x]",
+ bootdev->biosdev, bootdev->slice, bootdev->part);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_MMAP:
+ {
+ multiboot_tag_mmap *mmap = (multiboot_tag_mmap *)Tag;
+ size_t EntryCount = mmap->size / sizeof(multiboot_mmap_entry);
+ mb2binfo.Memory.Entries = EntryCount;
+ for (uint32_t i = 0; i < EntryCount; i++)
+ {
+ if (i > MAX_MEMORY_ENTRIES)
+ {
+ warn("Too many memory entries, skipping the rest...");
+ break;
+ }
+ multiboot_mmap_entry entry = mmap->entries[i];
+ mb2binfo.Memory.Size += (size_t)entry.len;
+ switch (entry.type)
+ {
+ case MULTIBOOT_MEMORY_AVAILABLE:
+ mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
+ mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
+ mb2binfo.Memory.Entry[i].Type = Usable;
+ break;
+ case MULTIBOOT_MEMORY_RESERVED:
+ mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
+ mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
+ mb2binfo.Memory.Entry[i].Type = Reserved;
+ break;
+ case MULTIBOOT_MEMORY_ACPI_RECLAIMABLE:
+ mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
+ mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
+ mb2binfo.Memory.Entry[i].Type = ACPIReclaimable;
+ break;
+ case MULTIBOOT_MEMORY_NVS:
+ mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
+ mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
+ mb2binfo.Memory.Entry[i].Type = ACPINVS;
+ break;
+ case MULTIBOOT_MEMORY_BADRAM:
+ mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
+ mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
+ mb2binfo.Memory.Entry[i].Type = BadMemory;
+ break;
+ default:
+ mb2binfo.Memory.Entry[i].BaseAddress = (void *)entry.addr;
+ mb2binfo.Memory.Entry[i].Length = (size_t)entry.len;
+ mb2binfo.Memory.Entry[i].Type = Unknown;
+ break;
+ }
+ debug("Memory entry: [BaseAddress: %#x, Length: %#x, Type: %d]",
+ mb2binfo.Memory.Entry[i].BaseAddress,
+ mb2binfo.Memory.Entry[i].Length,
+ mb2binfo.Memory.Entry[i].Type);
+ }
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_VBE:
+ {
+ multiboot_tag_vbe *vbe = (multiboot_tag_vbe *)Tag;
+ fixme("vbe->[vbe_mode: %#x, vbe_interface_seg: %#x, vbe_interface_off: %#x, vbe_interface_len: %#x]",
+ vbe->vbe_mode, vbe->vbe_interface_seg, vbe->vbe_interface_off, vbe->vbe_interface_len);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_FRAMEBUFFER:
+ {
+ multiboot_tag_framebuffer *fb = (multiboot_tag_framebuffer *)Tag;
+ static int fb_count = 0;
+ mb2binfo.Framebuffer[fb_count].BaseAddress = (void *)fb->common.framebuffer_addr;
+ mb2binfo.Framebuffer[fb_count].Width = fb->common.framebuffer_width;
+ mb2binfo.Framebuffer[fb_count].Height = fb->common.framebuffer_height;
+ mb2binfo.Framebuffer[fb_count].Pitch = fb->common.framebuffer_pitch;
+ mb2binfo.Framebuffer[fb_count].BitsPerPixel = fb->common.framebuffer_bpp;
+ switch (fb->common.framebuffer_type)
+ {
+ case MULTIBOOT_FRAMEBUFFER_TYPE_INDEXED:
+ {
+ mb2binfo.Framebuffer[fb_count].Type = Indexed;
+ break;
+ }
+ case MULTIBOOT_FRAMEBUFFER_TYPE_RGB:
+ {
+ mb2binfo.Framebuffer[fb_count].Type = RGB;
+ mb2binfo.Framebuffer[fb_count].RedMaskSize = fb->framebuffer_red_mask_size;
+ mb2binfo.Framebuffer[fb_count].RedMaskShift = fb->framebuffer_red_field_position;
+ mb2binfo.Framebuffer[fb_count].GreenMaskSize = fb->framebuffer_green_mask_size;
+ mb2binfo.Framebuffer[fb_count].GreenMaskShift = fb->framebuffer_green_field_position;
+ mb2binfo.Framebuffer[fb_count].BlueMaskSize = fb->framebuffer_blue_mask_size;
+ mb2binfo.Framebuffer[fb_count].BlueMaskShift = fb->framebuffer_blue_field_position;
+ break;
+ }
+ case MULTIBOOT_FRAMEBUFFER_TYPE_EGA_TEXT:
+ {
+ mb2binfo.Framebuffer[fb_count].Type = EGA;
+ break;
+ }
+ default:
+ {
+ mb2binfo.Framebuffer[fb_count].Type = Unknown_Framebuffer_Type;
+ break;
+ }
+ }
+ debug("Framebuffer %d: %dx%d %d bpp", fb_count, fb->common.framebuffer_width, fb->common.framebuffer_height, fb->common.framebuffer_bpp);
+ debug("More info:\nAddress: %p\nPitch: %lld\nMemoryModel: %d\nRedMaskSize: %d\nRedMaskShift: %d\nGreenMaskSize: %d\nGreenMaskShift: %d\nBlueMaskSize: %d\nBlueMaskShift: %d",
+ fb->common.framebuffer_addr, fb->common.framebuffer_pitch, fb->common.framebuffer_type,
+ fb->framebuffer_red_mask_size, fb->framebuffer_red_field_position, fb->framebuffer_green_mask_size,
+ fb->framebuffer_green_field_position, fb->framebuffer_blue_mask_size, fb->framebuffer_blue_field_position);
+ fb_count++;
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_ELF_SECTIONS:
+ {
+ multiboot_tag_elf_sections *elf = (multiboot_tag_elf_sections *)Tag;
+ mb2binfo.Kernel.Symbols.Num = elf->num;
+ mb2binfo.Kernel.Symbols.EntSize = elf->entsize;
+ mb2binfo.Kernel.Symbols.Shndx = elf->shndx;
+ mb2binfo.Kernel.Symbols.Sections = (uintptr_t)&elf->sections;
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_APM:
+ {
+ multiboot_tag_apm *apm = (multiboot_tag_apm *)Tag;
+ fixme("apm->[version: %d, cseg: %d, offset: %d, cseg_16: %d, dseg: %d, flags: %d, cseg_len: %d, cseg_16_len: %d, dseg_len: %d]",
+ apm->version, apm->cseg, apm->offset, apm->cseg_16, apm->dseg, apm->flags, apm->cseg_len, apm->cseg_16_len, apm->dseg_len);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_EFI32:
+ {
+ multiboot_tag_efi32 *efi32 = (multiboot_tag_efi32 *)Tag;
+ fixme("efi32->[pointer: %p, size: %d]", efi32->pointer, efi32->size);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_EFI64:
+ {
+ multiboot_tag_efi64 *efi64 = (multiboot_tag_efi64 *)Tag;
+ fixme("efi64->[pointer: %p, size: %d]", efi64->pointer, efi64->size);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_SMBIOS:
+ {
+ multiboot_tag_smbios *smbios = (multiboot_tag_smbios *)Tag;
+ fixme("smbios->[major: %d, minor: %d]", smbios->major, smbios->minor);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_ACPI_OLD:
+ {
+ mb2binfo.RSDP = (BootInfo::RSDPInfo *)((multiboot_tag_old_acpi *)Tag)->rsdp;
+ debug("OLD ACPI RSDP: %p", mb2binfo.RSDP);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_ACPI_NEW:
+ {
+ mb2binfo.RSDP = (BootInfo::RSDPInfo *)((multiboot_tag_new_acpi *)Tag)->rsdp;
+ debug("NEW ACPI RSDP: %p", mb2binfo.RSDP);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_NETWORK:
+ {
+ multiboot_tag_network *net = (multiboot_tag_network *)Tag;
+ fixme("network->[dhcpack: %p]", net->dhcpack);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_EFI_MMAP:
+ {
+ multiboot_tag_efi_mmap *efi_mmap = (multiboot_tag_efi_mmap *)Tag;
+ fixme("efi_mmap->[descr_size: %d, descr_vers: %d, efi_mmap: %p]",
+ efi_mmap->descr_size, efi_mmap->descr_vers, efi_mmap->efi_mmap);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_EFI_BS:
+ {
+ fixme("efi_bs->[%p] (unknown structure)", Tag);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_EFI32_IH:
+ {
+ multiboot_tag_efi32_ih *efi32_ih = (multiboot_tag_efi32_ih *)Tag;
+ fixme("efi32_ih->[pointer: %p]", efi32_ih->pointer);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_EFI64_IH:
+ {
+ multiboot_tag_efi64_ih *efi64_ih = (multiboot_tag_efi64_ih *)Tag;
+ fixme("efi64_ih->[pointer: %p]", efi64_ih->pointer);
+ break;
+ }
+ case MULTIBOOT_TAG_TYPE_LOAD_BASE_ADDR:
+ {
+ multiboot_tag_load_base_addr *load_base_addr = (multiboot_tag_load_base_addr *)Tag;
+ mb2binfo.Kernel.PhysicalBase = (void *)(uint64_t)load_base_addr->load_base_addr;
+ mb2binfo.Kernel.VirtualBase = (void *)(uint64_t)(load_base_addr->load_base_addr + 0xFFFFFFFF80000000);
+ mb2binfo.Kernel.Size = (size_t)(((uint64_t)&_kernel_end - (uint64_t)&_kernel_start) + ((uint64_t)&_bootstrap_end - (uint64_t)&_bootstrap_start));
+ debug("Kernel base: %p (physical) %p (virtual)", mb2binfo.Kernel.PhysicalBase, mb2binfo.Kernel.VirtualBase);
+ break;
+ }
+ default:
+ {
+ error("Unknown multiboot2 tag type: %d", Tag->type);
+ break;
+ }
+ }
+ }
- tmp = inb(0x61) & 0xFC;
- outb(0x61, tmp);
- }
+ tmp = inb(0x61) & 0xFC;
+ outb(0x61, tmp);
+ }
- Entry(&mb2binfo);
+ Entry(&mb2binfo);
}
diff --git a/Architecture/i386/Bootstrap/Multiboot/2/Multiboot_PageTable.s b/Architecture/i386/Bootstrap/Multiboot/2/Multiboot_PageTable.s
index 2edfa75f..389b42c4 100644
--- a/Architecture/i386/Bootstrap/Multiboot/2/Multiboot_PageTable.s
+++ b/Architecture/i386/Bootstrap/Multiboot/2/Multiboot_PageTable.s
@@ -19,7 +19,7 @@
KERNEL_VIRTUAL_BASE = 0xC0000000 /* 3GB */
KERNEL_PAGE_NUMBER = 768 /* KERNEL_VIRTUAL_BASE >> 22 */
-.section .bootstrap.data
+.section .bootstrap.data, "a"
.align 0x1000
.global BootPageTable
BootPageTable:
diff --git a/Architecture/i386/Bootstrap/Multiboot/2/Start.s b/Architecture/i386/Bootstrap/Multiboot/2/Start.s
index 472fa6bc..71441304 100644
--- a/Architecture/i386/Bootstrap/Multiboot/2/Start.s
+++ b/Architecture/i386/Bootstrap/Multiboot/2/Start.s
@@ -24,14 +24,14 @@ KERNEL_STACK_SIZE = 0x4000 /* 16KB */
.extern LoadGDT32
.extern BootPageTable
-.section .bootstrap.data
+.section .bootstrap.data, "a"
MB_HeaderMagic:
.quad 0
MB_HeaderInfo:
.quad 0
-.section .bootstrap.text
+.section .bootstrap.text, "a"
.global Multiboot2_start
Multiboot2_start:
@@ -73,7 +73,7 @@ Multiboot2_start:
hlt
jmp .Hang
-.section .bootstrap.bss
+.section .bootstrap.bss, "a"
.align 16
KernelStack:
.space KERNEL_STACK_SIZE
diff --git a/Architecture/i386/Bootstrap/Multiboot/_start.s b/Architecture/i386/Bootstrap/Multiboot/_start.s
index eac169c6..830391e7 100644
--- a/Architecture/i386/Bootstrap/Multiboot/_start.s
+++ b/Architecture/i386/Bootstrap/Multiboot/_start.s
@@ -21,7 +21,7 @@
.extern Multiboot2_start
.code32
-.section .bootstrap.text
+.section .bootstrap.text, "a"
.global _start
_start:
diff --git a/Architecture/i386/DifferentiatedSystemDescriptionTable.cpp b/Architecture/i386/DifferentiatedSystemDescriptionTable.cpp
new file mode 100644
index 00000000..5052878f
--- /dev/null
+++ b/Architecture/i386/DifferentiatedSystemDescriptionTable.cpp
@@ -0,0 +1,255 @@
+/*
+ This file is part of Fennix Kernel.
+
+ Fennix Kernel is free software: you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation, either version 3 of
+ the License, or (at your option) any later version.
+
+ Fennix Kernel is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with Fennix Kernel. If not, see .
+*/
+
+#include "acpi.hpp"
+
+#include
+#include
+#include
+#include
+
+#include "cpu/apic.hpp"
+#include "../../kernel.h"
+
+#define ACPI_TIMER 0x0001
+#define ACPI_BUSMASTER 0x0010
+#define ACPI_GLOBAL 0x0020
+#define ACPI_POWER_BUTTON 0x0100
+#define ACPI_SLEEP_BUTTON 0x0200
+#define ACPI_RTC_ALARM 0x0400
+#define ACPI_PCIE_WAKE 0x4000
+#define ACPI_WAKE 0x8000
+
+namespace ACPI
+{
+ __always_inline inline bool IsCanonical(uint64_t Address)
+ {
+ return ((Address <= 0x00007FFFFFFFFFFF) || ((Address >= 0xFFFF800000000000) && (Address <= 0xFFFFFFFFFFFFFFFF)));
+ }
+
+#define ACPI_ENABLED 0x0001
+#define ACPI_SLEEP 0x2000
+
+#define ACPI_GAS_MMIO 0
+#define ACPI_GAS_IO 1
+#define ACPI_GAS_PCI 2
+
+ void DSDT::OnInterruptReceived(CPU::x32::TrapFrame *Frame)
+ {
+ debug("SCI Handle Triggered");
+ uint16_t Event = 0;
+ {
+ uint16_t a = 0, b = 0;
+ if (acpi->FADT->PM1aEventBlock)
+ {
+ a = inw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock));
+ outw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock), a);
+ }
+ if (acpi->FADT->PM1bEventBlock)
+ {
+ b = inw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock));
+ outw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock), b);
+ }
+ Event = a | b;
+ }
+
+ debug("SCI Event: %#lx", Event);
+ if (Event & ACPI_BUSMASTER)
+ {
+ fixme("ACPI Busmaster");
+ }
+ else if (Event & ACPI_GLOBAL)
+ {
+ fixme("ACPI Global");
+ }
+ else if (Event & ACPI_POWER_BUTTON)
+ {
+ if (TaskManager && !TaskManager->IsPanic())
+ {
+ TaskManager->CreateThread(TaskManager->CreateProcess(nullptr,
+ "Shutdown",
+ Tasking::TaskExecutionMode::Kernel),
+ Tasking::IP(KST_Shutdown));
+ }
+ else
+ KernelShutdownThread(false);
+ }
+ else if (Event & ACPI_SLEEP_BUTTON)
+ {
+ fixme("ACPI Sleep Button");
+ }
+ else if (Event & ACPI_RTC_ALARM)
+ {
+ fixme("ACPI RTC Alarm");
+ }
+ else if (Event & ACPI_PCIE_WAKE)
+ {
+ fixme("ACPI PCIe Wake");
+ }
+ else if (Event & ACPI_WAKE)
+ {
+ fixme("ACPI Wake");
+ }
+ else if (Event & ACPI_TIMER)
+ {
+ fixme("ACPI Timer");
+ }
+ else
+ {
+ error("ACPI unknown event %#lx on CPU %d", Event, GetCurrentCPU()->ID);
+ CPU::Stop();
+ }
+ UNUSED(Frame);
+ }
+
+ void DSDT::Shutdown()
+ {
+ trace("Shutting down...");
+ if (SCI_EN == 1)
+ {
+ outw(s_cst(uint16_t, acpi->FADT->PM1aControlBlock),
+ s_cst(uint16_t,
+ (inw(s_cst(uint16_t,
+ acpi->FADT->PM1aControlBlock)) &
+ 0xE3FF) |
+ ((SLP_TYPa << 10) | ACPI_SLEEP)));
+
+ if (acpi->FADT->PM1bControlBlock)
+ outw(s_cst(uint16_t, acpi->FADT->PM1bControlBlock),
+ s_cst(uint16_t,
+ (inw(
+ s_cst(uint16_t, acpi->FADT->PM1bControlBlock)) &
+ 0xE3FF) |
+ ((SLP_TYPb << 10) | ACPI_SLEEP)));
+
+ outw(s_cst(uint16_t, PM1a_CNT), SLP_TYPa | SLP_EN);
+ if (PM1b_CNT)
+ outw(s_cst(uint16_t, PM1b_CNT), SLP_TYPb | SLP_EN);
+ }
+ }
+
+ void DSDT::Reboot()
+ {
+ trace("Rebooting...");
+ switch (acpi->FADT->ResetReg.AddressSpace)
+ {
+ case ACPI_GAS_MMIO:
+ {
+ *(uint8_t *)(acpi->FADT->ResetReg.Address) = acpi->FADT->ResetValue;
+ break;
+ }
+ case ACPI_GAS_IO:
+ {
+ outb(s_cst(uint16_t, acpi->FADT->ResetReg.Address), acpi->FADT->ResetValue);
+ break;
+ }
+ case ACPI_GAS_PCI:
+ {
+ fixme("ACPI_GAS_PCI not supported.");
+ /*
+ seg - 0
+ bus - 0
+ dev - (FADT->ResetReg.Address >> 32) & 0xFFFF
+ function - (FADT->ResetReg.Address >> 16) & 0xFFFF
+ offset - FADT->ResetReg.Address & 0xFFFF
+ value - FADT->ResetValue
+ */
+ break;
+ }
+ default:
+ {
+ error("Unknown reset register address space: %d", acpi->FADT->ResetReg.AddressSpace);
+ break;
+ }
+ }
+ }
+
+ DSDT::DSDT(ACPI *acpi) : Interrupts::Handler(acpi->FADT->SCI_Interrupt)
+ {
+ this->acpi = acpi;
+ uint64_t Address = ((IsCanonical(acpi->FADT->X_Dsdt) && acpi->XSDTSupported) ? acpi->FADT->X_Dsdt : acpi->FADT->Dsdt);
+ uint8_t *S5Address = (uint8_t *)(Address) + 36;
+ ACPI::ACPI::ACPIHeader *Header = (ACPI::ACPI::ACPIHeader *)Address;
+ size_t Length = Header->Length;
+ while (Length-- > 0)
+ {
+ if (!memcmp(S5Address, "_S5_", 4))
+ break;
+ S5Address++;
+ }
+ if (Length <= 0)
+ {
+ warn("_S5 not present in ACPI");
+ return;
+ }
+ if ((*(S5Address - 1) == 0x08 || (*(S5Address - 2) == 0x08 && *(S5Address - 1) == '\\')) && *(S5Address + 4) == 0x12)
+ {
+ S5Address += 5;
+ S5Address += ((*S5Address & 0xC0) >> 6) + 2;
+ if (*S5Address == 0x0A)
+ S5Address++;
+ SLP_TYPa = s_cst(uint16_t, *(S5Address) << 10);
+ S5Address++;
+ if (*S5Address == 0x0A)
+ S5Address++;
+ SLP_TYPb = s_cst(uint16_t, *(S5Address) << 10);
+ SMI_CMD = acpi->FADT->SMI_CommandPort;
+ ACPI_ENABLE = acpi->FADT->AcpiEnable;
+ ACPI_DISABLE = acpi->FADT->AcpiDisable;
+ PM1a_CNT = acpi->FADT->PM1aControlBlock;
+ PM1b_CNT = acpi->FADT->PM1bControlBlock;
+ PM1_CNT_LEN = acpi->FADT->PM1ControlLength;
+ SLP_EN = 1 << 13;
+ SCI_EN = 1;
+ trace("ACPI Shutdown is supported");
+ ACPIShutdownSupported = true;
+
+ uint16_t value = ACPI_POWER_BUTTON | ACPI_SLEEP_BUTTON | ACPI_WAKE;
+ {
+ uint16_t a = s_cst(uint16_t, acpi->FADT->PM1aEventBlock + (acpi->FADT->PM1EventLength / 2));
+ uint16_t b = s_cst(uint16_t, acpi->FADT->PM1bEventBlock + (acpi->FADT->PM1EventLength / 2));
+ debug("SCI Event: %#lx [a:%#x b:%#x]", value, a, b);
+ if (acpi->FADT->PM1aEventBlock)
+ outw(a, value);
+ if (acpi->FADT->PM1bEventBlock)
+ outw(b, value);
+ }
+
+ {
+ uint16_t a = 0, b = 0;
+ if (acpi->FADT->PM1aEventBlock)
+ {
+ a = inw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock));
+ outw(s_cst(uint16_t, acpi->FADT->PM1aEventBlock), a);
+ }
+ if (acpi->FADT->PM1bEventBlock)
+ {
+ b = inw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock));
+ outw(s_cst(uint16_t, acpi->FADT->PM1bEventBlock), b);
+ }
+ }
+ ((APIC::APIC *)Interrupts::apic[0])->RedirectIRQ(0, acpi->FADT->SCI_Interrupt, 1);
+ return;
+ }
+ warn("Failed to parse _S5 in ACPI");
+ SCI_EN = 0;
+ }
+
+ DSDT::~DSDT()
+ {
+ }
+}
diff --git a/Architecture/i386/Memory/VirtualMemoryManager.cpp b/Architecture/i386/Memory/VirtualMemoryManager.cpp
index 7480c75e..d5c9da39 100644
--- a/Architecture/i386/Memory/VirtualMemoryManager.cpp
+++ b/Architecture/i386/Memory/VirtualMemoryManager.cpp
@@ -76,7 +76,7 @@ namespace Memory
{
// 0x1000 aligned
uintptr_t Address = (uintptr_t)VirtualAddress;
- Address &= 0xFFFFFFFFFFFFF000;
+ Address &= 0xFFFFF000;
PageMapIndexer Index = PageMapIndexer(Address);
@@ -101,7 +101,7 @@ namespace Memory
PageDirectoryEntry *Virtual::GetPDE(void *VirtualAddress, MapType Type)
{
uintptr_t Address = (uintptr_t)VirtualAddress;
- Address &= 0xFFFFFFFFFFFFF000;
+ Address &= 0xFFFFF000;
PageMapIndexer Index = PageMapIndexer(Address);
PageDirectoryEntry *PDE = &this->Table->Entries[Index.PDEIndex];
@@ -113,7 +113,7 @@ namespace Memory
PageTableEntry *Virtual::GetPTE(void *VirtualAddress, MapType Type)
{
uintptr_t Address = (uintptr_t)VirtualAddress;
- Address &= 0xFFFFFFFFFFFFF000;
+ Address &= 0xFFFFF000;
PageMapIndexer Index = PageMapIndexer(Address);
PageDirectoryEntry *PDE = &this->Table->Entries[Index.PDEIndex];
diff --git a/Architecture/i386/MultipleAPICDescriptionTable.cpp b/Architecture/i386/MultipleAPICDescriptionTable.cpp
new file mode 100644
index 00000000..f1176edf
--- /dev/null
+++ b/Architecture/i386/MultipleAPICDescriptionTable.cpp
@@ -0,0 +1,91 @@
+/*
+ This file is part of Fennix Kernel.
+
+ Fennix Kernel is free software: you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation, either version 3 of
+ the License, or (at your option) any later version.
+
+ Fennix Kernel is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with Fennix Kernel. If not, see .
+*/
+
+#include "acpi.hpp"
+
+#include
+#include
+
+#include "../../kernel.h"
+
+namespace ACPI
+{
+ MADT::MADT(ACPI::MADTHeader *madt)
+ {
+ trace("Initializing MADT");
+ CPUCores = 0;
+ LAPICAddress = (LAPIC *)(uintptr_t)madt->LocalControllerAddress;
+ for (uint8_t *ptr = (uint8_t *)(madt->Entries);
+ (uintptr_t)(ptr) < (uintptr_t)(madt) + madt->Header.Length;
+ ptr += *(ptr + 1))
+ {
+ switch (*(ptr))
+ {
+ case 0:
+ {
+ if (ptr[4] & 1)
+ {
+ lapic.push_back((LocalAPIC *)ptr);
+ KPrint("Local APIC \e8888FF%d\eCCCCCC (APIC \e8888FF%d\eCCCCCC) found.", lapic.back()->ACPIProcessorId, lapic.back()->APICId);
+ CPUCores++;
+ }
+ break;
+ }
+ case 1:
+ {
+ ioapic.push_back((MADTIOApic *)ptr);
+ KPrint("I/O APIC \e8888FF%d\eCCCCCC (Address \e8888FF%#lx\eCCCCCC) found.", ioapic.back()->APICID, ioapic.back()->Address);
+ Memory::Virtual(KernelPageTable).Map((void *)(uintptr_t)ioapic.back()->Address, (void *)(uintptr_t)ioapic.back()->Address, Memory::PTFlag::RW | Memory::PTFlag::PCD); // Make sure that the address is mapped.
+ break;
+ }
+ case 2:
+ {
+ iso.push_back((MADTIso *)ptr);
+ KPrint("ISO (IRQ:\e8888FF%#lx\eCCCCCC, BUS:\e8888FF%#lx\eCCCCCC, GSI:\e8888FF%#lx\eCCCCCC, %s\eCCCCCC/%s\eCCCCCC) found.",
+ iso.back()->IRQSource, iso.back()->BuSSource, iso.back()->GSI,
+ iso.back()->Flags & 0x00000004 ? "\e1770FFActive High" : "\e475EFFActive Low",
+ iso.back()->Flags & 0x00000100 ? "\e00962DEdge Triggered" : "\e008F58Level Triggered");
+ break;
+ }
+ case 4:
+ {
+ nmi.push_back((MADTNmi *)ptr);
+ KPrint("NMI \e8888FF%#lx\eCCCCCC (lint:\e8888FF%#lx\eCCCCCC) found.", nmi.back()->processor, nmi.back()->lint);
+ break;
+ }
+ case 5:
+ {
+ LAPICAddress = (LAPIC *)ptr;
+ KPrint("APIC found at \e8888FF%#lx\eCCCCCC", LAPICAddress);
+ break;
+ }
+ default:
+ {
+ KPrint("Unknown MADT entry \e8888FF%#lx\eCCCCCC", *(ptr));
+ break;
+ }
+ }
+ Memory::Virtual(KernelPageTable).Map((void *)LAPICAddress, (void *)LAPICAddress, Memory::PTFlag::RW | Memory::PTFlag::PCD); // I should map more than one page?
+ }
+ CPUCores--; // We start at 0 (BSP) and end at 11 (APs), so we have 12 cores.
+ KPrint("Total CPU cores: %d", CPUCores + 1);
+ }
+
+ MADT::~MADT()
+ {
+ }
+}
diff --git a/Architecture/i386/cpu/AdvancedProgrammableInterruptController.cpp b/Architecture/i386/cpu/AdvancedProgrammableInterruptController.cpp
new file mode 100644
index 00000000..e3d1b77b
--- /dev/null
+++ b/Architecture/i386/cpu/AdvancedProgrammableInterruptController.cpp
@@ -0,0 +1,411 @@
+/*
+ This file is part of Fennix Kernel.
+
+ Fennix Kernel is free software: you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation, either version 3 of
+ the License, or (at your option) any later version.
+
+ Fennix Kernel is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with Fennix Kernel. If not, see .
+*/
+
+#include "apic.hpp"
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "../../../kernel.h"
+#include "../acpi.hpp"
+
+NewLock(APICLock);
+
+using namespace CPU::x32;
+using namespace CPU::x86;
+
+/*
+In constructor ‘APIC::APIC::APIC(int)’:
+warning: left shift count >= width of type
+| APICBaseAddress = BaseStruct.ApicBaseLo << 12u | BaseStruct.ApicBaseHi << 32u;
+| ~~~~~~~~~~~~~~~~~~~~~~^~~~~~
+*/
+#pragma GCC diagnostic ignored "-Wshift-count-overflow"
+
+namespace APIC
+{
+ // headache
+ // https://www.amd.com/system/files/TechDocs/24593.pdf
+ // https://www.naic.edu/~phil/software/intel/318148.pdf
+
+ uint32_t APIC::Read(uint32_t Register)
+ {
+#ifdef DEBUG
+ if (Register != APIC_ICRLO &&
+ Register != APIC_ICRHI &&
+ Register != APIC_ID)
+ debug("APIC::Read(%#lx) [x2=%d]", Register, x2APICSupported ? 1 : 0);
+#endif
+ if (x2APICSupported)
+ {
+ if (Register != APIC_ICRHI)
+ return s_cst(uint32_t, rdmsr((Register >> 4) + 0x800));
+ else
+ return s_cst(uint32_t, rdmsr(0x30 + 0x800));
+ }
+ else
+ {
+ CPU::MemBar::Barrier();
+ uint32_t ret = *((volatile uint32_t *)((uintptr_t)APICBaseAddress + Register));
+ CPU::MemBar::Barrier();
+ return ret;
+ }
+ }
+
+ void APIC::Write(uint32_t Register, uint32_t Value)
+ {
+#ifdef DEBUG
+ if (Register != APIC_EOI &&
+ Register != APIC_TDCR &&
+ Register != APIC_TIMER &&
+ Register != APIC_TICR &&
+ Register != APIC_ICRLO &&
+ Register != APIC_ICRHI)
+ debug("APIC::Write(%#lx, %#lx) [x2=%d]", Register, Value, x2APICSupported ? 1 : 0);
+#endif
+ if (x2APICSupported)
+ {
+ if (Register != APIC_ICRHI)
+ wrmsr((Register >> 4) + 0x800, Value);
+ else
+ wrmsr(MSR_X2APIC_ICR, Value);
+ }
+ else
+ {
+ CPU::MemBar::Barrier();
+ *((volatile uint32_t *)(((uintptr_t)APICBaseAddress) + Register)) = Value;
+ CPU::MemBar::Barrier();
+ }
+ }
+
+ void APIC::IOWrite(uint64_t Base, uint32_t Register, uint32_t Value)
+ {
+ debug("APIC::IOWrite(%#lx, %#lx, %#lx)", Base, Register, Value);
+ CPU::MemBar::Barrier();
+ *((volatile uint32_t *)(((uintptr_t)Base))) = Register;
+ CPU::MemBar::Barrier();
+ *((volatile uint32_t *)(((uintptr_t)Base + 16))) = Value;
+ CPU::MemBar::Barrier();
+ }
+
+ uint32_t APIC::IORead(uint64_t Base, uint32_t Register)
+ {
+ debug("APIC::IORead(%#lx, %#lx)", Base, Register);
+ CPU::MemBar::Barrier();
+ *((volatile uint32_t *)(((uintptr_t)Base))) = Register;
+ CPU::MemBar::Barrier();
+ uint32_t ret = *((volatile uint32_t *)(((uintptr_t)Base + 16)));
+ CPU::MemBar::Barrier();
+ return ret;
+ }
+
+ void APIC::EOI() { this->Write(APIC_EOI, 0); }
+
+ void APIC::WaitForIPI()
+ {
+ InterruptCommandRegisterLow icr = {.raw = 0};
+ do
+ {
+ icr.raw = this->Read(APIC_ICRLO);
+ CPU::Pause();
+ } while (icr.DeliveryStatus != Idle);
+ }
+
+ void APIC::IPI(uint8_t CPU, InterruptCommandRegisterLow icr)
+ {
+ SmartCriticalSection(APICLock);
+ if (x2APICSupported)
+ {
+ wrmsr(MSR_X2APIC_ICR, s_cst(uint32_t, icr.raw));
+ this->WaitForIPI();
+ }
+ else
+ {
+ this->Write(APIC_ICRHI, (CPU << 24));
+ this->Write(APIC_ICRLO, s_cst(uint32_t, icr.raw));
+ this->WaitForIPI();
+ }
+ }
+
+ void APIC::SendInitIPI(uint8_t CPU)
+ {
+ SmartCriticalSection(APICLock);
+ if (x2APICSupported)
+ {
+ InterruptCommandRegisterLow icr = {.raw = 0};
+ icr.DeliveryMode = INIT;
+ icr.Level = Assert;
+ wrmsr(MSR_X2APIC_ICR, s_cst(uint32_t, icr.raw));
+ this->WaitForIPI();
+ }
+ else
+ {
+ InterruptCommandRegisterLow icr = {.raw = 0};
+ icr.DeliveryMode = INIT;
+ icr.Level = Assert;
+ this->Write(APIC_ICRHI, (CPU << 24));
+ this->Write(APIC_ICRLO, s_cst(uint32_t, icr.raw));
+ this->WaitForIPI();
+ }
+ }
+
+ void APIC::SendStartupIPI(uint8_t CPU, uint64_t StartupAddress)
+ {
+ SmartCriticalSection(APICLock);
+ if (x2APICSupported)
+ {
+ InterruptCommandRegisterLow icr = {.raw = 0};
+ icr.Vector = s_cst(uint8_t, StartupAddress >> 12);
+ icr.DeliveryMode = Startup;
+ icr.Level = Assert;
+ wrmsr(MSR_X2APIC_ICR, s_cst(uint32_t, icr.raw));
+ this->WaitForIPI();
+ }
+ else
+ {
+ InterruptCommandRegisterLow icr = {.raw = 0};
+ icr.Vector = s_cst(uint8_t, StartupAddress >> 12);
+ icr.DeliveryMode = Startup;
+ icr.Level = Assert;
+ this->Write(APIC_ICRHI, (CPU << 24));
+ this->Write(APIC_ICRLO, s_cst(uint32_t, icr.raw));
+ this->WaitForIPI();
+ }
+ }
+
+ uint32_t APIC::IOGetMaxRedirect(uint32_t APICID)
+ {
+ uint32_t TableAddress = (this->IORead((((ACPI::MADT *)PowerManager->GetMADT())->ioapic[APICID]->Address), GetIOAPICVersion));
+ return ((IOAPICVersion *)&TableAddress)->MaximumRedirectionEntry;
+ }
+
+ void APIC::RawRedirectIRQ(uint16_t Vector, uint32_t GSI, uint16_t Flags, int CPU, int Status)
+ {
+ uint64_t Value = Vector;
+
+ int64_t IOAPICTarget = -1;
+ for (uint64_t i = 0; ((ACPI::MADT *)PowerManager->GetMADT())->ioapic[std::size_t(i)] != 0; i++)
+ if (((ACPI::MADT *)PowerManager->GetMADT())->ioapic[std::size_t(i)]->GSIBase <= GSI)
+ if (((ACPI::MADT *)PowerManager->GetMADT())->ioapic[std::size_t(i)]->GSIBase + IOGetMaxRedirect(s_cst(uint32_t, i)) > GSI)
+ {
+ IOAPICTarget = i;
+ break;
+ }
+
+ if (IOAPICTarget == -1)
+ {
+ error("No ISO table found for I/O APIC");
+ return;
+ }
+
+ // TODO: IOAPICRedirectEntry Entry = {.raw = 0};
+
+ if (Flags & ActiveHighLow)
+ Value |= (1 << 13);
+
+ if (Flags & EdgeLevel)
+ Value |= (1 << 15);
+
+ if (!Status)
+ Value |= (1 << 16);
+
+ Value |= (((uintptr_t)CPU) << 56);
+ uint32_t IORegister = (GSI - ((ACPI::MADT *)PowerManager->GetMADT())->ioapic[std::size_t(IOAPICTarget)]->GSIBase) * 2 + 16;
+
+ this->IOWrite(((ACPI::MADT *)PowerManager->GetMADT())->ioapic[std::size_t(IOAPICTarget)]->Address,
+ IORegister, (uint32_t)Value);
+ this->IOWrite(((ACPI::MADT *)PowerManager->GetMADT())->ioapic[std::size_t(IOAPICTarget)]->Address,
+ IORegister + 1, (uint32_t)(Value >> 32));
+ }
+
+ void APIC::RedirectIRQ(int CPU, uint16_t IRQ, int Status)
+ {
+ for (uint64_t i = 0; i < ((ACPI::MADT *)PowerManager->GetMADT())->iso.size(); i++)
+ if (((ACPI::MADT *)PowerManager->GetMADT())->iso[std::size_t(i)]->IRQSource == IRQ)
+ {
+ debug("[ISO %d] Mapping to source IRQ%#d GSI:%#lx on CPU %d",
+ i, ((ACPI::MADT *)PowerManager->GetMADT())->iso[std::size_t(i)]->IRQSource,
+ ((ACPI::MADT *)PowerManager->GetMADT())->iso[std::size_t(i)]->GSI,
+ CPU);
+
+ this->RawRedirectIRQ(((ACPI::MADT *)PowerManager->GetMADT())->iso[std::size_t(i)]->IRQSource + 0x20,
+ ((ACPI::MADT *)PowerManager->GetMADT())->iso[std::size_t(i)]->GSI,
+ ((ACPI::MADT *)PowerManager->GetMADT())->iso[std::size_t(i)]->Flags,
+ CPU, Status);
+ return;
+ }
+ debug("Mapping IRQ%d on CPU %d", IRQ, CPU);
+ this->RawRedirectIRQ(IRQ + 0x20, IRQ, 0, CPU, Status);
+ }
+
+ void APIC::RedirectIRQs(int CPU)
+ {
+ SmartCriticalSection(APICLock);
+ debug("Redirecting IRQs...");
+ for (uint8_t i = 0; i < 16; i++)
+ this->RedirectIRQ(CPU, i, 1);
+ debug("Redirecting IRQs completed.");
+ }
+
+ APIC::APIC(int Core)
+ {
+ SmartCriticalSection(APICLock);
+ APIC_BASE BaseStruct = {.raw = rdmsr(MSR_APIC_BASE)};
+ uint64_t BaseLow = BaseStruct.ApicBaseLo;
+ uint64_t BaseHigh = BaseStruct.ApicBaseHi;
+ this->APICBaseAddress = BaseLow << 12u | BaseHigh << 32u;
+ trace("APIC Address: %#lx", this->APICBaseAddress);
+ Memory::Virtual().Map((void *)this->APICBaseAddress, (void *)this->APICBaseAddress, Memory::PTFlag::RW | Memory::PTFlag::PCD);
+
+ bool x2APICSupported = false;
+ if (strcmp(CPU::Vendor(), x86_CPUID_VENDOR_AMD) == 0)
+ {
+ CPU::x86::AMD::CPUID0x00000001 cpuid;
+ cpuid.Get();
+ if (cpuid.ECX.x2APIC)
+ {
+ // x2APICSupported = cpuid.ECX.x2APIC;
+ fixme("x2APIC is supported");
+ }
+ }
+ else if (strcmp(CPU::Vendor(), x86_CPUID_VENDOR_INTEL) == 0)
+ {
+ CPU::x86::Intel::CPUID0x00000001 cpuid;
+ cpuid.Get();
+ if (cpuid.ECX.x2APIC)
+ {
+ // x2APICSupported = cpuid.ECX.x2APIC;
+ fixme("x2APIC is supported");
+ }
+ }
+
+ if (x2APICSupported)
+ {
+ this->x2APICSupported = true;
+ wrmsr(MSR_APIC_BASE, (rdmsr(MSR_APIC_BASE) | (1 << 11)) & ~(1 << 10));
+ BaseStruct.EN = 1;
+ wrmsr(MSR_APIC_BASE, BaseStruct.raw);
+ }
+ else
+ {
+ BaseStruct.EN = 1;
+ wrmsr(MSR_APIC_BASE, BaseStruct.raw);
+ }
+
+ this->Write(APIC_TPR, 0x0);
+ // this->Write(APIC_SVR, this->Read(APIC_SVR) | 0x100); // 0x1FF or 0x100 ? on https://wiki.osdev.org/APIC is 0x100
+
+ if (!this->x2APICSupported)
+ {
+ this->Write(APIC_DFR, 0xF0000000);
+ this->Write(APIC_LDR, this->Read(APIC_ID));
+ }
+
+ ACPI::MADT *madt = (ACPI::MADT *)PowerManager->GetMADT();
+
+ for (size_t i = 0; i < madt->nmi.size(); i++)
+ {
+ if (madt->nmi[std::size_t(i)]->processor != 0xFF && Core != madt->nmi[std::size_t(i)]->processor)
+ return;
+
+ uint32_t nmi = 0x402;
+ if (madt->nmi[std::size_t(i)]->flags & 2)
+ nmi |= 1 << 13;
+ if (madt->nmi[std::size_t(i)]->flags & 8)
+ nmi |= 1 << 15;
+ if (madt->nmi[std::size_t(i)]->lint == 0)
+ this->Write(APIC_LINT0, nmi);
+ else if (madt->nmi[std::size_t(i)]->lint == 1)
+ this->Write(APIC_LINT1, nmi);
+ }
+
+ // Setup the spurrious interrupt vector
+ Spurious Spurious = {.raw = this->Read(APIC_SVR)};
+ Spurious.Vector = IRQ223; // TODO: Should I map the IRQ to something?
+ Spurious.Software = 1;
+ this->Write(APIC_SVR, s_cst(uint32_t, Spurious.raw));
+
+ static int once = 0;
+ if (!once++)
+ {
+ // Disable PIT
+ outb(0x43, 0x28);
+ outb(0x40, 0x0);
+
+ // Disable PIC
+ outb(0x21, 0xFF);
+ outb(0xA1, 0xFF);
+ }
+ }
+
+ APIC::~APIC() {}
+
+ void Timer::OnInterruptReceived(TrapFrame *Frame) { UNUSED(Frame); }
+
+ void Timer::OneShot(uint32_t Vector, uint64_t Miliseconds)
+ {
+ SmartCriticalSection(APICLock);
+ LVTTimer timer = {.raw = 0};
+ timer.Vector = s_cst(uint8_t, Vector);
+ timer.TimerMode = 0;
+ if (strcmp(CPU::Hypervisor(), x86_CPUID_VENDOR_TCG) != 0)
+ this->lapic->Write(APIC_TDCR, DivideBy128);
+ else
+ this->lapic->Write(APIC_TDCR, DivideBy16);
+ this->lapic->Write(APIC_TICR, s_cst(uint32_t, Ticks * Miliseconds));
+ this->lapic->Write(APIC_TIMER, s_cst(uint32_t, timer.raw));
+ }
+
+ Timer::Timer(APIC *apic) : Interrupts::Handler(0) /* IRQ0 */
+ {
+ SmartCriticalSection(APICLock);
+ this->lapic = apic;
+ LVTTimerDivide Divider = DivideBy16;
+
+ trace("Initializing APIC timer on CPU %d", GetCurrentCPU()->ID);
+
+ this->lapic->Write(APIC_TDCR, Divider);
+ this->lapic->Write(APIC_TICR, 0xFFFFFFFF);
+
+ TimeManager->Sleep(1, Time::Units::Milliseconds);
+
+ // Mask the timer
+ this->lapic->Write(APIC_TIMER, 0x10000 /* LVTTimer.Mask flag */);
+ Ticks = 0xFFFFFFFF - this->lapic->Read(APIC_TCCR);
+
+ // Config for IRQ0 timer
+ LVTTimer timer = {.raw = 0};
+ timer.Vector = IRQ0;
+ timer.Mask = Unmasked;
+ timer.TimerMode = LVTTimerMode::OneShot;
+
+ // Initialize APIC timer
+ this->lapic->Write(APIC_TDCR, Divider);
+ this->lapic->Write(APIC_TICR, s_cst(uint32_t, Ticks));
+ this->lapic->Write(APIC_TIMER, s_cst(uint32_t, timer.raw));
+ trace("%d APIC Timer %d ticks in.", GetCurrentCPU()->ID, Ticks);
+ KPrint("APIC Timer: \e8888FF%ld\eCCCCCC ticks.", Ticks);
+ }
+
+ Timer::~Timer()
+ {
+ }
+}
diff --git a/Architecture/i386/cpu/GlobalDescriptorTable.cpp b/Architecture/i386/cpu/GlobalDescriptorTable.cpp
index 4795f888..a554b810 100644
--- a/Architecture/i386/cpu/GlobalDescriptorTable.cpp
+++ b/Architecture/i386/cpu/GlobalDescriptorTable.cpp
@@ -228,7 +228,14 @@ namespace GlobalDescriptorTable
gdt[Core].Entries->TaskStateSegment.BaseLow = Base & 0xFFFF;
gdt[Core].Entries->TaskStateSegment.BaseMiddle = uint8_t((Base >> 16) & 0xFF);
gdt[Core].Entries->TaskStateSegment.BaseHigh = uint8_t((Base >> 24) & 0xFF);
+
+#pragma diagnostic push
+#pragma GCC diagnostic ignored "-Wshift-count-overflow"
+
gdt[Core].Entries->TaskStateSegment.BaseUpper = s_cst(uint32_t, (Base >> 32) & 0xFFFFFFFF);
+
+#pragma diagnostic pop
+
gdt[Core].Entries->TaskStateSegment.Access = {.A = 1, .RW = 0, .DC = 0, .E = 1, .S = 0, .DPL = 0, .P = 1};
gdt[Core].Entries->TaskStateSegment.Granularity = (0 << 4) | ((Limit >> 16) & 0xF);
diff --git a/Architecture/i386/cpu/InterruptDescriptorTable.cpp b/Architecture/i386/cpu/InterruptDescriptorTable.cpp
index 855f6b42..215782fd 100644
--- a/Architecture/i386/cpu/InterruptDescriptorTable.cpp
+++ b/Architecture/i386/cpu/InterruptDescriptorTable.cpp
@@ -33,695 +33,695 @@ extern "C" void ExceptionHandler(void *Data);
namespace InterruptDescriptorTable
{
- static InterruptDescriptorTableEntry Entries[0x100];
+ static InterruptDescriptorTableEntry Entries[0x100];
- InterruptDescriptorTableDescriptor idtd = {
- .Length = sizeof(Entries) - 1,
- .Entries = Entries,
- };
+ InterruptDescriptorTableDescriptor idtd = {
+ .Length = sizeof(Entries) - 1,
+ .Entries = Entries,
+ };
- void SetEntry(uint8_t Index,
- void (*Base)(),
- InterruptGateType Gate,
- InterruptRingType Ring,
- bool Present,
- uint16_t SegmentSelector)
- {
- /* FIXME: Check "Intel Software Developer Manual, Volume 3-A" at Section 6.11: IDT Descriptors */
- Entries[Index].LowOffset = s_cst(uint16_t, ((uint32_t)Base & 0xFFFF));
- Entries[Index].SegmentSelector = SegmentSelector;
- Entries[Index].Reserved0 = 0;
- Entries[Index].Flags = Gate;
- Entries[Index].Reserved1 = 0;
- Entries[Index].Ring = Ring;
- Entries[Index].Present = Present;
- Entries[Index].HighOffset = s_cst(uint16_t, ((uint32_t)Base >> 16 /* & 0xFFFF */));
- }
+ void SetEntry(uint8_t Index,
+ void (*Base)(),
+ InterruptGateType Gate,
+ InterruptRingType Ring,
+ bool Present,
+ uint16_t SegmentSelector)
+ {
+ /* FIXME: Check "Intel Software Developer Manual, Volume 3-A" at Section 6.11: IDT Descriptors */
+ Entries[Index].LowOffset = s_cst(uint16_t, ((uint32_t)Base & 0xFFFF));
+ Entries[Index].SegmentSelector = SegmentSelector;
+ Entries[Index].Reserved0 = 0;
+ Entries[Index].Flags = Gate;
+ Entries[Index].Reserved1 = 0;
+ Entries[Index].Ring = Ring;
+ Entries[Index].Present = Present;
+ Entries[Index].HighOffset = s_cst(uint16_t, ((uint32_t)Base >> 16 /* & 0xFFFF */));
+ }
- extern "C" __naked __used __no_stack_protector __aligned(16) void ExceptionHandlerStub()
- {
- asm("cld\n"
- "cli\n"
+ extern "C" __naked __used __no_stack_protector __aligned(16) void ExceptionHandlerStub()
+ {
+ asm("cld\n"
+ "cli\n"
- // "push %eax\n"
- // "push %ebx\n"
- // "push %ecx\n"
- // "push %edx\n"
- // "push %esi\n"
- // "push %edi\n"
- // "push %ebp\n"
- "pusha\n"
+ // "push %eax\n"
+ // "push %ebx\n"
+ // "push %ecx\n"
+ // "push %edx\n"
+ // "push %esi\n"
+ // "push %edi\n"
+ // "push %ebp\n"
+ "pusha\n"
- "push %esp\n"
- "call ExceptionHandler\n"
+ "push %esp\n"
+ "call ExceptionHandler\n"
- "popa\n"
- // "pop %ebp\n"
- // "pop %edi\n"
- // "pop %esi\n"
- // "pop %edx\n"
- // "pop %ecx\n"
- // "pop %ebx\n"
- // "pop %eax\n"
+ "popa\n"
+ // "pop %ebp\n"
+ // "pop %edi\n"
+ // "pop %esi\n"
+ // "pop %edx\n"
+ // "pop %ecx\n"
+ // "pop %ebx\n"
+ // "pop %eax\n"
- "add $8, %esp\n"
+ "add $8, %esp\n"
- "iret");
- }
+ "iret");
+ }
- extern "C" __naked __used __no_stack_protector __aligned(16) void InterruptHandlerStub()
- {
- asm("cld\n"
- "cli\n"
+ extern "C" __naked __used __no_stack_protector __aligned(16) void InterruptHandlerStub()
+ {
+ asm("cld\n"
+ "cli\n"
- // "push %eax\n"
- // "push %ebx\n"
- // "push %ecx\n"
- // "push %edx\n"
- // "push %esi\n"
- // "push %edi\n"
- // "push %ebp\n"
- "pusha\n"
+ // "push %eax\n"
+ // "push %ebx\n"
+ // "push %ecx\n"
+ // "push %edx\n"
+ // "push %esi\n"
+ // "push %edi\n"
+ // "push %ebp\n"
+ "pusha\n"
- "push %esp\n"
- "call MainInterruptHandler\n"
+ "push %esp\n"
+ "call MainInterruptHandler\n"
- "popa\n"
- // "pop %ebp\n"
- // "pop %edi\n"
- // "pop %esi\n"
- // "pop %edx\n"
- // "pop %ecx\n"
- // "pop %ebx\n"
- // "pop %eax\n"
+ "popa\n"
+ // "pop %ebp\n"
+ // "pop %edi\n"
+ // "pop %esi\n"
+ // "pop %edx\n"
+ // "pop %ecx\n"
+ // "pop %ebx\n"
+ // "pop %eax\n"
- "add $8, %esp\n"
+ "add $8, %esp\n"
- "sti\n"
- "iret");
- }
+ "sti\n"
+ "iret");
+ }
#pragma region Exceptions
#define EXCEPTION_HANDLER(num) \
- __naked __used __no_stack_protector __aligned(16) static void InterruptHandler_##num() \
- { \
- asm("push $0\npush $" #num "\n" \
- "jmp ExceptionHandlerStub"); \
- }
+ __naked __used __no_stack_protector __aligned(16) static void InterruptHandler_##num() \
+ { \
+ asm("push $0\npush $" #num "\n" \
+ "jmp ExceptionHandlerStub"); \
+ }
#define EXCEPTION_ERROR_HANDLER(num) \
- __naked __used __no_stack_protector __aligned(16) static void InterruptHandler_##num() \
- { \
- asm("push $" #num "\n" \
- "jmp ExceptionHandlerStub"); \
- }
+ __naked __used __no_stack_protector __aligned(16) static void InterruptHandler_##num() \
+ { \
+ asm("push $" #num "\n" \
+ "jmp ExceptionHandlerStub"); \
+ }
#define INTERRUPT_HANDLER(num) \
- __naked __used __no_stack_protector __aligned(16) void InterruptHandler_##num() \
- { \
- asm("push $0\npush $" #num "\n" \
- "jmp InterruptHandlerStub\n"); \
- }
+ __naked __used __no_stack_protector __aligned(16) void InterruptHandler_##num() \
+ { \
+ asm("push $0\npush $" #num "\n" \
+ "jmp InterruptHandlerStub\n"); \
+ }
- /* ISR */
+ /* ISR */
- EXCEPTION_HANDLER(0x0);
- EXCEPTION_HANDLER(0x1);
- EXCEPTION_HANDLER(0x2);
- EXCEPTION_HANDLER(0x3);
- EXCEPTION_HANDLER(0x4);
- EXCEPTION_HANDLER(0x5);
- EXCEPTION_HANDLER(0x6);
- EXCEPTION_HANDLER(0x7);
- EXCEPTION_ERROR_HANDLER(0x8);
- EXCEPTION_HANDLER(0x9);
- EXCEPTION_ERROR_HANDLER(0xa);
- EXCEPTION_ERROR_HANDLER(0xb);
- EXCEPTION_ERROR_HANDLER(0xc);
- EXCEPTION_ERROR_HANDLER(0xd);
- EXCEPTION_ERROR_HANDLER(0xe);
- EXCEPTION_HANDLER(0xf);
- EXCEPTION_ERROR_HANDLER(0x10);
- EXCEPTION_HANDLER(0x11);
- EXCEPTION_HANDLER(0x12);
- EXCEPTION_HANDLER(0x13);
- EXCEPTION_HANDLER(0x14);
- EXCEPTION_HANDLER(0x15);
- EXCEPTION_HANDLER(0x16);
- EXCEPTION_HANDLER(0x17);
- EXCEPTION_HANDLER(0x18);
- EXCEPTION_HANDLER(0x19);
- EXCEPTION_HANDLER(0x1a);
- EXCEPTION_HANDLER(0x1b);
- EXCEPTION_HANDLER(0x1c);
- EXCEPTION_HANDLER(0x1d);
- EXCEPTION_HANDLER(0x1e);
- EXCEPTION_HANDLER(0x1f);
+ EXCEPTION_HANDLER(0x0);
+ EXCEPTION_HANDLER(0x1);
+ EXCEPTION_HANDLER(0x2);
+ EXCEPTION_HANDLER(0x3);
+ EXCEPTION_HANDLER(0x4);
+ EXCEPTION_HANDLER(0x5);
+ EXCEPTION_HANDLER(0x6);
+ EXCEPTION_HANDLER(0x7);
+ EXCEPTION_ERROR_HANDLER(0x8);
+ EXCEPTION_HANDLER(0x9);
+ EXCEPTION_ERROR_HANDLER(0xa);
+ EXCEPTION_ERROR_HANDLER(0xb);
+ EXCEPTION_ERROR_HANDLER(0xc);
+ EXCEPTION_ERROR_HANDLER(0xd);
+ EXCEPTION_ERROR_HANDLER(0xe);
+ EXCEPTION_HANDLER(0xf);
+ EXCEPTION_ERROR_HANDLER(0x10);
+ EXCEPTION_HANDLER(0x11);
+ EXCEPTION_HANDLER(0x12);
+ EXCEPTION_HANDLER(0x13);
+ EXCEPTION_HANDLER(0x14);
+ EXCEPTION_HANDLER(0x15);
+ EXCEPTION_HANDLER(0x16);
+ EXCEPTION_HANDLER(0x17);
+ EXCEPTION_HANDLER(0x18);
+ EXCEPTION_HANDLER(0x19);
+ EXCEPTION_HANDLER(0x1a);
+ EXCEPTION_HANDLER(0x1b);
+ EXCEPTION_HANDLER(0x1c);
+ EXCEPTION_HANDLER(0x1d);
+ EXCEPTION_HANDLER(0x1e);
+ EXCEPTION_HANDLER(0x1f);
- /* IRQ */
+ /* IRQ */
- INTERRUPT_HANDLER(0x20)
- INTERRUPT_HANDLER(0x21)
- INTERRUPT_HANDLER(0x22)
- INTERRUPT_HANDLER(0x23)
- INTERRUPT_HANDLER(0x24)
- INTERRUPT_HANDLER(0x25)
- INTERRUPT_HANDLER(0x26)
- INTERRUPT_HANDLER(0x27)
- INTERRUPT_HANDLER(0x28)
- INTERRUPT_HANDLER(0x29)
- INTERRUPT_HANDLER(0x2a)
- INTERRUPT_HANDLER(0x2b)
- INTERRUPT_HANDLER(0x2c)
- INTERRUPT_HANDLER(0x2d)
- INTERRUPT_HANDLER(0x2e)
- INTERRUPT_HANDLER(0x2f)
+ INTERRUPT_HANDLER(0x20)
+ INTERRUPT_HANDLER(0x21)
+ INTERRUPT_HANDLER(0x22)
+ INTERRUPT_HANDLER(0x23)
+ INTERRUPT_HANDLER(0x24)
+ INTERRUPT_HANDLER(0x25)
+ INTERRUPT_HANDLER(0x26)
+ INTERRUPT_HANDLER(0x27)
+ INTERRUPT_HANDLER(0x28)
+ INTERRUPT_HANDLER(0x29)
+ INTERRUPT_HANDLER(0x2a)
+ INTERRUPT_HANDLER(0x2b)
+ INTERRUPT_HANDLER(0x2c)
+ INTERRUPT_HANDLER(0x2d)
+ INTERRUPT_HANDLER(0x2e)
+ INTERRUPT_HANDLER(0x2f)
- /* Reserved by OS */
+ /* Reserved by OS */
- INTERRUPT_HANDLER(0x30)
- INTERRUPT_HANDLER(0x31)
- INTERRUPT_HANDLER(0x32)
- INTERRUPT_HANDLER(0x33)
- INTERRUPT_HANDLER(0x34)
- INTERRUPT_HANDLER(0x35)
- INTERRUPT_HANDLER(0x36)
- INTERRUPT_HANDLER(0x37)
- INTERRUPT_HANDLER(0x38)
- INTERRUPT_HANDLER(0x39)
- INTERRUPT_HANDLER(0x3a)
- INTERRUPT_HANDLER(0x3b)
- INTERRUPT_HANDLER(0x3c)
- INTERRUPT_HANDLER(0x3d)
+ INTERRUPT_HANDLER(0x30)
+ INTERRUPT_HANDLER(0x31)
+ INTERRUPT_HANDLER(0x32)
+ INTERRUPT_HANDLER(0x33)
+ INTERRUPT_HANDLER(0x34)
+ INTERRUPT_HANDLER(0x35)
+ INTERRUPT_HANDLER(0x36)
+ INTERRUPT_HANDLER(0x37)
+ INTERRUPT_HANDLER(0x38)
+ INTERRUPT_HANDLER(0x39)
+ INTERRUPT_HANDLER(0x3a)
+ INTERRUPT_HANDLER(0x3b)
+ INTERRUPT_HANDLER(0x3c)
+ INTERRUPT_HANDLER(0x3d)
- /* Free */
+ /* Free */
- INTERRUPT_HANDLER(0x3e)
- INTERRUPT_HANDLER(0x3f)
- INTERRUPT_HANDLER(0x40)
- INTERRUPT_HANDLER(0x41)
- INTERRUPT_HANDLER(0x42)
- INTERRUPT_HANDLER(0x43)
- INTERRUPT_HANDLER(0x44)
- INTERRUPT_HANDLER(0x45)
- INTERRUPT_HANDLER(0x46)
- INTERRUPT_HANDLER(0x47)
- INTERRUPT_HANDLER(0x48)
- INTERRUPT_HANDLER(0x49)
- INTERRUPT_HANDLER(0x4a)
- INTERRUPT_HANDLER(0x4b)
- INTERRUPT_HANDLER(0x4c)
- INTERRUPT_HANDLER(0x4d)
- INTERRUPT_HANDLER(0x4e)
- INTERRUPT_HANDLER(0x4f)
- INTERRUPT_HANDLER(0x50)
- INTERRUPT_HANDLER(0x51)
- INTERRUPT_HANDLER(0x52)
- INTERRUPT_HANDLER(0x53)
- INTERRUPT_HANDLER(0x54)
- INTERRUPT_HANDLER(0x55)
- INTERRUPT_HANDLER(0x56)
- INTERRUPT_HANDLER(0x57)
- INTERRUPT_HANDLER(0x58)
- INTERRUPT_HANDLER(0x59)
- INTERRUPT_HANDLER(0x5a)
- INTERRUPT_HANDLER(0x5b)
- INTERRUPT_HANDLER(0x5c)
- INTERRUPT_HANDLER(0x5d)
- INTERRUPT_HANDLER(0x5e)
- INTERRUPT_HANDLER(0x5f)
- INTERRUPT_HANDLER(0x60)
- INTERRUPT_HANDLER(0x61)
- INTERRUPT_HANDLER(0x62)
- INTERRUPT_HANDLER(0x63)
- INTERRUPT_HANDLER(0x64)
- INTERRUPT_HANDLER(0x65)
- INTERRUPT_HANDLER(0x66)
- INTERRUPT_HANDLER(0x67)
- INTERRUPT_HANDLER(0x68)
- INTERRUPT_HANDLER(0x69)
- INTERRUPT_HANDLER(0x6a)
- INTERRUPT_HANDLER(0x6b)
- INTERRUPT_HANDLER(0x6c)
- INTERRUPT_HANDLER(0x6d)
- INTERRUPT_HANDLER(0x6e)
- INTERRUPT_HANDLER(0x6f)
- INTERRUPT_HANDLER(0x70)
- INTERRUPT_HANDLER(0x71)
- INTERRUPT_HANDLER(0x72)
- INTERRUPT_HANDLER(0x73)
- INTERRUPT_HANDLER(0x74)
- INTERRUPT_HANDLER(0x75)
- INTERRUPT_HANDLER(0x76)
- INTERRUPT_HANDLER(0x77)
- INTERRUPT_HANDLER(0x78)
- INTERRUPT_HANDLER(0x79)
- INTERRUPT_HANDLER(0x7a)
- INTERRUPT_HANDLER(0x7b)
- INTERRUPT_HANDLER(0x7c)
- INTERRUPT_HANDLER(0x7d)
- INTERRUPT_HANDLER(0x7e)
- INTERRUPT_HANDLER(0x7f)
- INTERRUPT_HANDLER(0x80)
- INTERRUPT_HANDLER(0x81)
- INTERRUPT_HANDLER(0x82)
- INTERRUPT_HANDLER(0x83)
- INTERRUPT_HANDLER(0x84)
- INTERRUPT_HANDLER(0x85)
- INTERRUPT_HANDLER(0x86)
- INTERRUPT_HANDLER(0x87)
- INTERRUPT_HANDLER(0x88)
- INTERRUPT_HANDLER(0x89)
- INTERRUPT_HANDLER(0x8a)
- INTERRUPT_HANDLER(0x8b)
- INTERRUPT_HANDLER(0x8c)
- INTERRUPT_HANDLER(0x8d)
- INTERRUPT_HANDLER(0x8e)
- INTERRUPT_HANDLER(0x8f)
- INTERRUPT_HANDLER(0x90)
- INTERRUPT_HANDLER(0x91)
- INTERRUPT_HANDLER(0x92)
- INTERRUPT_HANDLER(0x93)
- INTERRUPT_HANDLER(0x94)
- INTERRUPT_HANDLER(0x95)
- INTERRUPT_HANDLER(0x96)
- INTERRUPT_HANDLER(0x97)
- INTERRUPT_HANDLER(0x98)
- INTERRUPT_HANDLER(0x99)
- INTERRUPT_HANDLER(0x9a)
- INTERRUPT_HANDLER(0x9b)
- INTERRUPT_HANDLER(0x9c)
- INTERRUPT_HANDLER(0x9d)
- INTERRUPT_HANDLER(0x9e)
- INTERRUPT_HANDLER(0x9f)
- INTERRUPT_HANDLER(0xa0)
- INTERRUPT_HANDLER(0xa1)
- INTERRUPT_HANDLER(0xa2)
- INTERRUPT_HANDLER(0xa3)
- INTERRUPT_HANDLER(0xa4)
- INTERRUPT_HANDLER(0xa5)
- INTERRUPT_HANDLER(0xa6)
- INTERRUPT_HANDLER(0xa7)
- INTERRUPT_HANDLER(0xa8)
- INTERRUPT_HANDLER(0xa9)
- INTERRUPT_HANDLER(0xaa)
- INTERRUPT_HANDLER(0xab)
- INTERRUPT_HANDLER(0xac)
- INTERRUPT_HANDLER(0xad)
- INTERRUPT_HANDLER(0xae)
- INTERRUPT_HANDLER(0xaf)
- INTERRUPT_HANDLER(0xb0)
- INTERRUPT_HANDLER(0xb1)
- INTERRUPT_HANDLER(0xb2)
- INTERRUPT_HANDLER(0xb3)
- INTERRUPT_HANDLER(0xb4)
- INTERRUPT_HANDLER(0xb5)
- INTERRUPT_HANDLER(0xb6)
- INTERRUPT_HANDLER(0xb7)
- INTERRUPT_HANDLER(0xb8)
- INTERRUPT_HANDLER(0xb9)
- INTERRUPT_HANDLER(0xba)
- INTERRUPT_HANDLER(0xbb)
- INTERRUPT_HANDLER(0xbc)
- INTERRUPT_HANDLER(0xbd)
- INTERRUPT_HANDLER(0xbe)
- INTERRUPT_HANDLER(0xbf)
- INTERRUPT_HANDLER(0xc0)
- INTERRUPT_HANDLER(0xc1)
- INTERRUPT_HANDLER(0xc2)
- INTERRUPT_HANDLER(0xc3)
- INTERRUPT_HANDLER(0xc4)
- INTERRUPT_HANDLER(0xc5)
- INTERRUPT_HANDLER(0xc6)
- INTERRUPT_HANDLER(0xc7)
- INTERRUPT_HANDLER(0xc8)
- INTERRUPT_HANDLER(0xc9)
- INTERRUPT_HANDLER(0xca)
- INTERRUPT_HANDLER(0xcb)
- INTERRUPT_HANDLER(0xcc)
- INTERRUPT_HANDLER(0xcd)
- INTERRUPT_HANDLER(0xce)
- INTERRUPT_HANDLER(0xcf)
- INTERRUPT_HANDLER(0xd0)
- INTERRUPT_HANDLER(0xd1)
- INTERRUPT_HANDLER(0xd2)
- INTERRUPT_HANDLER(0xd3)
- INTERRUPT_HANDLER(0xd4)
- INTERRUPT_HANDLER(0xd5)
- INTERRUPT_HANDLER(0xd6)
- INTERRUPT_HANDLER(0xd7)
- INTERRUPT_HANDLER(0xd8)
- INTERRUPT_HANDLER(0xd9)
- INTERRUPT_HANDLER(0xda)
- INTERRUPT_HANDLER(0xdb)
- INTERRUPT_HANDLER(0xdc)
- INTERRUPT_HANDLER(0xdd)
- INTERRUPT_HANDLER(0xde)
- INTERRUPT_HANDLER(0xdf)
- INTERRUPT_HANDLER(0xe0)
- INTERRUPT_HANDLER(0xe1)
- INTERRUPT_HANDLER(0xe2)
- INTERRUPT_HANDLER(0xe3)
- INTERRUPT_HANDLER(0xe4)
- INTERRUPT_HANDLER(0xe5)
- INTERRUPT_HANDLER(0xe6)
- INTERRUPT_HANDLER(0xe7)
- INTERRUPT_HANDLER(0xe8)
- INTERRUPT_HANDLER(0xe9)
- INTERRUPT_HANDLER(0xea)
- INTERRUPT_HANDLER(0xeb)
- INTERRUPT_HANDLER(0xec)
- INTERRUPT_HANDLER(0xed)
- INTERRUPT_HANDLER(0xee)
- INTERRUPT_HANDLER(0xef)
- INTERRUPT_HANDLER(0xf0)
- INTERRUPT_HANDLER(0xf1)
- INTERRUPT_HANDLER(0xf2)
- INTERRUPT_HANDLER(0xf3)
- INTERRUPT_HANDLER(0xf4)
- INTERRUPT_HANDLER(0xf5)
- INTERRUPT_HANDLER(0xf6)
- INTERRUPT_HANDLER(0xf7)
- INTERRUPT_HANDLER(0xf8)
- INTERRUPT_HANDLER(0xf9)
- INTERRUPT_HANDLER(0xfa)
- INTERRUPT_HANDLER(0xfb)
- INTERRUPT_HANDLER(0xfc)
- INTERRUPT_HANDLER(0xfd)
- INTERRUPT_HANDLER(0xfe)
- INTERRUPT_HANDLER(0xff)
+ INTERRUPT_HANDLER(0x3e)
+ INTERRUPT_HANDLER(0x3f)
+ INTERRUPT_HANDLER(0x40)
+ INTERRUPT_HANDLER(0x41)
+ INTERRUPT_HANDLER(0x42)
+ INTERRUPT_HANDLER(0x43)
+ INTERRUPT_HANDLER(0x44)
+ INTERRUPT_HANDLER(0x45)
+ INTERRUPT_HANDLER(0x46)
+ INTERRUPT_HANDLER(0x47)
+ INTERRUPT_HANDLER(0x48)
+ INTERRUPT_HANDLER(0x49)
+ INTERRUPT_HANDLER(0x4a)
+ INTERRUPT_HANDLER(0x4b)
+ INTERRUPT_HANDLER(0x4c)
+ INTERRUPT_HANDLER(0x4d)
+ INTERRUPT_HANDLER(0x4e)
+ INTERRUPT_HANDLER(0x4f)
+ INTERRUPT_HANDLER(0x50)
+ INTERRUPT_HANDLER(0x51)
+ INTERRUPT_HANDLER(0x52)
+ INTERRUPT_HANDLER(0x53)
+ INTERRUPT_HANDLER(0x54)
+ INTERRUPT_HANDLER(0x55)
+ INTERRUPT_HANDLER(0x56)
+ INTERRUPT_HANDLER(0x57)
+ INTERRUPT_HANDLER(0x58)
+ INTERRUPT_HANDLER(0x59)
+ INTERRUPT_HANDLER(0x5a)
+ INTERRUPT_HANDLER(0x5b)
+ INTERRUPT_HANDLER(0x5c)
+ INTERRUPT_HANDLER(0x5d)
+ INTERRUPT_HANDLER(0x5e)
+ INTERRUPT_HANDLER(0x5f)
+ INTERRUPT_HANDLER(0x60)
+ INTERRUPT_HANDLER(0x61)
+ INTERRUPT_HANDLER(0x62)
+ INTERRUPT_HANDLER(0x63)
+ INTERRUPT_HANDLER(0x64)
+ INTERRUPT_HANDLER(0x65)
+ INTERRUPT_HANDLER(0x66)
+ INTERRUPT_HANDLER(0x67)
+ INTERRUPT_HANDLER(0x68)
+ INTERRUPT_HANDLER(0x69)
+ INTERRUPT_HANDLER(0x6a)
+ INTERRUPT_HANDLER(0x6b)
+ INTERRUPT_HANDLER(0x6c)
+ INTERRUPT_HANDLER(0x6d)
+ INTERRUPT_HANDLER(0x6e)
+ INTERRUPT_HANDLER(0x6f)
+ INTERRUPT_HANDLER(0x70)
+ INTERRUPT_HANDLER(0x71)
+ INTERRUPT_HANDLER(0x72)
+ INTERRUPT_HANDLER(0x73)
+ INTERRUPT_HANDLER(0x74)
+ INTERRUPT_HANDLER(0x75)
+ INTERRUPT_HANDLER(0x76)
+ INTERRUPT_HANDLER(0x77)
+ INTERRUPT_HANDLER(0x78)
+ INTERRUPT_HANDLER(0x79)
+ INTERRUPT_HANDLER(0x7a)
+ INTERRUPT_HANDLER(0x7b)
+ INTERRUPT_HANDLER(0x7c)
+ INTERRUPT_HANDLER(0x7d)
+ INTERRUPT_HANDLER(0x7e)
+ INTERRUPT_HANDLER(0x7f)
+ INTERRUPT_HANDLER(0x80)
+ INTERRUPT_HANDLER(0x81)
+ INTERRUPT_HANDLER(0x82)
+ INTERRUPT_HANDLER(0x83)
+ INTERRUPT_HANDLER(0x84)
+ INTERRUPT_HANDLER(0x85)
+ INTERRUPT_HANDLER(0x86)
+ INTERRUPT_HANDLER(0x87)
+ INTERRUPT_HANDLER(0x88)
+ INTERRUPT_HANDLER(0x89)
+ INTERRUPT_HANDLER(0x8a)
+ INTERRUPT_HANDLER(0x8b)
+ INTERRUPT_HANDLER(0x8c)
+ INTERRUPT_HANDLER(0x8d)
+ INTERRUPT_HANDLER(0x8e)
+ INTERRUPT_HANDLER(0x8f)
+ INTERRUPT_HANDLER(0x90)
+ INTERRUPT_HANDLER(0x91)
+ INTERRUPT_HANDLER(0x92)
+ INTERRUPT_HANDLER(0x93)
+ INTERRUPT_HANDLER(0x94)
+ INTERRUPT_HANDLER(0x95)
+ INTERRUPT_HANDLER(0x96)
+ INTERRUPT_HANDLER(0x97)
+ INTERRUPT_HANDLER(0x98)
+ INTERRUPT_HANDLER(0x99)
+ INTERRUPT_HANDLER(0x9a)
+ INTERRUPT_HANDLER(0x9b)
+ INTERRUPT_HANDLER(0x9c)
+ INTERRUPT_HANDLER(0x9d)
+ INTERRUPT_HANDLER(0x9e)
+ INTERRUPT_HANDLER(0x9f)
+ INTERRUPT_HANDLER(0xa0)
+ INTERRUPT_HANDLER(0xa1)
+ INTERRUPT_HANDLER(0xa2)
+ INTERRUPT_HANDLER(0xa3)
+ INTERRUPT_HANDLER(0xa4)
+ INTERRUPT_HANDLER(0xa5)
+ INTERRUPT_HANDLER(0xa6)
+ INTERRUPT_HANDLER(0xa7)
+ INTERRUPT_HANDLER(0xa8)
+ INTERRUPT_HANDLER(0xa9)
+ INTERRUPT_HANDLER(0xaa)
+ INTERRUPT_HANDLER(0xab)
+ INTERRUPT_HANDLER(0xac)
+ INTERRUPT_HANDLER(0xad)
+ INTERRUPT_HANDLER(0xae)
+ INTERRUPT_HANDLER(0xaf)
+ INTERRUPT_HANDLER(0xb0)
+ INTERRUPT_HANDLER(0xb1)
+ INTERRUPT_HANDLER(0xb2)
+ INTERRUPT_HANDLER(0xb3)
+ INTERRUPT_HANDLER(0xb4)
+ INTERRUPT_HANDLER(0xb5)
+ INTERRUPT_HANDLER(0xb6)
+ INTERRUPT_HANDLER(0xb7)
+ INTERRUPT_HANDLER(0xb8)
+ INTERRUPT_HANDLER(0xb9)
+ INTERRUPT_HANDLER(0xba)
+ INTERRUPT_HANDLER(0xbb)
+ INTERRUPT_HANDLER(0xbc)
+ INTERRUPT_HANDLER(0xbd)
+ INTERRUPT_HANDLER(0xbe)
+ INTERRUPT_HANDLER(0xbf)
+ INTERRUPT_HANDLER(0xc0)
+ INTERRUPT_HANDLER(0xc1)
+ INTERRUPT_HANDLER(0xc2)
+ INTERRUPT_HANDLER(0xc3)
+ INTERRUPT_HANDLER(0xc4)
+ INTERRUPT_HANDLER(0xc5)
+ INTERRUPT_HANDLER(0xc6)
+ INTERRUPT_HANDLER(0xc7)
+ INTERRUPT_HANDLER(0xc8)
+ INTERRUPT_HANDLER(0xc9)
+ INTERRUPT_HANDLER(0xca)
+ INTERRUPT_HANDLER(0xcb)
+ INTERRUPT_HANDLER(0xcc)
+ INTERRUPT_HANDLER(0xcd)
+ INTERRUPT_HANDLER(0xce)
+ INTERRUPT_HANDLER(0xcf)
+ INTERRUPT_HANDLER(0xd0)
+ INTERRUPT_HANDLER(0xd1)
+ INTERRUPT_HANDLER(0xd2)
+ INTERRUPT_HANDLER(0xd3)
+ INTERRUPT_HANDLER(0xd4)
+ INTERRUPT_HANDLER(0xd5)
+ INTERRUPT_HANDLER(0xd6)
+ INTERRUPT_HANDLER(0xd7)
+ INTERRUPT_HANDLER(0xd8)
+ INTERRUPT_HANDLER(0xd9)
+ INTERRUPT_HANDLER(0xda)
+ INTERRUPT_HANDLER(0xdb)
+ INTERRUPT_HANDLER(0xdc)
+ INTERRUPT_HANDLER(0xdd)
+ INTERRUPT_HANDLER(0xde)
+ INTERRUPT_HANDLER(0xdf)
+ INTERRUPT_HANDLER(0xe0)
+ INTERRUPT_HANDLER(0xe1)
+ INTERRUPT_HANDLER(0xe2)
+ INTERRUPT_HANDLER(0xe3)
+ INTERRUPT_HANDLER(0xe4)
+ INTERRUPT_HANDLER(0xe5)
+ INTERRUPT_HANDLER(0xe6)
+ INTERRUPT_HANDLER(0xe7)
+ INTERRUPT_HANDLER(0xe8)
+ INTERRUPT_HANDLER(0xe9)
+ INTERRUPT_HANDLER(0xea)
+ INTERRUPT_HANDLER(0xeb)
+ INTERRUPT_HANDLER(0xec)
+ INTERRUPT_HANDLER(0xed)
+ INTERRUPT_HANDLER(0xee)
+ INTERRUPT_HANDLER(0xef)
+ INTERRUPT_HANDLER(0xf0)
+ INTERRUPT_HANDLER(0xf1)
+ INTERRUPT_HANDLER(0xf2)
+ INTERRUPT_HANDLER(0xf3)
+ INTERRUPT_HANDLER(0xf4)
+ INTERRUPT_HANDLER(0xf5)
+ INTERRUPT_HANDLER(0xf6)
+ INTERRUPT_HANDLER(0xf7)
+ INTERRUPT_HANDLER(0xf8)
+ INTERRUPT_HANDLER(0xf9)
+ INTERRUPT_HANDLER(0xfa)
+ INTERRUPT_HANDLER(0xfb)
+ INTERRUPT_HANDLER(0xfc)
+ INTERRUPT_HANDLER(0xfd)
+ INTERRUPT_HANDLER(0xfe)
+ INTERRUPT_HANDLER(0xff)
#pragma endregion Exceptions
- void Init(int Core)
- {
- if (Core == 0) /* Remap PIC using BSP */
- {
- // PIC
- outb(0x20, 0x10 | 0x1);
- outb(0x80, 0);
- outb(0xA0, 0x10 | 0x10);
- outb(0x80, 0);
+ void Init(int Core)
+ {
+ if (Core == 0) /* Remap PIC using BSP */
+ {
+ // PIC
+ outb(0x20, 0x10 | 0x1);
+ outb(0x80, 0);
+ outb(0xA0, 0x10 | 0x10);
+ outb(0x80, 0);
- outb(0x21, 0x20);
- outb(0x80, 0);
- outb(0xA1, 0x28);
- outb(0x80, 0);
+ outb(0x21, 0x20);
+ outb(0x80, 0);
+ outb(0xA1, 0x28);
+ outb(0x80, 0);
- outb(0x21, 0x04);
- outb(0x80, 0);
- outb(0xA1, 0x02);
- outb(0x80, 0);
+ outb(0x21, 0x04);
+ outb(0x80, 0);
+ outb(0xA1, 0x02);
+ outb(0x80, 0);
- outb(0x21, 1);
- outb(0x80, 0);
- outb(0xA1, 1);
- outb(0x80, 0);
+ outb(0x21, 1);
+ outb(0x80, 0);
+ outb(0xA1, 1);
+ outb(0x80, 0);
- // Masking and disabling PIC
- // outb(0x21, 0xff);
- // outb(0x80, 0);
- // outb(0xA1, 0xff);
- }
+ // Masking and disabling PIC
+ // outb(0x21, 0xff);
+ // outb(0x80, 0);
+ // outb(0xA1, 0xff);
+ }
- /* ISR */
+ /* ISR */
#ifdef DEBUG
- // if (!DebuggerIsAttached)
- if (true)
- {
+ // if (!DebuggerIsAttached)
+ if (true)
+ {
#endif
- SetEntry(0x0, InterruptHandler_0x0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x1, InterruptHandler_0x1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2, InterruptHandler_0x2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x3, InterruptHandler_0x3, TRAP_32BIT, RING3, (!DebuggerIsAttached), GDT_KERNEL_CODE); /* Do not handle breakpoints if we are debugging the kernel. */
- SetEntry(0x4, InterruptHandler_0x4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5, InterruptHandler_0x5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6, InterruptHandler_0x6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7, InterruptHandler_0x7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8, InterruptHandler_0x8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9, InterruptHandler_0x9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa, InterruptHandler_0xa, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb, InterruptHandler_0xb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc, InterruptHandler_0xc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd, InterruptHandler_0xd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe, InterruptHandler_0xe, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf, InterruptHandler_0xf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x10, InterruptHandler_0x10, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x11, InterruptHandler_0x11, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x12, InterruptHandler_0x12, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x13, InterruptHandler_0x13, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x14, InterruptHandler_0x14, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x15, InterruptHandler_0x15, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x16, InterruptHandler_0x16, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x17, InterruptHandler_0x17, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x18, InterruptHandler_0x18, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x19, InterruptHandler_0x19, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x1a, InterruptHandler_0x1a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x1b, InterruptHandler_0x1b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x1c, InterruptHandler_0x1c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x1d, InterruptHandler_0x1d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x1e, InterruptHandler_0x1e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x1f, InterruptHandler_0x1f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x0, InterruptHandler_0x0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x1, InterruptHandler_0x1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2, InterruptHandler_0x2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x3, InterruptHandler_0x3, TRAP_32BIT, RING3, (!DebuggerIsAttached), GDT_KERNEL_CODE); /* Do not handle breakpoints if we are debugging the kernel. */
+ SetEntry(0x4, InterruptHandler_0x4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5, InterruptHandler_0x5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6, InterruptHandler_0x6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7, InterruptHandler_0x7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8, InterruptHandler_0x8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9, InterruptHandler_0x9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa, InterruptHandler_0xa, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb, InterruptHandler_0xb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc, InterruptHandler_0xc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd, InterruptHandler_0xd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe, InterruptHandler_0xe, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf, InterruptHandler_0xf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x10, InterruptHandler_0x10, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x11, InterruptHandler_0x11, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x12, InterruptHandler_0x12, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x13, InterruptHandler_0x13, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x14, InterruptHandler_0x14, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x15, InterruptHandler_0x15, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x16, InterruptHandler_0x16, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x17, InterruptHandler_0x17, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x18, InterruptHandler_0x18, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x19, InterruptHandler_0x19, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x1a, InterruptHandler_0x1a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x1b, InterruptHandler_0x1b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x1c, InterruptHandler_0x1c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x1d, InterruptHandler_0x1d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x1e, InterruptHandler_0x1e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x1f, InterruptHandler_0x1f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
#ifdef DEBUG
- }
- else
- KPrint("\eFFA500The debugger is attached, not setting up the ISR.");
+ }
+ else
+ KPrint("\eFFA500The debugger is attached, not setting up the ISR.");
#endif
- /* IRQ */
+ /* IRQ */
- SetEntry(0x20, InterruptHandler_0x20, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x21, InterruptHandler_0x21, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x22, InterruptHandler_0x22, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x23, InterruptHandler_0x23, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x24, InterruptHandler_0x24, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x25, InterruptHandler_0x25, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x26, InterruptHandler_0x26, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x27, InterruptHandler_0x27, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x28, InterruptHandler_0x28, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x29, InterruptHandler_0x29, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2a, InterruptHandler_0x2a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2b, InterruptHandler_0x2b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2c, InterruptHandler_0x2c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2d, InterruptHandler_0x2d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2e, InterruptHandler_0x2e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x2f, InterruptHandler_0x2f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x20, InterruptHandler_0x20, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x21, InterruptHandler_0x21, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x22, InterruptHandler_0x22, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x23, InterruptHandler_0x23, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x24, InterruptHandler_0x24, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x25, InterruptHandler_0x25, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x26, InterruptHandler_0x26, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x27, InterruptHandler_0x27, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x28, InterruptHandler_0x28, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x29, InterruptHandler_0x29, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2a, InterruptHandler_0x2a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2b, InterruptHandler_0x2b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2c, InterruptHandler_0x2c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2d, InterruptHandler_0x2d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2e, InterruptHandler_0x2e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x2f, InterruptHandler_0x2f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- /* Reserved by OS */
+ /* Reserved by OS */
- SetEntry(0x30, InterruptHandler_0x30, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x31, InterruptHandler_0x31, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x32, InterruptHandler_0x32, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x33, InterruptHandler_0x33, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x34, InterruptHandler_0x34, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x35, InterruptHandler_0x35, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x36, InterruptHandler_0x36, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x37, InterruptHandler_0x37, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x38, InterruptHandler_0x38, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x39, InterruptHandler_0x39, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x3a, InterruptHandler_0x3a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x3b, InterruptHandler_0x3b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x3c, InterruptHandler_0x3c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x3d, InterruptHandler_0x3d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x30, InterruptHandler_0x30, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x31, InterruptHandler_0x31, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x32, InterruptHandler_0x32, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x33, InterruptHandler_0x33, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x34, InterruptHandler_0x34, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x35, InterruptHandler_0x35, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x36, InterruptHandler_0x36, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x37, InterruptHandler_0x37, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x38, InterruptHandler_0x38, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x39, InterruptHandler_0x39, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x3a, InterruptHandler_0x3a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x3b, InterruptHandler_0x3b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x3c, InterruptHandler_0x3c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x3d, InterruptHandler_0x3d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- /* Free */
+ /* Free */
- SetEntry(0x3e, InterruptHandler_0x3e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x3f, InterruptHandler_0x3f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x40, InterruptHandler_0x40, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x41, InterruptHandler_0x41, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x42, InterruptHandler_0x42, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x43, InterruptHandler_0x43, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x44, InterruptHandler_0x44, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x45, InterruptHandler_0x45, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x46, InterruptHandler_0x46, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x47, InterruptHandler_0x47, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x48, InterruptHandler_0x48, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x49, InterruptHandler_0x49, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4a, InterruptHandler_0x4a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4b, InterruptHandler_0x4b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4c, InterruptHandler_0x4c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4d, InterruptHandler_0x4d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4e, InterruptHandler_0x4e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x4f, InterruptHandler_0x4f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x50, InterruptHandler_0x50, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x51, InterruptHandler_0x51, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x52, InterruptHandler_0x52, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x53, InterruptHandler_0x53, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x54, InterruptHandler_0x54, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x55, InterruptHandler_0x55, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x56, InterruptHandler_0x56, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x57, InterruptHandler_0x57, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x58, InterruptHandler_0x58, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x59, InterruptHandler_0x59, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5a, InterruptHandler_0x5a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5b, InterruptHandler_0x5b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5c, InterruptHandler_0x5c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5d, InterruptHandler_0x5d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5e, InterruptHandler_0x5e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x5f, InterruptHandler_0x5f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x60, InterruptHandler_0x60, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x61, InterruptHandler_0x61, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x62, InterruptHandler_0x62, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x63, InterruptHandler_0x63, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x64, InterruptHandler_0x64, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x65, InterruptHandler_0x65, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x66, InterruptHandler_0x66, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x67, InterruptHandler_0x67, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x68, InterruptHandler_0x68, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x69, InterruptHandler_0x69, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6a, InterruptHandler_0x6a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6b, InterruptHandler_0x6b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6c, InterruptHandler_0x6c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6d, InterruptHandler_0x6d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6e, InterruptHandler_0x6e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x6f, InterruptHandler_0x6f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x70, InterruptHandler_0x70, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x71, InterruptHandler_0x71, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x72, InterruptHandler_0x72, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x73, InterruptHandler_0x73, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x74, InterruptHandler_0x74, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x75, InterruptHandler_0x75, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x76, InterruptHandler_0x76, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x77, InterruptHandler_0x77, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x78, InterruptHandler_0x78, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x79, InterruptHandler_0x79, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7a, InterruptHandler_0x7a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7b, InterruptHandler_0x7b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7c, InterruptHandler_0x7c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7d, InterruptHandler_0x7d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7e, InterruptHandler_0x7e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x7f, InterruptHandler_0x7f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x80, InterruptHandler_0x80, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x81, InterruptHandler_0x81, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x82, InterruptHandler_0x82, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x83, InterruptHandler_0x83, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x84, InterruptHandler_0x84, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x85, InterruptHandler_0x85, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x86, InterruptHandler_0x86, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x87, InterruptHandler_0x87, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x88, InterruptHandler_0x88, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x89, InterruptHandler_0x89, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8a, InterruptHandler_0x8a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8b, InterruptHandler_0x8b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8c, InterruptHandler_0x8c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8d, InterruptHandler_0x8d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8e, InterruptHandler_0x8e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x8f, InterruptHandler_0x8f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x90, InterruptHandler_0x90, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x91, InterruptHandler_0x91, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x92, InterruptHandler_0x92, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x93, InterruptHandler_0x93, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x94, InterruptHandler_0x94, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x95, InterruptHandler_0x95, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x96, InterruptHandler_0x96, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x97, InterruptHandler_0x97, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x98, InterruptHandler_0x98, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x99, InterruptHandler_0x99, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9a, InterruptHandler_0x9a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9b, InterruptHandler_0x9b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9c, InterruptHandler_0x9c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9d, InterruptHandler_0x9d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9e, InterruptHandler_0x9e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0x9f, InterruptHandler_0x9f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa0, InterruptHandler_0xa0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa1, InterruptHandler_0xa1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa2, InterruptHandler_0xa2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa3, InterruptHandler_0xa3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa4, InterruptHandler_0xa4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa5, InterruptHandler_0xa5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa6, InterruptHandler_0xa6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa7, InterruptHandler_0xa7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa8, InterruptHandler_0xa8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xa9, InterruptHandler_0xa9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xaa, InterruptHandler_0xaa, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xab, InterruptHandler_0xab, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xac, InterruptHandler_0xac, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xad, InterruptHandler_0xad, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xae, InterruptHandler_0xae, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xaf, InterruptHandler_0xaf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb0, InterruptHandler_0xb0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb1, InterruptHandler_0xb1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb2, InterruptHandler_0xb2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb3, InterruptHandler_0xb3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb4, InterruptHandler_0xb4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb5, InterruptHandler_0xb5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb6, InterruptHandler_0xb6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb7, InterruptHandler_0xb7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb8, InterruptHandler_0xb8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xb9, InterruptHandler_0xb9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xba, InterruptHandler_0xba, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xbb, InterruptHandler_0xbb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xbc, InterruptHandler_0xbc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xbd, InterruptHandler_0xbd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xbe, InterruptHandler_0xbe, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xbf, InterruptHandler_0xbf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc0, InterruptHandler_0xc0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc1, InterruptHandler_0xc1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc2, InterruptHandler_0xc2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc3, InterruptHandler_0xc3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc4, InterruptHandler_0xc4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc5, InterruptHandler_0xc5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc6, InterruptHandler_0xc6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc7, InterruptHandler_0xc7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc8, InterruptHandler_0xc8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xc9, InterruptHandler_0xc9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xca, InterruptHandler_0xca, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xcb, InterruptHandler_0xcb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xcc, InterruptHandler_0xcc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xcd, InterruptHandler_0xcd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xce, InterruptHandler_0xce, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xcf, InterruptHandler_0xcf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd0, InterruptHandler_0xd0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd1, InterruptHandler_0xd1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd2, InterruptHandler_0xd2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd3, InterruptHandler_0xd3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd4, InterruptHandler_0xd4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd5, InterruptHandler_0xd5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd6, InterruptHandler_0xd6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd7, InterruptHandler_0xd7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd8, InterruptHandler_0xd8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xd9, InterruptHandler_0xd9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xda, InterruptHandler_0xda, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xdb, InterruptHandler_0xdb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xdc, InterruptHandler_0xdc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xdd, InterruptHandler_0xdd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xde, InterruptHandler_0xde, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xdf, InterruptHandler_0xdf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe0, InterruptHandler_0xe0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe1, InterruptHandler_0xe1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe2, InterruptHandler_0xe2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe3, InterruptHandler_0xe3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe4, InterruptHandler_0xe4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe5, InterruptHandler_0xe5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe6, InterruptHandler_0xe6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe7, InterruptHandler_0xe7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe8, InterruptHandler_0xe8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xe9, InterruptHandler_0xe9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xea, InterruptHandler_0xea, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xeb, InterruptHandler_0xeb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xec, InterruptHandler_0xec, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xed, InterruptHandler_0xed, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xee, InterruptHandler_0xee, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xef, InterruptHandler_0xef, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf0, InterruptHandler_0xf0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf1, InterruptHandler_0xf1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf2, InterruptHandler_0xf2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf3, InterruptHandler_0xf3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf4, InterruptHandler_0xf4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf5, InterruptHandler_0xf5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf6, InterruptHandler_0xf6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf7, InterruptHandler_0xf7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf8, InterruptHandler_0xf8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xf9, InterruptHandler_0xf9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xfa, InterruptHandler_0xfa, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xfb, InterruptHandler_0xfb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xfc, InterruptHandler_0xfc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xfd, InterruptHandler_0xfd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xfe, InterruptHandler_0xfe, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- SetEntry(0xff, InterruptHandler_0xff, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
- CPU::x32::lidt(&idtd);
- }
+ SetEntry(0x3e, InterruptHandler_0x3e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x3f, InterruptHandler_0x3f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x40, InterruptHandler_0x40, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x41, InterruptHandler_0x41, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x42, InterruptHandler_0x42, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x43, InterruptHandler_0x43, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x44, InterruptHandler_0x44, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x45, InterruptHandler_0x45, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x46, InterruptHandler_0x46, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x47, InterruptHandler_0x47, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x48, InterruptHandler_0x48, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x49, InterruptHandler_0x49, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4a, InterruptHandler_0x4a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4b, InterruptHandler_0x4b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4c, InterruptHandler_0x4c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4d, InterruptHandler_0x4d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4e, InterruptHandler_0x4e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x4f, InterruptHandler_0x4f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x50, InterruptHandler_0x50, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x51, InterruptHandler_0x51, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x52, InterruptHandler_0x52, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x53, InterruptHandler_0x53, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x54, InterruptHandler_0x54, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x55, InterruptHandler_0x55, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x56, InterruptHandler_0x56, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x57, InterruptHandler_0x57, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x58, InterruptHandler_0x58, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x59, InterruptHandler_0x59, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5a, InterruptHandler_0x5a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5b, InterruptHandler_0x5b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5c, InterruptHandler_0x5c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5d, InterruptHandler_0x5d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5e, InterruptHandler_0x5e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x5f, InterruptHandler_0x5f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x60, InterruptHandler_0x60, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x61, InterruptHandler_0x61, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x62, InterruptHandler_0x62, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x63, InterruptHandler_0x63, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x64, InterruptHandler_0x64, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x65, InterruptHandler_0x65, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x66, InterruptHandler_0x66, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x67, InterruptHandler_0x67, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x68, InterruptHandler_0x68, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x69, InterruptHandler_0x69, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6a, InterruptHandler_0x6a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6b, InterruptHandler_0x6b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6c, InterruptHandler_0x6c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6d, InterruptHandler_0x6d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6e, InterruptHandler_0x6e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x6f, InterruptHandler_0x6f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x70, InterruptHandler_0x70, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x71, InterruptHandler_0x71, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x72, InterruptHandler_0x72, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x73, InterruptHandler_0x73, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x74, InterruptHandler_0x74, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x75, InterruptHandler_0x75, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x76, InterruptHandler_0x76, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x77, InterruptHandler_0x77, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x78, InterruptHandler_0x78, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x79, InterruptHandler_0x79, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7a, InterruptHandler_0x7a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7b, InterruptHandler_0x7b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7c, InterruptHandler_0x7c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7d, InterruptHandler_0x7d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7e, InterruptHandler_0x7e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x7f, InterruptHandler_0x7f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x80, InterruptHandler_0x80, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x81, InterruptHandler_0x81, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x82, InterruptHandler_0x82, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x83, InterruptHandler_0x83, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x84, InterruptHandler_0x84, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x85, InterruptHandler_0x85, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x86, InterruptHandler_0x86, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x87, InterruptHandler_0x87, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x88, InterruptHandler_0x88, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x89, InterruptHandler_0x89, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8a, InterruptHandler_0x8a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8b, InterruptHandler_0x8b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8c, InterruptHandler_0x8c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8d, InterruptHandler_0x8d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8e, InterruptHandler_0x8e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x8f, InterruptHandler_0x8f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x90, InterruptHandler_0x90, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x91, InterruptHandler_0x91, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x92, InterruptHandler_0x92, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x93, InterruptHandler_0x93, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x94, InterruptHandler_0x94, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x95, InterruptHandler_0x95, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x96, InterruptHandler_0x96, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x97, InterruptHandler_0x97, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x98, InterruptHandler_0x98, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x99, InterruptHandler_0x99, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9a, InterruptHandler_0x9a, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9b, InterruptHandler_0x9b, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9c, InterruptHandler_0x9c, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9d, InterruptHandler_0x9d, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9e, InterruptHandler_0x9e, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0x9f, InterruptHandler_0x9f, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa0, InterruptHandler_0xa0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa1, InterruptHandler_0xa1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa2, InterruptHandler_0xa2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa3, InterruptHandler_0xa3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa4, InterruptHandler_0xa4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa5, InterruptHandler_0xa5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa6, InterruptHandler_0xa6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa7, InterruptHandler_0xa7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa8, InterruptHandler_0xa8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xa9, InterruptHandler_0xa9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xaa, InterruptHandler_0xaa, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xab, InterruptHandler_0xab, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xac, InterruptHandler_0xac, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xad, InterruptHandler_0xad, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xae, InterruptHandler_0xae, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xaf, InterruptHandler_0xaf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb0, InterruptHandler_0xb0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb1, InterruptHandler_0xb1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb2, InterruptHandler_0xb2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb3, InterruptHandler_0xb3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb4, InterruptHandler_0xb4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb5, InterruptHandler_0xb5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb6, InterruptHandler_0xb6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb7, InterruptHandler_0xb7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb8, InterruptHandler_0xb8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xb9, InterruptHandler_0xb9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xba, InterruptHandler_0xba, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xbb, InterruptHandler_0xbb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xbc, InterruptHandler_0xbc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xbd, InterruptHandler_0xbd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xbe, InterruptHandler_0xbe, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xbf, InterruptHandler_0xbf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc0, InterruptHandler_0xc0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc1, InterruptHandler_0xc1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc2, InterruptHandler_0xc2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc3, InterruptHandler_0xc3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc4, InterruptHandler_0xc4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc5, InterruptHandler_0xc5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc6, InterruptHandler_0xc6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc7, InterruptHandler_0xc7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc8, InterruptHandler_0xc8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xc9, InterruptHandler_0xc9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xca, InterruptHandler_0xca, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xcb, InterruptHandler_0xcb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xcc, InterruptHandler_0xcc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xcd, InterruptHandler_0xcd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xce, InterruptHandler_0xce, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xcf, InterruptHandler_0xcf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd0, InterruptHandler_0xd0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd1, InterruptHandler_0xd1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd2, InterruptHandler_0xd2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd3, InterruptHandler_0xd3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd4, InterruptHandler_0xd4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd5, InterruptHandler_0xd5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd6, InterruptHandler_0xd6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd7, InterruptHandler_0xd7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd8, InterruptHandler_0xd8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xd9, InterruptHandler_0xd9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xda, InterruptHandler_0xda, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xdb, InterruptHandler_0xdb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xdc, InterruptHandler_0xdc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xdd, InterruptHandler_0xdd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xde, InterruptHandler_0xde, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xdf, InterruptHandler_0xdf, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe0, InterruptHandler_0xe0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe1, InterruptHandler_0xe1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe2, InterruptHandler_0xe2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe3, InterruptHandler_0xe3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe4, InterruptHandler_0xe4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe5, InterruptHandler_0xe5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe6, InterruptHandler_0xe6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe7, InterruptHandler_0xe7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe8, InterruptHandler_0xe8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xe9, InterruptHandler_0xe9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xea, InterruptHandler_0xea, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xeb, InterruptHandler_0xeb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xec, InterruptHandler_0xec, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xed, InterruptHandler_0xed, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xee, InterruptHandler_0xee, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xef, InterruptHandler_0xef, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf0, InterruptHandler_0xf0, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf1, InterruptHandler_0xf1, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf2, InterruptHandler_0xf2, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf3, InterruptHandler_0xf3, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf4, InterruptHandler_0xf4, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf5, InterruptHandler_0xf5, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf6, InterruptHandler_0xf6, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf7, InterruptHandler_0xf7, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf8, InterruptHandler_0xf8, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xf9, InterruptHandler_0xf9, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xfa, InterruptHandler_0xfa, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xfb, InterruptHandler_0xfb, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xfc, InterruptHandler_0xfc, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xfd, InterruptHandler_0xfd, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xfe, InterruptHandler_0xfe, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ SetEntry(0xff, InterruptHandler_0xff, TRAP_32BIT, RING0, true, GDT_KERNEL_CODE);
+ CPU::x32::lidt(&idtd);
+ }
}
diff --git a/Architecture/i386/cpu/SymmetricMultiprocessing.cpp b/Architecture/i386/cpu/SymmetricMultiprocessing.cpp
index eeb2185f..cdc5568c 100644
--- a/Architecture/i386/cpu/SymmetricMultiprocessing.cpp
+++ b/Architecture/i386/cpu/SymmetricMultiprocessing.cpp
@@ -23,17 +23,27 @@
#include
#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
#include "../../../kernel.h"
+#include "../acpi.hpp"
+#include "apic.hpp"
enum SMPTrampolineAddress
{
- PAGE_TABLE = 0x500,
- START_ADDR = 0x520,
- STACK = 0x570,
- GDT = 0x580,
- IDT = 0x590,
- CORE = 0x600,
- TRAMPOLINE_START = 0x2000
+ PAGE_TABLE = 0x500,
+ START_ADDR = 0x520,
+ STACK = 0x570,
+ GDT = 0x580,
+ IDT = 0x590,
+ CORE = 0x600,
+ TRAMPOLINE_START = 0x2000
};
std::atomic_bool CPUEnabled = false;
@@ -45,22 +55,33 @@ SafeFunction CPUData *GetCPU(long id) { return &CPUs[id]; }
SafeFunction CPUData *GetCurrentCPU()
{
- uint64_t ret = 0;
- if (!(&CPUs[ret])->IsActive)
- {
- // error("CPU %d is not active!", ret); FIXME
- return &CPUs[0];
- }
- assert((&CPUs[ret])->Checksum == CPU_DATA_CHECKSUM);
- return &CPUs[ret];
+ uint64_t ret = 0;
+ if (!(&CPUs[ret])->IsActive)
+ {
+ // error("CPU %d is not active!", ret); FIXME
+ return &CPUs[0];
+ }
+ assert((&CPUs[ret])->Checksum == CPU_DATA_CHECKSUM);
+ return &CPUs[ret];
}
namespace SMP
{
- int CPUCores = 0;
+ int CPUCores = 0;
- void Initialize(void *madt)
- {
- fixme("SMP::Initialize() is not implemented!");
- }
+ void Initialize(void *_madt)
+ {
+ ACPI::MADT *madt = (ACPI::MADT *)_madt;
+
+ int Cores = madt->CPUCores + 1;
+
+ if (Config.Cores > madt->CPUCores + 1)
+ KPrint("More cores requested than available. Using %d cores", madt->CPUCores + 1);
+ else if (Config.Cores != 0)
+ Cores = Config.Cores;
+
+ CPUCores = Cores;
+
+ fixme("SMP::Initialize() is not implemented!");
+ }
}
diff --git a/Architecture/i386/cpu/apic.hpp b/Architecture/i386/cpu/apic.hpp
index 24887b48..9f934846 100644
--- a/Architecture/i386/cpu/apic.hpp
+++ b/Architecture/i386/cpu/apic.hpp
@@ -25,330 +25,330 @@
namespace APIC
{
- enum APICRegisters
- {
- // source from: https://github.com/pdoane/osdev/blob/master/intr/local_apic.c
- APIC_ID = 0x20, // Local APIC ID
- APIC_VER = 0x30, // Local APIC Version
- APIC_TPR = 0x80, // Task Priority
- APIC_APR = 0x90, // Arbitration Priority
- APIC_PPR = 0xA0, // Processor Priority
- APIC_EOI = 0xB0, // EOI
- APIC_RRD = 0xC0, // Remote Read
- APIC_LDR = 0xD0, // Logical Destination
- APIC_DFR = 0xE0, // Destination Format
- APIC_SVR = 0xF0, // Spurious Interrupt Vector
- APIC_ISR = 0x100, // In-Service (8 registers)
- APIC_TMR = 0x180, // Trigger Mode (8 registers)
- APIC_IRR = 0x200, // Interrupt Request (8 registers)
- APIC_ESR = 0x280, // Error Status
- APIC_ICRLO = 0x300, // Interrupt Command
- APIC_ICRHI = 0x310, // Interrupt Command [63:32]
- APIC_TIMER = 0x320, // LVT Timer
- APIC_THERMAL = 0x330, // LVT Thermal Sensor
- APIC_PERF = 0x340, // LVT Performance Counter
- APIC_LINT0 = 0x350, // LVT LINT0
- APIC_LINT1 = 0x360, // LVT LINT1
- APIC_ERROR = 0x370, // LVT Error
- APIC_TICR = 0x380, // Initial Count (for Timer)
- APIC_TCCR = 0x390, // Current Count (for Timer)
- APIC_TDCR = 0x3E0, // Divide Configuration (for Timer)
- };
+ enum APICRegisters
+ {
+ // source from: https://github.com/pdoane/osdev/blob/master/intr/local_apic.c
+ APIC_ID = 0x20, // Local APIC ID
+ APIC_VER = 0x30, // Local APIC Version
+ APIC_TPR = 0x80, // Task Priority
+ APIC_APR = 0x90, // Arbitration Priority
+ APIC_PPR = 0xA0, // Processor Priority
+ APIC_EOI = 0xB0, // EOI
+ APIC_RRD = 0xC0, // Remote Read
+ APIC_LDR = 0xD0, // Logical Destination
+ APIC_DFR = 0xE0, // Destination Format
+ APIC_SVR = 0xF0, // Spurious Interrupt Vector
+ APIC_ISR = 0x100, // In-Service (8 registers)
+ APIC_TMR = 0x180, // Trigger Mode (8 registers)
+ APIC_IRR = 0x200, // Interrupt Request (8 registers)
+ APIC_ESR = 0x280, // Error Status
+ APIC_ICRLO = 0x300, // Interrupt Command
+ APIC_ICRHI = 0x310, // Interrupt Command [63:32]
+ APIC_TIMER = 0x320, // LVT Timer
+ APIC_THERMAL = 0x330, // LVT Thermal Sensor
+ APIC_PERF = 0x340, // LVT Performance Counter
+ APIC_LINT0 = 0x350, // LVT LINT0
+ APIC_LINT1 = 0x360, // LVT LINT1
+ APIC_ERROR = 0x370, // LVT Error
+ APIC_TICR = 0x380, // Initial Count (for Timer)
+ APIC_TCCR = 0x390, // Current Count (for Timer)
+ APIC_TDCR = 0x3E0, // Divide Configuration (for Timer)
+ };
- enum IOAPICRegisters
- {
- GetIOAPICVersion = 0x1
- };
+ enum IOAPICRegisters
+ {
+ GetIOAPICVersion = 0x1
+ };
- enum IOAPICFlags
- {
- ActiveHighLow = 2,
- EdgeLevel = 8
- };
+ enum IOAPICFlags
+ {
+ ActiveHighLow = 2,
+ EdgeLevel = 8
+ };
- enum APICDeliveryMode
- {
- Fixed = 0b000,
- LowestPriority = 0b001, /* Reserved */
- SMI = 0b010,
- APIC_DELIVERY_MODE_RESERVED0 = 0b011, /* Reserved */
- NMI = 0b100,
- INIT = 0b101,
- Startup = 0b110,
- ExtINT = 0b111 /* Reserved */
- };
+ enum APICDeliveryMode
+ {
+ Fixed = 0b000,
+ LowestPriority = 0b001, /* Reserved */
+ SMI = 0b010,
+ APIC_DELIVERY_MODE_RESERVED0 = 0b011, /* Reserved */
+ NMI = 0b100,
+ INIT = 0b101,
+ Startup = 0b110,
+ ExtINT = 0b111 /* Reserved */
+ };
- enum APICDestinationMode
- {
- Physical = 0b0,
- Logical = 0b1
- };
+ enum APICDestinationMode
+ {
+ Physical = 0b0,
+ Logical = 0b1
+ };
- enum APICDeliveryStatus
- {
- Idle = 0b0,
- SendPending = 0b1
- };
+ enum APICDeliveryStatus
+ {
+ Idle = 0b0,
+ SendPending = 0b1
+ };
- enum APICLevel
- {
- DeAssert = 0b0,
- Assert = 0b1
- };
+ enum APICLevel
+ {
+ DeAssert = 0b0,
+ Assert = 0b1
+ };
- enum APICTriggerMode
- {
- Edge = 0b0,
- Level = 0b1
- };
+ enum APICTriggerMode
+ {
+ Edge = 0b0,
+ Level = 0b1
+ };
- enum APICDestinationShorthand
- {
- NoShorthand = 0b00,
- Self = 0b01,
- AllIncludingSelf = 0b10,
- AllExcludingSelf = 0b11
- };
+ enum APICDestinationShorthand
+ {
+ NoShorthand = 0b00,
+ Self = 0b01,
+ AllIncludingSelf = 0b10,
+ AllExcludingSelf = 0b11
+ };
- enum LVTTimerDivide
- {
- DivideBy2 = 0b000,
- DivideBy4 = 0b001,
- DivideBy8 = 0b010,
- DivideBy16 = 0b011,
- DivideBy32 = 0b100,
- DivideBy64 = 0b101,
- DivideBy128 = 0b110,
- DivideBy1 = 0b111
- };
+ enum LVTTimerDivide
+ {
+ DivideBy2 = 0b000,
+ DivideBy4 = 0b001,
+ DivideBy8 = 0b010,
+ DivideBy16 = 0b011,
+ DivideBy32 = 0b100,
+ DivideBy64 = 0b101,
+ DivideBy128 = 0b110,
+ DivideBy1 = 0b111
+ };
- enum LVTTimerMask
- {
- Unmasked = 0b0,
- Masked = 0b1
- };
+ enum LVTTimerMask
+ {
+ Unmasked = 0b0,
+ Masked = 0b1
+ };
- enum LVTTimerMode
- {
- OneShot = 0b00,
- Periodic = 0b01,
- TSCDeadline = 0b10
- };
+ enum LVTTimerMode
+ {
+ OneShot = 0b00,
+ Periodic = 0b01,
+ TSCDeadline = 0b10
+ };
- typedef union
- {
- struct
- {
- /** @brief Interrupt Vector */
- uint64_t Vector : 8;
- /** @brief Reserved */
- uint64_t Reserved0 : 4;
- /**
- * @brief Delivery Status
- *
- * 0: Idle
- * 1: Send Pending
- */
- uint64_t DeliveryStatus : 1;
- /** @brief Reserved */
- uint64_t Reserved1 : 3;
- /**
- * @brief Mask
- *
- * 0: Not masked
- * 1: Masked
- */
- uint64_t Mask : 1;
- /** @brief Timer Mode
- *
- * 0: One-shot
- * 1: Periodic
- * 2: TSC-Deadline
- */
- uint64_t TimerMode : 1;
- /** @brief Reserved */
- uint64_t Reserved2 : 14;
- };
- uint64_t raw;
- } __packed LVTTimer;
+ typedef union
+ {
+ struct
+ {
+ /** @brief Interrupt Vector */
+ uint64_t Vector : 8;
+ /** @brief Reserved */
+ uint64_t Reserved0 : 4;
+ /**
+ * @brief Delivery Status
+ *
+ * 0: Idle
+ * 1: Send Pending
+ */
+ uint64_t DeliveryStatus : 1;
+ /** @brief Reserved */
+ uint64_t Reserved1 : 3;
+ /**
+ * @brief Mask
+ *
+ * 0: Not masked
+ * 1: Masked
+ */
+ uint64_t Mask : 1;
+ /** @brief Timer Mode
+ *
+ * 0: One-shot
+ * 1: Periodic
+ * 2: TSC-Deadline
+ */
+ uint64_t TimerMode : 1;
+ /** @brief Reserved */
+ uint64_t Reserved2 : 14;
+ };
+ uint64_t raw;
+ } __packed LVTTimer;
- typedef union
- {
- struct
- {
- /** @brief Spurious Vector */
- uint64_t Vector : 8;
- /** @brief Enable or disable APIC software */
- uint64_t Software : 1;
- /** @brief Focus Processor Checking */
- uint64_t FocusProcessorChecking : 1;
- /** @brief Reserved */
- uint64_t Reserved : 2;
- /** @brief Disable EOI Broadcast */
- uint64_t DisableEOIBroadcast : 1;
- /** @brief Reserved */
- uint64_t Reserved1 : 19;
- };
- uint64_t raw;
- } __packed Spurious;
+ typedef union
+ {
+ struct
+ {
+ /** @brief Spurious Vector */
+ uint64_t Vector : 8;
+ /** @brief Enable or disable APIC software */
+ uint64_t Software : 1;
+ /** @brief Focus Processor Checking */
+ uint64_t FocusProcessorChecking : 1;
+ /** @brief Reserved */
+ uint64_t Reserved : 2;
+ /** @brief Disable EOI Broadcast */
+ uint64_t DisableEOIBroadcast : 1;
+ /** @brief Reserved */
+ uint64_t Reserved1 : 19;
+ };
+ uint64_t raw;
+ } __packed Spurious;
- typedef union
- {
- struct
- {
- /** @brief Interrupt Vector */
- uint64_t Vector : 8;
- /** @brief Delivery Mode */
- uint64_t DeliveryMode : 3;
- /** @brief Destination Mode
- *
- * 0: Physical
- * 1: Logical
- */
- uint64_t DestinationMode : 1;
- /** @brief Delivery Status
- *
- * @note Reserved when in x2APIC mode
- */
- uint64_t DeliveryStatus : 1;
- /** @brief Reserved */
- uint64_t Reserved0 : 1;
- /** @brief Level
- *
- * 0: Deassert
- * 1: Assert
- */
- uint64_t Level : 1;
- /** @brief Trigger Mode
- *
- * 0: Edge
- * 1: Level
- */
- uint64_t TriggerMode : 1;
- /** @brief Reserved */
- uint64_t Reserved1 : 2;
- /** @brief Destination Shorthand
- *
- * 0: No shorthand
- * 1: Self
- * 2: All including self
- * 3: All excluding self
- */
- uint64_t DestinationShorthand : 2;
- /** @brief Reserved */
- uint64_t Reserved2 : 12;
- };
- uint64_t raw;
- } __packed InterruptCommandRegisterLow;
+ typedef union
+ {
+ struct
+ {
+ /** @brief Interrupt Vector */
+ uint64_t Vector : 8;
+ /** @brief Delivery Mode */
+ uint64_t DeliveryMode : 3;
+ /** @brief Destination Mode
+ *
+ * 0: Physical
+ * 1: Logical
+ */
+ uint64_t DestinationMode : 1;
+ /** @brief Delivery Status
+ *
+ * @note Reserved when in x2APIC mode
+ */
+ uint64_t DeliveryStatus : 1;
+ /** @brief Reserved */
+ uint64_t Reserved0 : 1;
+ /** @brief Level
+ *
+ * 0: Deassert
+ * 1: Assert
+ */
+ uint64_t Level : 1;
+ /** @brief Trigger Mode
+ *
+ * 0: Edge
+ * 1: Level
+ */
+ uint64_t TriggerMode : 1;
+ /** @brief Reserved */
+ uint64_t Reserved1 : 2;
+ /** @brief Destination Shorthand
+ *
+ * 0: No shorthand
+ * 1: Self
+ * 2: All including self
+ * 3: All excluding self
+ */
+ uint64_t DestinationShorthand : 2;
+ /** @brief Reserved */
+ uint64_t Reserved2 : 12;
+ };
+ uint64_t raw;
+ } __packed InterruptCommandRegisterLow;
- typedef union
- {
- struct
- {
- /** @brief Reserved */
- uint64_t Reserved0 : 24;
- /** @brief Destination */
- uint64_t Destination : 8;
- };
- uint64_t raw;
- } __packed InterruptCommandRegisterHigh;
+ typedef union
+ {
+ struct
+ {
+ /** @brief Reserved */
+ uint64_t Reserved0 : 24;
+ /** @brief Destination */
+ uint64_t Destination : 8;
+ };
+ uint64_t raw;
+ } __packed InterruptCommandRegisterHigh;
- typedef union
- {
- struct
- {
- /** @brief Interrupt Vector */
- uint64_t Vector : 8;
- /** @brief Delivery Mode */
- uint64_t DeliveryMode : 3;
- /** @brief Destination Mode
- *
- * 0: Physical
- * 1: Logical
- */
- uint64_t DestinationMode : 1;
- /** @brief Delivery Status */
- uint64_t DeliveryStatus : 1;
- /** @brief Interrupt Input Pin Polarity
- *
- * 0: Active High
- * 1: Active Low
- */
- uint64_t Polarity : 1;
- /** @brief Remote IRR */
- uint64_t RemoteIRR : 1;
- /** @brief Trigger Mode
- *
- * 0: Edge
- * 1: Level
- */
- uint64_t TriggerMode : 1;
- /** @brief Mask */
- uint64_t Mask : 1;
- /** @brief Reserved */
- uint64_t Reserved0 : 15;
- /** @brief Reserved */
- uint64_t Reserved1 : 24;
- /** @brief Destination */
- uint64_t DestinationID : 8;
- };
- struct
- {
- uint64_t Low;
- uint64_t High;
- } split;
- uint64_t raw;
- } __packed IOAPICRedirectEntry;
+ typedef union
+ {
+ struct
+ {
+ /** @brief Interrupt Vector */
+ uint64_t Vector : 8;
+ /** @brief Delivery Mode */
+ uint64_t DeliveryMode : 3;
+ /** @brief Destination Mode
+ *
+ * 0: Physical
+ * 1: Logical
+ */
+ uint64_t DestinationMode : 1;
+ /** @brief Delivery Status */
+ uint64_t DeliveryStatus : 1;
+ /** @brief Interrupt Input Pin Polarity
+ *
+ * 0: Active High
+ * 1: Active Low
+ */
+ uint64_t Polarity : 1;
+ /** @brief Remote IRR */
+ uint64_t RemoteIRR : 1;
+ /** @brief Trigger Mode
+ *
+ * 0: Edge
+ * 1: Level
+ */
+ uint64_t TriggerMode : 1;
+ /** @brief Mask */
+ uint64_t Mask : 1;
+ /** @brief Reserved */
+ uint64_t Reserved0 : 15;
+ /** @brief Reserved */
+ uint64_t Reserved1 : 24;
+ /** @brief Destination */
+ uint64_t DestinationID : 8;
+ };
+ struct
+ {
+ uint64_t Low;
+ uint64_t High;
+ } split;
+ uint64_t raw;
+ } __packed IOAPICRedirectEntry;
- typedef union
- {
- struct
- {
- uint64_t Version : 8;
- uint64_t Reserved : 8;
- uint64_t MaximumRedirectionEntry : 8;
- uint64_t Reserved2 : 8;
- };
- uint64_t raw;
- } __packed IOAPICVersion;
+ typedef union
+ {
+ struct
+ {
+ uint64_t Version : 8;
+ uint64_t Reserved : 8;
+ uint64_t MaximumRedirectionEntry : 8;
+ uint64_t Reserved2 : 8;
+ };
+ uint64_t raw;
+ } __packed IOAPICVersion;
- class APIC
- {
- private:
- bool x2APICSupported = false;
- uint64_t APICBaseAddress = 0;
+ class APIC
+ {
+ private:
+ bool x2APICSupported = false;
+ uint64_t APICBaseAddress = 0;
- public:
- uint32_t Read(uint32_t Register);
- void Write(uint32_t Register, uint32_t Value);
- void IOWrite(uint64_t Base, uint32_t Register, uint32_t Value);
- uint32_t IORead(uint64_t Base, uint32_t Register);
- void EOI();
- void RedirectIRQs(int CPU = 0);
- void WaitForIPI();
- void IPI(uint8_t CPU, InterruptCommandRegisterLow icr);
- void SendInitIPI(uint8_t CPU);
- void SendStartupIPI(uint8_t CPU, uint64_t StartupAddress);
- uint32_t IOGetMaxRedirect(uint32_t APICID);
- void RawRedirectIRQ(uint8_t Vector, uint32_t GSI, uint16_t Flags, int CPU, int Status);
- void RedirectIRQ(int CPU, uint16_t IRQ, int Status);
- APIC(int Core);
- ~APIC();
- };
+ public:
+ uint32_t Read(uint32_t Register);
+ void Write(uint32_t Register, uint32_t Value);
+ void IOWrite(uint64_t Base, uint32_t Register, uint32_t Value);
+ uint32_t IORead(uint64_t Base, uint32_t Register);
+ void EOI();
+ void RedirectIRQs(int CPU = 0);
+ void WaitForIPI();
+ void IPI(uint8_t CPU, InterruptCommandRegisterLow icr);
+ void SendInitIPI(uint8_t CPU);
+ void SendStartupIPI(uint8_t CPU, uint64_t StartupAddress);
+ uint32_t IOGetMaxRedirect(uint32_t APICID);
+ void RawRedirectIRQ(uint16_t Vector, uint32_t GSI, uint16_t Flags, int CPU, int Status);
+ void RedirectIRQ(int CPU, uint16_t IRQ, int Status);
+ APIC(int Core);
+ ~APIC();
+ };
- class Timer : public Interrupts::Handler
- {
- private:
- APIC *lapic;
- uint64_t Ticks = 0;
- void OnInterruptReceived(CPU::x32::TrapFrame *Frame);
+ class Timer : public Interrupts::Handler
+ {
+ private:
+ APIC *lapic;
+ uint64_t Ticks = 0;
+ void OnInterruptReceived(CPU::x32::TrapFrame *Frame);
- public:
- uint64_t GetTicks() { return Ticks; }
- void OneShot(uint32_t Vector, uint64_t Miliseconds);
- Timer(APIC *apic);
- ~Timer();
- };
+ public:
+ uint64_t GetTicks() { return Ticks; }
+ void OneShot(uint32_t Vector, uint64_t Miliseconds);
+ Timer(APIC *apic);
+ ~Timer();
+ };
}
#endif // !__FENNIX_KERNEL_APIC_H__
diff --git a/Architecture/i386/cpu/idt.hpp b/Architecture/i386/cpu/idt.hpp
index c4bf5f0e..e6999fd8 100644
--- a/Architecture/i386/cpu/idt.hpp
+++ b/Architecture/i386/cpu/idt.hpp
@@ -22,49 +22,49 @@
namespace InterruptDescriptorTable
{
- typedef enum _InterruptGateType
- {
- TASK = 0b101,
- INT_16BIT = 0b110,
- TRAP_16BIT = 0b111,
- INT_32BIT = 0b1110,
- TRAP_32BIT = 0b1111,
- } InterruptGateType;
+ typedef enum _InterruptGateType
+ {
+ TASK = 0b101,
+ INT_16BIT = 0b110,
+ TRAP_16BIT = 0b111,
+ INT_32BIT = 0b1110,
+ TRAP_32BIT = 0b1111,
+ } InterruptGateType;
- typedef enum _InterruptRingType
- {
- RING0 = 0b0,
- RING1 = 0b1,
- RING2 = 0b10,
- RING3 = 0b11,
- } InterruptRingType;
+ typedef enum _InterruptRingType
+ {
+ RING0 = 0b0,
+ RING1 = 0b1,
+ RING2 = 0b10,
+ RING3 = 0b11,
+ } InterruptRingType;
- typedef struct _InterruptDescriptorTableEntry
- {
- uint32_t LowOffset : 16;
- uint32_t SegmentSelector : 16;
- uint32_t Reserved0 : 5;
- uint32_t Flags : 4;
- uint32_t Reserved1 : 1;
- uint32_t Ring : 2;
- uint32_t Present : 1;
- uint32_t HighOffset : 16;
- } __packed InterruptDescriptorTableEntry;
+ typedef struct _InterruptDescriptorTableEntry
+ {
+ uint32_t LowOffset : 16;
+ uint32_t SegmentSelector : 16;
+ uint32_t Reserved0 : 5;
+ uint32_t Flags : 4;
+ uint32_t Reserved1 : 1;
+ uint32_t Ring : 2;
+ uint32_t Present : 1;
+ uint32_t HighOffset : 16;
+ } __packed InterruptDescriptorTableEntry;
- typedef struct _InterruptDescriptorTableDescriptor
- {
- uint16_t Length;
- InterruptDescriptorTableEntry *Entries;
- } __packed InterruptDescriptorTableDescriptor;
+ typedef struct _InterruptDescriptorTableDescriptor
+ {
+ uint16_t Length;
+ InterruptDescriptorTableEntry *Entries;
+ } __packed InterruptDescriptorTableDescriptor;
- void SetEntry(uint8_t Index,
- void (*Base)(),
- InterruptGateType Gate,
- InterruptRingType Ring,
- bool Present,
- uint16_t SegmentSelector);
+ void SetEntry(uint8_t Index,
+ void (*Base)(),
+ InterruptGateType Gate,
+ InterruptRingType Ring,
+ bool Present,
+ uint16_t SegmentSelector);
- void Init(int Core);
+ void Init(int Core);
}
#endif // !__FENNIX_KERNEL_IDT_H__
diff --git a/Core/Driver/DriverAPI.cpp b/Core/Driver/DriverAPI.cpp
index 901707ae..281391f9 100644
--- a/Core/Driver/DriverAPI.cpp
+++ b/Core/Driver/DriverAPI.cpp
@@ -35,74 +35,92 @@
NewLock(DriverDisplayPrintLock);
-void DriverDebugPrint(char *String, unsigned long DriverUID) { trace("[%ld] %s", DriverUID, String); }
+void DriverDebugPrint(char *String, __UINT64_TYPE__ DriverUID)
+{
+ trace("[%ld] %s", DriverUID, String);
+}
void DriverDisplayPrint(char *String)
{
SmartLock(DriverDisplayPrintLock);
- for (unsigned long i = 0; i < strlen(String); i++)
+ for (__UINT64_TYPE__ i = 0; i < strlen(String); i++)
Display->Print(String[i], 0, true);
}
-void *RequestPage(unsigned long Size)
+void *RequestPage(__UINT64_TYPE__ Size)
{
- void *ret = KernelAllocator.RequestPages(Size + 1);
- drvdbg("Allocated %ld pages (%#lx-%#lx)", Size, (unsigned long)ret, (unsigned long)ret + FROM_PAGES(Size));
+ void *ret = KernelAllocator.RequestPages(size_t(Size + 1));
+ drvdbg("Allocated %ld pages (%#lx-%#lx)",
+ Size, (__UINT64_TYPE__)ret,
+ (__UINT64_TYPE__)ret + FROM_PAGES(Size));
return ret;
}
-void FreePage(void *Page, unsigned long Size)
+void FreePage(void *Page, __UINT64_TYPE__ Size)
{
- drvdbg("Freeing %ld pages (%#lx-%#lx)", Size, (unsigned long)Page, (unsigned long)Page + FROM_PAGES(Size));
- KernelAllocator.FreePages(Page, Size + 1);
+ drvdbg("Freeing %ld pages (%#lx-%#lx)",
+ Size, (__UINT64_TYPE__)Page,
+ (__UINT64_TYPE__)Page + FROM_PAGES(Size));
+ KernelAllocator.FreePages(Page, size_t(Size + 1));
}
-void MapMemory(void *VirtualAddress, void *PhysicalAddress, unsigned long Flags)
+void MapMemory(void *VirtualAddress, void *PhysicalAddress, __UINT64_TYPE__ Flags)
{
SmartLock(DriverDisplayPrintLock);
- drvdbg("Mapping %#lx to %#lx with flags %#lx...", (unsigned long)VirtualAddress, (unsigned long)PhysicalAddress, Flags);
+ drvdbg("Mapping %#lx to %#lx with flags %#lx...",
+ (__UINT64_TYPE__)VirtualAddress,
+ (__UINT64_TYPE__)PhysicalAddress, Flags);
Memory::Virtual(KernelPageTable).Map(VirtualAddress, PhysicalAddress, Flags);
}
void UnmapMemory(void *VirtualAddress)
{
SmartLock(DriverDisplayPrintLock);
- drvdbg("Unmapping %#lx...", (unsigned long)VirtualAddress);
+ drvdbg("Unmapping %#lx...",
+ (__UINT64_TYPE__)VirtualAddress);
Memory::Virtual(KernelPageTable).Unmap(VirtualAddress);
}
-void *Drivermemcpy(void *Destination, void *Source, unsigned long Size)
+void *Drivermemcpy(void *Destination, void *Source, __UINT64_TYPE__ Size)
{
SmartLock(DriverDisplayPrintLock);
drvdbg("Copying %ld bytes from %#lx-%#lx to %#lx-%#lx...", Size,
- (unsigned long)Source, (unsigned long)Source + Size,
- (unsigned long)Destination, (unsigned long)Destination + Size);
- return memcpy(Destination, Source, Size);
+ (__UINT64_TYPE__)Source, (__UINT64_TYPE__)Source + Size,
+ (__UINT64_TYPE__)Destination, (__UINT64_TYPE__)Destination + Size);
+ return memcpy(Destination, Source, size_t(Size));
}
-void *Drivermemset(void *Destination, int Value, unsigned long Size)
+void *Drivermemset(void *Destination, int Value, __UINT64_TYPE__ Size)
{
SmartLock(DriverDisplayPrintLock);
drvdbg("Setting value %#x at %#lx-%#lx (%ld bytes)...", Value,
- (unsigned long)Destination, (unsigned long)Destination + Size,
- Size);
- return memset(Destination, Value, Size);
+ (__UINT64_TYPE__)Destination,
+ (__UINT64_TYPE__)Destination + Size, Size);
+ return memset(Destination, Value, size_t(Size));
}
-void DriverNetSend(unsigned int DriverID, unsigned char *Data, unsigned short Size)
+void DriverNetSend(__UINT32_TYPE__ DriverID,
+ __UINT8_TYPE__ *Data,
+ __UINT16_TYPE__ Size)
{
// This is useless I guess...
if (NIManager)
NIManager->DrvSend(DriverID, Data, Size);
}
-void DriverNetReceive(unsigned int DriverID, unsigned char *Data, unsigned short Size)
+void DriverNetReceive(__UINT32_TYPE__ DriverID,
+ __UINT8_TYPE__ *Data,
+ __UINT16_TYPE__ Size)
{
if (NIManager)
NIManager->DrvReceive(DriverID, Data, Size);
}
-void DriverAHCIDiskRead(unsigned int DriverID, unsigned long Sector, unsigned char *Data, unsigned int SectorCount, unsigned char Port)
+void DriverAHCIDiskRead(__UINT32_TYPE__ DriverID,
+ __UINT64_TYPE__ Sector,
+ __UINT8_TYPE__ *Data,
+ __UINT32_TYPE__ SectorCount,
+ __UINT8_TYPE__ Port)
{
DumpData("DriverDiskRead", Data, SectorCount * 512);
UNUSED(DriverID);
@@ -110,41 +128,50 @@ void DriverAHCIDiskRead(unsigned int DriverID, unsigned long Sector, unsigned ch
UNUSED(Port);
}
-void DriverAHCIDiskWrite(unsigned int DriverID, unsigned long Sector, unsigned char *Data, unsigned int SectorCount, unsigned char Port)
+void DriverAHCIDiskWrite(__UINT32_TYPE__ DriverID,
+ __UINT64_TYPE__ Sector,
+ __UINT8_TYPE__ *Data,
+ __UINT32_TYPE__ SectorCount,
+ __UINT8_TYPE__ Port)
{
- DumpData("DriverDiskWrite", Data, SectorCount * 512);
+ DumpData("DriverDiskWrite",
+ Data, SectorCount * 512);
UNUSED(DriverID);
UNUSED(Sector);
UNUSED(Port);
}
-char *DriverPCIGetDeviceName(unsigned int VendorID, unsigned int DeviceID)
+char *DriverPCIGetDeviceName(__UINT32_TYPE__ VendorID,
+ __UINT32_TYPE__ DeviceID)
{
UNUSED(VendorID);
UNUSED(DeviceID);
return (char *)"Unknown";
}
-unsigned int DriverGetWidth()
+__UINT32_TYPE__ DriverGetWidth()
{
- /* TODO: We won't rely only on display buffers, what about graphics drivers and changing resolutions? */
+ /* TODO: We won't rely only on display buffers,
+ what about graphics drivers and changing resolutions? */
return Display->GetBuffer(0)->Width;
}
-unsigned int DriverGetHeight()
+__UINT32_TYPE__ DriverGetHeight()
{
- /* TODO: We won't rely only on display buffers, what about graphics drivers and changing resolutions? */
+ /* TODO: We won't rely only on display buffers,
+ what about graphics drivers and changing resolutions? */
return Display->GetBuffer(0)->Height;
}
-void DriverSleep(unsigned long Milliseconds)
+void DriverSleep(__UINT64_TYPE__ Milliseconds)
{
SmartLock(DriverDisplayPrintLock);
drvdbg("Sleeping for %ld milliseconds...", Milliseconds);
if (TaskManager)
TaskManager->Sleep(Milliseconds);
else
- TimeManager->Sleep(Milliseconds, Time::Units::Milliseconds);
+ TimeManager->Sleep(size_t(Milliseconds),
+ Time::Units::Milliseconds);
}
int Driversprintf(char *Buffer, const char *Format, ...)
diff --git a/Core/InterruptsManager.cpp b/Core/InterruptsManager.cpp
index 77467f1c..d2956b85 100644
--- a/Core/InterruptsManager.cpp
+++ b/Core/InterruptsManager.cpp
@@ -30,6 +30,8 @@
#elif defined(a32)
#include "../Architecture/i386/cpu/gdt.hpp"
#include "../Architecture/i386/cpu/idt.hpp"
+#include "../Architecture/i386/acpi.hpp"
+#include "../Architecture/i386/cpu/apic.hpp"
#elif defined(aa64)
#endif
@@ -47,11 +49,9 @@ namespace Interrupts
};
std::vector RegisteredEvents;
-#if defined(a64)
+#if defined(a86)
/* APIC::APIC */ void *apic[MAX_CPU];
/* APIC::Timer */ void *apicTimer[MAX_CPU];
-#elif defined(a32)
- /* APIC::APIC */ void *apic[MAX_CPU];
#elif defined(aa64)
#endif
void *InterruptFrames[INT_FRAMES_MAX];
@@ -89,10 +89,12 @@ namespace Interrupts
CoreData->Stack = (uintptr_t)KernelAllocator.RequestPages(TO_PAGES(STACK_SIZE + 1)) + STACK_SIZE;
if (CoreData->Checksum != CPU_DATA_CHECKSUM)
{
- KPrint("CPU %d checksum mismatch! %x != %x", Core, CoreData->Checksum, CPU_DATA_CHECKSUM);
+ KPrint("CPU %d checksum mismatch! %x != %x",
+ Core, CoreData->Checksum, CPU_DATA_CHECKSUM);
CPU::Stop();
}
- debug("Stack for core %d is %#lx (Address: %#lx)", Core, CoreData->Stack, CoreData->Stack - STACK_SIZE);
+ debug("Stack for core %d is %#lx (Address: %#lx)",
+ Core, CoreData->Stack, CoreData->Stack - STACK_SIZE);
#elif defined(aa64)
warn("aarch64 is not supported yet");
#endif
@@ -100,7 +102,7 @@ namespace Interrupts
void Enable(int Core)
{
-#if defined(a64)
+#if defined(a86)
if (((ACPI::MADT *)PowerManager->GetMADT())->LAPICAddress != nullptr)
{
// TODO: This function is called by SMP too. Do not initialize timers that doesn't support multiple cores.
@@ -113,8 +115,6 @@ namespace Interrupts
error("LAPIC not found");
// TODO: PIC
}
-#elif defined(a32)
- warn("i386 is not supported yet");
#elif defined(aa64)
warn("aarch64 is not supported yet");
#endif
@@ -123,15 +123,13 @@ namespace Interrupts
void InitializeTimer(int Core)
{
// TODO: This function is called by SMP too. Do not initialize timers that doesn't support multiple cores.
-#if defined(a64)
+#if defined(a86)
if (apic[Core] != nullptr)
apicTimer[Core] = new APIC::Timer((APIC::APIC *)apic[Core]);
else
{
fixme("apic not found");
}
-#elif defined(a32)
- warn("i386 is not supported yet");
#elif defined(aa64)
warn("aarch64 is not supported yet");
#endif
diff --git a/Core/PeripheralComponentInterconnect.cpp b/Core/PeripheralComponentInterconnect.cpp
index 7633baf3..d5f37c03 100644
--- a/Core/PeripheralComponentInterconnect.cpp
+++ b/Core/PeripheralComponentInterconnect.cpp
@@ -21,6 +21,7 @@
#if defined(a64)
#include "../Architecture/amd64/acpi.hpp"
#elif defined(a32)
+#include "../Architecture/i386/acpi.hpp"
#elif defined(aa64)
#endif
@@ -883,10 +884,10 @@ namespace PCI
}
}
- void PCI::EnumerateFunction(uintptr_t DeviceAddress, uintptr_t Function)
+ void PCI::EnumerateFunction(uint64_t DeviceAddress, uintptr_t Function)
{
uintptr_t Offset = Function << 12;
- uintptr_t FunctionAddress = DeviceAddress + Offset;
+ uint64_t FunctionAddress = DeviceAddress + Offset;
Memory::Virtual(KernelPageTable).Map((void *)FunctionAddress, (void *)FunctionAddress, Memory::PTFlag::RW);
PCIDeviceHeader *PCIDeviceHdr = (PCIDeviceHeader *)FunctionAddress;
if (PCIDeviceHdr->DeviceID == 0)
@@ -899,10 +900,10 @@ namespace PCI
#endif
}
- void PCI::EnumerateDevice(uintptr_t BusAddress, uintptr_t Device)
+ void PCI::EnumerateDevice(uint64_t BusAddress, uintptr_t Device)
{
uintptr_t Offset = Device << 15;
- uintptr_t DeviceAddress = BusAddress + Offset;
+ uint64_t DeviceAddress = BusAddress + Offset;
Memory::Virtual(KernelPageTable).Map((void *)DeviceAddress, (void *)DeviceAddress, Memory::PTFlag::RW);
PCIDeviceHeader *PCIDeviceHdr = (PCIDeviceHeader *)DeviceAddress;
if (PCIDeviceHdr->DeviceID == 0)
@@ -913,10 +914,10 @@ namespace PCI
EnumerateFunction(DeviceAddress, Function);
}
- void PCI::EnumerateBus(uintptr_t BaseAddress, uintptr_t Bus)
+ void PCI::EnumerateBus(uint64_t BaseAddress, uintptr_t Bus)
{
uintptr_t Offset = Bus << 20;
- uintptr_t BusAddress = BaseAddress + Offset;
+ uint64_t BusAddress = BaseAddress + Offset;
Memory::Virtual(KernelPageTable).Map((void *)BusAddress, (void *)BusAddress, Memory::PTFlag::RW);
PCIDeviceHeader *PCIDeviceHdr = (PCIDeviceHeader *)BusAddress;
if (Bus != 0) // TODO: VirtualBox workaround (UNTESTED ON REAL HARDWARE!)
@@ -955,20 +956,18 @@ namespace PCI
PCI::PCI()
{
-#if defined(a64)
+#if defined(a86)
int Entries = s_cst(int, ((((ACPI::ACPI *)PowerManager->GetACPI())->MCFG->Header.Length) - sizeof(ACPI::ACPI::MCFGHeader)) / sizeof(DeviceConfig));
Memory::Virtual vmm = Memory::Virtual(KernelPageTable);
for (int t = 0; t < Entries; t++)
{
DeviceConfig *NewDeviceConfig = (DeviceConfig *)((uintptr_t)((ACPI::ACPI *)PowerManager->GetACPI())->MCFG + sizeof(ACPI::ACPI::MCFGHeader) + (sizeof(DeviceConfig) * t));
vmm.Map((void *)NewDeviceConfig->BaseAddress, (void *)NewDeviceConfig->BaseAddress, Memory::PTFlag::RW);
- debug("PCI Entry %d Address:%#llx BUS:%#llx-%#llx", t, NewDeviceConfig->BaseAddress,
+ debug("PCI Entry %d Address:%p BUS:%#x-%#x", t, NewDeviceConfig->BaseAddress,
NewDeviceConfig->StartBus, NewDeviceConfig->EndBus);
for (uintptr_t Bus = NewDeviceConfig->StartBus; Bus < NewDeviceConfig->EndBus; Bus++)
EnumerateBus(NewDeviceConfig->BaseAddress, Bus);
}
-#elif defined(a32)
- error("PCI not implemented on i386");
#elif defined(aa64)
error("PCI not implemented on aarch64");
#endif
diff --git a/Core/Power.cpp b/Core/Power.cpp
index 491d769a..7c631ae1 100644
--- a/Core/Power.cpp
+++ b/Core/Power.cpp
@@ -19,13 +19,16 @@
#include
#include
+#include
#include "../kernel.h"
#if defined(a64)
-#include
-
#include "../Architecture/amd64/acpi.hpp"
+#elif defined(a32)
+#include "../Architecture/i386/acpi.hpp"
+#elif defined(aa64)
+#endif
namespace Power
{
@@ -86,45 +89,3 @@ namespace Power
trace("Power manager initialized");
}
}
-
-#elif defined(a32)
-
-namespace Power
-{
- void Power::Reboot()
- {
- warn("Reboot not implemented for i386");
- }
-
- void Power::Shutdown()
- {
- warn("Shutdown not implemented for i386");
- }
-
- Power::Power()
- {
- error("Power not implemented for i386");
- }
-}
-
-#elif defined(aa64)
-
-namespace Power
-{
- void Power::Reboot()
- {
- warn("Reboot not implemented for aarch64");
- }
-
- void Power::Shutdown()
- {
- warn("Shutdown not implemented for aarch64");
- }
-
- Power::Power()
- {
- error("Power not implemented for aarch64");
- }
-}
-
-#endif
diff --git a/Core/Symbols.cpp b/Core/Symbols.cpp
index 5586db38..53c27c3b 100644
--- a/Core/Symbols.cpp
+++ b/Core/Symbols.cpp
@@ -53,10 +53,6 @@ namespace SymbolResolver
__unused uint64_t Shndx,
uintptr_t Sections)
{
-#ifdef a32
- fixme("Function not working on 32-bit");
- return;
-#endif
char *sections = reinterpret_cast(Sections);
Elf_Sym *Symbols = nullptr;
diff --git a/DAPI.hpp b/DAPI.hpp
index 9ebc8e7e..dc818ebe 100644
--- a/DAPI.hpp
+++ b/DAPI.hpp
@@ -84,32 +84,32 @@ struct KernelAPI
struct KAPIInfo
{
- unsigned long Offset;
- unsigned int DriverUID;
+ __UINT64_TYPE__ Offset;
+ __UINT32_TYPE__ DriverUID;
char KernelDebug;
} Info;
struct KAPIMemory
{
- unsigned long PageSize;
- void *(*RequestPage)(unsigned long Size);
- void (*FreePage)(void *Page, unsigned long Size);
- void (*Map)(void *VirtualAddress, void *PhysicalAddress, unsigned long Flags);
+ __UINT64_TYPE__ PageSize;
+ void *(*RequestPage)(__UINT64_TYPE__ Size);
+ void (*FreePage)(void *Page, __UINT64_TYPE__ Size);
+ void (*Map)(void *VirtualAddress, void *PhysicalAddress, __UINT64_TYPE__ Flags);
void (*Unmap)(void *VirtualAddress);
} Memory;
struct KAPIPCI
{
- char *(*GetDeviceName)(unsigned int VendorID, unsigned int DeviceID);
+ char *(*GetDeviceName)(__UINT32_TYPE__ VendorID, __UINT32_TYPE__ DeviceID);
} PCI;
struct KAPIUtilities
{
- void (*DebugPrint)(char *String, unsigned long DriverUID);
+ void (*DebugPrint)(char *String, __UINT64_TYPE__ DriverUID);
void (*DisplayPrint)(char *Value);
- void *(*memcpy)(void *Destination, void *Source, unsigned long Size);
- void *(*memset)(void *Destination, int Value, unsigned long Size);
- void (*Sleep)(unsigned long Milliseconds);
+ void *(*memcpy)(void *Destination, void *Source, __UINT64_TYPE__ Size);
+ void *(*memset)(void *Destination, int Value, __UINT64_TYPE__ Size);
+ void (*Sleep)(__UINT64_TYPE__ Milliseconds);
int (*sprintf)(char *Buffer, const char *Format, ...);
} Util;
@@ -118,8 +118,8 @@ struct KernelAPI
/** Connects to the network manager */
struct
{
- void (*SendPacket)(unsigned int DriverID, unsigned char *Data, unsigned short Size);
- void (*ReceivePacket)(unsigned int DriverID, unsigned char *Data, unsigned short Size);
+ void (*SendPacket)(__UINT32_TYPE__ DriverID, __UINT8_TYPE__ *Data, __UINT16_TYPE__ Size);
+ void (*ReceivePacket)(__UINT32_TYPE__ DriverID, __UINT8_TYPE__ *Data, __UINT16_TYPE__ Size);
} Network;
/** Connects to the disk manager */
@@ -127,16 +127,16 @@ struct KernelAPI
{
struct
{
- void (*ReadSector)(unsigned int DriverID, unsigned long Sector, unsigned char *Data, unsigned int SectorCount, unsigned char Port);
- void (*WriteSector)(unsigned int DriverID, unsigned long Sector, unsigned char *Data, unsigned int SectorCount, unsigned char Port);
+ void (*ReadSector)(__UINT32_TYPE__ DriverID, __UINT64_TYPE__ Sector, __UINT8_TYPE__ *Data, __UINT32_TYPE__ SectorCount, __UINT8_TYPE__ Port);
+ void (*WriteSector)(__UINT32_TYPE__ DriverID, __UINT64_TYPE__ Sector, __UINT8_TYPE__ *Data, __UINT32_TYPE__ SectorCount, __UINT8_TYPE__ Port);
} AHCI;
} Disk;
} Command;
struct KAPIDisplay
{
- unsigned int (*GetWidth)(void);
- unsigned int (*GetHeight)(void);
+ __UINT32_TYPE__ (*GetWidth)(void);
+ __UINT32_TYPE__ (*GetHeight)(void);
/* TODO: Add more */
} Display;
} __attribute__((packed));
@@ -230,21 +230,21 @@ union KernelCallback
{
CallbackReason Reason;
void *RawPtr;
- unsigned long RawData;
+ __UINT64_TYPE__ RawData;
/** When the kernel wants to send a packet. */
struct
{
struct
{
- unsigned char *Data;
- unsigned long Length;
+ __UINT8_TYPE__ *Data;
+ __UINT64_TYPE__ Length;
} Send;
struct
{
char Name[128];
- unsigned long MAC;
+ __UINT64_TYPE__ MAC;
} Fetch;
} NetworkCallback;
@@ -253,16 +253,16 @@ union KernelCallback
{
struct
{
- unsigned long Sector;
- unsigned long SectorCount;
- unsigned char Port;
- unsigned char *Buffer;
+ __UINT64_TYPE__ Sector;
+ __UINT64_TYPE__ SectorCount;
+ __UINT8_TYPE__ Port;
+ __UINT8_TYPE__ *Buffer;
bool Write;
} RW;
struct
{
- unsigned char Ports;
+ __UINT8_TYPE__ Ports;
int BytesPerSector;
} Fetch;
} DiskCallback;
@@ -272,9 +272,9 @@ union KernelCallback
{
struct
{
- unsigned long X;
- unsigned long Y;
- unsigned long Z;
+ __UINT64_TYPE__ X;
+ __UINT64_TYPE__ Y;
+ __UINT64_TYPE__ Z;
struct
{
bool Left;
@@ -287,10 +287,10 @@ union KernelCallback
{
/**
* The key.
- *
+ *
* @note This is a scancode, not a character.
*/
- unsigned char Key;
+ __UINT8_TYPE__ Key;
} Keyboard;
} InputCallback;
@@ -308,7 +308,7 @@ union KernelCallback
*
* 0 - 100
*/
- unsigned char Volume;
+ __UINT8_TYPE__ Volume;
/**
* Adjust the encoding.
@@ -349,7 +349,7 @@ union KernelCallback
*
* ... - More
*/
- unsigned short Encoding;
+ __UINT16_TYPE__ Encoding;
/**
* Adjust the sample rate.
@@ -364,7 +364,7 @@ union KernelCallback
* 7 - 88200 Hz
* 8 - 96000 Hz
*/
- unsigned char SampleRate;
+ __UINT8_TYPE__ SampleRate;
/**
* Adjust the channels.
@@ -372,30 +372,30 @@ union KernelCallback
* 0 - Mono
* 1 - Stereo
*/
- unsigned char Channels;
+ __UINT8_TYPE__ Channels;
} Adjust;
struct
{
- unsigned char *Data;
- unsigned long Length;
+ __UINT8_TYPE__ *Data;
+ __UINT64_TYPE__ Length;
} Send;
struct
{
- unsigned char Volume;
- unsigned short Encoding;
- unsigned char SampleRate;
- unsigned char Channels;
+ __UINT8_TYPE__ Volume;
+ __UINT16_TYPE__ Encoding;
+ __UINT8_TYPE__ SampleRate;
+ __UINT8_TYPE__ Channels;
} Fetch;
} AudioCallback;
struct
{
- unsigned char Vector;
+ __UINT8_TYPE__ Vector;
} InterruptInfo;
};
- unsigned long raw;
+ __UINT64_TYPE__ raw;
} __attribute__((packed));
union CPURegisters
@@ -403,51 +403,51 @@ union CPURegisters
struct
{
#if defined(__x86_64__) || defined(__amd64__)
- unsigned long r15;
- unsigned long r14;
- unsigned long r13;
- unsigned long r12;
- unsigned long r11;
- unsigned long r10;
- unsigned long r9;
- unsigned long r8;
+ __UINT64_TYPE__ r15;
+ __UINT64_TYPE__ r14;
+ __UINT64_TYPE__ r13;
+ __UINT64_TYPE__ r12;
+ __UINT64_TYPE__ r11;
+ __UINT64_TYPE__ r10;
+ __UINT64_TYPE__ r9;
+ __UINT64_TYPE__ r8;
- unsigned long rbp;
- unsigned long rdi;
- unsigned long rsi;
- unsigned long rdx;
- unsigned long rcx;
- unsigned long rbx;
- unsigned long rax;
+ __UINT64_TYPE__ rbp;
+ __UINT64_TYPE__ rdi;
+ __UINT64_TYPE__ rsi;
+ __UINT64_TYPE__ rdx;
+ __UINT64_TYPE__ rcx;
+ __UINT64_TYPE__ rbx;
+ __UINT64_TYPE__ rax;
- unsigned long InterruptNumber;
- unsigned long ErrorCode;
- unsigned long rip;
- unsigned long cs;
- unsigned long rflags;
- unsigned long rsp;
- unsigned long ss;
+ __UINT64_TYPE__ InterruptNumber;
+ __UINT64_TYPE__ ErrorCode;
+ __UINT64_TYPE__ rip;
+ __UINT64_TYPE__ cs;
+ __UINT64_TYPE__ rflags;
+ __UINT64_TYPE__ rsp;
+ __UINT64_TYPE__ ss;
#elif defined(__i386__)
- unsigned int ebp;
- unsigned int edi;
- unsigned int esi;
- unsigned int edx;
- unsigned int ecx;
- unsigned int ebx;
- unsigned int eax;
+ __UINT32_TYPE__ ebp;
+ __UINT32_TYPE__ edi;
+ __UINT32_TYPE__ esi;
+ __UINT32_TYPE__ edx;
+ __UINT32_TYPE__ ecx;
+ __UINT32_TYPE__ ebx;
+ __UINT32_TYPE__ eax;
- unsigned int InterruptNumber;
- unsigned int ErrorCode;
- unsigned int eip;
- unsigned int cs;
- unsigned int eflags;
- unsigned int esp;
- unsigned int ss;
+ __UINT32_TYPE__ InterruptNumber;
+ __UINT32_TYPE__ ErrorCode;
+ __UINT32_TYPE__ eip;
+ __UINT32_TYPE__ cs;
+ __UINT32_TYPE__ eflags;
+ __UINT32_TYPE__ esp;
+ __UINT32_TYPE__ ss;
#else
#warning "Unsupported architecture"
#endif
};
- unsigned long raw;
+ __UINT64_TYPE__ raw;
} __attribute__((packed));
#endif // !__FENNIX_DRIVER_API_H__
diff --git a/ExecutionLayer/Elf/ElfLoader.cpp b/ExecutionLayer/Elf/ElfLoader.cpp
index 708a1670..320a0662 100644
--- a/ExecutionLayer/Elf/ElfLoader.cpp
+++ b/ExecutionLayer/Elf/ElfLoader.cpp
@@ -47,6 +47,7 @@ namespace Execute
uint64_t EntryPoint,
uint64_t BaseAddress)
{
+#if defined(a64)
char *aux_platform = (char *)mm->RequestPages(1, true); /* TODO: 4KiB is too much for this */
strcpy(aux_platform, "x86_64");
@@ -79,9 +80,10 @@ namespace Execute
Elfauxv.push_back({.archaux = {.a_type = AT_PHDR, .a_un = {.a_val = (uint64_t)phdr_array}}});
// AT_CLKTCK 17
Elfauxv.push_back({.archaux = {.a_type = AT_PAGESZ, .a_un = {.a_val = (uint64_t)PAGE_SIZE}}});
- // AT_HWCAP 16
- // AT_MINSIGSTKSZ 51
- // AT_SYSINFO_EHDR 33
+// AT_HWCAP 16
+// AT_MINSIGSTKSZ 51
+// AT_SYSINFO_EHDR 33
+#endif
}
void ELFObject::LoadExec_x86_32(int fd, PCB *TargetProcess)
@@ -93,6 +95,7 @@ namespace Execute
void ELFObject::LoadExec_x86_64(int fd, PCB *TargetProcess)
{
+#if defined(a64)
std::string InterpreterPath;
std::vector PhdrINTERP = ELFGetSymbolType_x86_64(fd, PT_INTERP);
foreach (auto Interp in PhdrINTERP)
@@ -121,19 +124,7 @@ namespace Execute
if (LoadInterpreter(ifd, TargetProcess))
{
- /* ba deci de aici trb sa fac
- sa se incarce interperter-ul
- argv[1] ar trb sa fie locatia pt intrep */
-
- // modific argv-ul
-
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
+ /* FIXME: specify argv[1] as the location for the interpreter */
debug("Interpreter loaded successfully");
fclose(ifd);
@@ -231,6 +222,7 @@ namespace Execute
this->ip = EntryPoint;
this->IsElfValid = true;
+#endif
}
void ELFObject::LoadDyn_x86_32(int fd, PCB *TargetProcess)
@@ -242,6 +234,7 @@ namespace Execute
void ELFObject::LoadDyn_x86_64(int fd, PCB *TargetProcess)
{
+#if defined(a64)
std::string InterpreterPath;
std::vector PhdrINTERP = ELFGetSymbolType_x86_64(fd, PT_INTERP);
foreach (auto Interp in PhdrINTERP)
@@ -270,18 +263,7 @@ namespace Execute
if (LoadInterpreter(ifd, TargetProcess))
{
- /* ba deci de aici trb sa fac
- sa se incarce interperter-ul
- argv[1] ar trb sa fie locatia pt intrep */
-
- // modific argv-ul
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
- // TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME TODO FIXME
+ /* FIXME: specify argv[1] as the location for the interpreter */
debug("Interpreter loaded successfully");
fclose(ifd);
@@ -619,6 +601,7 @@ namespace Execute
this->ip = EntryPoint;
this->IsElfValid = true;
+#endif
}
bool ELFObject::LoadInterpreter(int fd, PCB *TargetProcess)
diff --git a/ExecutionLayer/Elf/ElfParse.cpp b/ExecutionLayer/Elf/ElfParse.cpp
index b176d11b..ea4c896a 100644
--- a/ExecutionLayer/Elf/ElfParse.cpp
+++ b/ExecutionLayer/Elf/ElfParse.cpp
@@ -95,6 +95,7 @@ namespace Execute
Elf64_Sym ELFLookupSymbol(int fd, const char *Name)
{
+#if defined(a64)
off_t OldOffset = lseek(fd, 0, SEEK_CUR);
Elf64_Ehdr Header;
@@ -152,6 +153,7 @@ namespace Execute
}
error("Symbol not found.");
lseek(fd, OldOffset, SEEK_SET);
+#endif
return {};
}
@@ -198,6 +200,8 @@ namespace Execute
Elf64_Shdr *Target = GetELFSection(Header, Symbol->st_shndx);
return (uintptr_t)Header + Symbol->st_value + Target->sh_offset;
}
+#elif defined(a32)
+ return 0xdead;
#endif
}
}
diff --git a/Kernel.cpp b/Kernel.cpp
index 8132b5f2..2816828e 100644
--- a/Kernel.cpp
+++ b/Kernel.cpp
@@ -252,9 +252,16 @@ EXTERNC void KPrint(const char *Format, ...)
uint64_t Nanoseconds = TimeManager->GetNanosecondsSinceClassCreation();
if (Nanoseconds != 0)
{
+#if defined(a64)
printf("\eCCCCCC[\e00AEFF%lu.%07lu\eCCCCCC] ",
- Nanoseconds / 10000000,
- Nanoseconds % 10000000);
+ Nanoseconds / 10000000, Nanoseconds % 10000000);
+#elif defined(a32)
+ printf("\eCCCCCC[\e00AEFF%llu.%07llu\eCCCCCC] ",
+ Nanoseconds / 10000000, Nanoseconds % 10000000);
+#elif defined(aa64)
+ printf("\eCCCCCC[\e00AEFF%lu.%07lu\eCCCCCC] ",
+ Nanoseconds / 10000000, Nanoseconds % 10000000);
+#endif
}
}
@@ -324,10 +331,8 @@ EXTERNC NIF void Main()
KPrint("Enabling Interrupts on Bootstrap Processor");
Interrupts::Enable(0);
-#if defined(a64)
+#if defined(a86)
PowerManager->InitDSDT();
-#elif defined(a32)
- // FIXME: Add ACPI support for i386
#elif defined(aa64)
#endif
diff --git a/KernelShell/Commands/top.cpp b/KernelShell/Commands/top.cpp
index fe33ab0b..64ca4f05 100644
--- a/KernelShell/Commands/top.cpp
+++ b/KernelShell/Commands/top.cpp
@@ -30,17 +30,31 @@ void cmd_top(const char *)
printf("\e9400A1PID \e9CA100Name \e00A15BState \eCCCCCCPriority Memory Usage CPU Usage\n");
foreach (auto Proc in TaskManager->GetProcessList())
{
+#if defined(a64)
printf("\e9400A1%-4d \e9CA100%-20s \e00A15B%s \eCCCCCC%d %ld %ld\n",
Proc->ID, Proc->Name, Proc->Status == Running ? "Running" : "Stopped",
Proc->Info.Priority, Proc->Memory->GetAllocatedMemorySize(),
Proc->Info.UserTime + Proc->Info.KernelTime);
+#elif defined(a32)
+ printf("\e9400A1%-4d \e9CA100%-20s \e00A15B%s \eCCCCCC%d %lld %lld\n",
+ Proc->ID, Proc->Name, Proc->Status == Running ? "Running" : "Stopped",
+ Proc->Info.Priority, Proc->Memory->GetAllocatedMemorySize(),
+ Proc->Info.UserTime + Proc->Info.KernelTime);
+#endif
foreach (auto Thrd in Proc->Threads)
{
+#if defined(a64)
printf(" \eA80011%-4d \e9CA100%-20s \e00A15B%s \eCCCCCC%d %ld %ld\n",
Thrd->ID, Thrd->Name, Thrd->Status == Running ? "Running" : "Stopped",
Thrd->Info.Priority, Thrd->Memory->GetAllocatedMemorySize(),
Thrd->Info.UserTime + Thrd->Info.KernelTime);
+#elif defined(a32)
+ printf(" \eA80011%-4d \e9CA100%-20s \e00A15B%s \eCCCCCC%d %lld %lld\n",
+ Thrd->ID, Thrd->Name, Thrd->Status == Running ? "Running" : "Stopped",
+ Thrd->Info.Priority, Thrd->Memory->GetAllocatedMemorySize(),
+ Thrd->Info.UserTime + Thrd->Info.KernelTime);
+#endif
}
}
}
diff --git a/KernelShell/Commands/uptime.cpp b/KernelShell/Commands/uptime.cpp
index 72f0af21..3aab5b5b 100644
--- a/KernelShell/Commands/uptime.cpp
+++ b/KernelShell/Commands/uptime.cpp
@@ -27,12 +27,12 @@ void cmd_uptime(const char *)
{
if (TimeManager)
{
- size_t Nanoseconds =
+ uint64_t Nanoseconds =
TimeManager->GetNanosecondsSinceClassCreation();
- size_t Seconds = Nanoseconds / 10000000;
- size_t Minutes = Seconds / 60;
- size_t Hours = Minutes / 60;
- size_t Days = Hours / 24;
+ uint64_t Seconds = Nanoseconds / 10000000;
+ uint64_t Minutes = Seconds / 60;
+ uint64_t Hours = Minutes / 60;
+ uint64_t Days = Hours / 24;
debug("Nanoseconds: %ld", Nanoseconds);
@@ -40,9 +40,15 @@ void cmd_uptime(const char *)
Minutes %= 60;
Hours %= 24;
+#if defined(a64)
printf("%ld days, %ld hours, %ld minutes, %ld %s\n",
Days, Hours, Minutes, Seconds,
Seconds == 1 ? "second" : "seconds");
+#elif defined(a32)
+ printf("%lld days, %lld hours, %lld minutes, %lld %s\n",
+ Days, Hours, Minutes, Seconds,
+ Seconds == 1 ? "second" : "seconds");
+#endif
}
else
{
diff --git a/KernelThread.cpp b/KernelThread.cpp
index 9f52698a..7cf4bf1e 100644
--- a/KernelThread.cpp
+++ b/KernelThread.cpp
@@ -170,8 +170,14 @@ void TaskMgr()
continue;
int Status = Proc->Status.load();
uint64_t ProcessCpuUsage = GetUsage(OldSystemTime, &Proc->Info);
+#if defined(a64)
printf("\e%s-> \eAABBCC%s \e00AAAA%s %ld%% (KT: %ld UT: %ld)\n",
Statuses[Status], Proc->Name, StatusesSign[Status], ProcessCpuUsage, Proc->Info.KernelTime, Proc->Info.UserTime);
+#elif defined(a32)
+ printf("\e%s-> \eAABBCC%s \e00AAAA%s %lld%% (KT: %lld UT: %lld)\n",
+ Statuses[Status], Proc->Name, StatusesSign[Status], ProcessCpuUsage, Proc->Info.KernelTime, Proc->Info.UserTime);
+#elif defined(aa64)
+#endif
foreach (auto Thd in Proc->Threads)
{
@@ -185,7 +191,7 @@ void TaskMgr()
Thd->Info.UserTime, Thd->Registers.rip,
Thd->Parent->ELFSymbolTable ? Thd->Parent->ELFSymbolTable->GetSymbolFromAddress(Thd->Registers.rip) : "unknown");
#elif defined(a32)
- printf(" \e%s-> \eAABBCC%s \e00AAAA%s %lld%% (KT: %lld UT: %lld, IP: \e24FF2B%#lx \eEDFF24%s\e00AAAA)\n\eAABBCC",
+ printf(" \e%s-> \eAABBCC%s \e00AAAA%s %lld%% (KT: %lld UT: %lld, IP: \e24FF2B%#x \eEDFF24%s\e00AAAA)\n\eAABBCC",
Statuses[Status], Thd->Name, StatusesSign[Status], ThreadCpuUsage, Thd->Info.KernelTime,
Thd->Info.UserTime, Thd->Registers.eip,
Thd->Parent->ELFSymbolTable ? Thd->Parent->ELFSymbolTable->GetSymbolFromAddress(Thd->Registers.eip) : "unknown");
@@ -196,12 +202,14 @@ void TaskMgr()
OldSystemTime = TimeManager->GetCounter();
#if defined(a64)
register uintptr_t CurrentStackAddress asm("rsp");
+ printf("Sanity: %d, Stack: %#lx", sanity++, CurrentStackAddress);
#elif defined(a32)
register uintptr_t CurrentStackAddress asm("esp");
+ printf("Sanity: %d, Stack: %#x", sanity++, CurrentStackAddress);
#elif defined(aa64)
register uintptr_t CurrentStackAddress asm("sp");
-#endif
printf("Sanity: %d, Stack: %#lx", sanity++, CurrentStackAddress);
+#endif
if (sanity > 1000)
sanity = 0;
Display->SetBufferCursor(0, tmpX, tmpY);
diff --git a/Modules/AHCI/AdvancedHostControllerInterface.cpp b/Modules/AHCI/AdvancedHostControllerInterface.cpp
index 4ec8e015..64bf496c 100644
--- a/Modules/AHCI/AdvancedHostControllerInterface.cpp
+++ b/Modules/AHCI/AdvancedHostControllerInterface.cpp
@@ -72,7 +72,7 @@ namespace AdvancedHostControllerInterface
this->AHCIPortType = Type;
this->HBAPortPtr = PortPtr;
this->Buffer = static_cast(KAPI.Memory.RequestPage(1));
- memset(this->Buffer, 0, KAPI.Memory.PageSize);
+ memset(this->Buffer, 0, size_t(KAPI.Memory.PageSize));
this->PortNumber = PortNumber;
}
diff --git a/Modules/AudioCodec97/AudioCodec97.cpp b/Modules/AudioCodec97/AudioCodec97.cpp
index 619059fa..55550bdd 100644
--- a/Modules/AudioCodec97/AudioCodec97.cpp
+++ b/Modules/AudioCodec97/AudioCodec97.cpp
@@ -283,7 +283,8 @@ namespace AudioCodec97
do
{
- size_t Wrote = (KAPI.Memory.PageSize > Length) ? Length : KAPI.Memory.PageSize;
+ size_t Wrote = (KAPI.Memory.PageSize > Length) ? size_t(Length)
+ : size_t(KAPI.Memory.PageSize);
if (Wrote == 0)
break;
diff --git a/Modules/Intel/Gigabit.cpp b/Modules/Intel/Gigabit.cpp
index 7d22905b..590d6deb 100644
--- a/Modules/Intel/Gigabit.cpp
+++ b/Modules/Intel/Gigabit.cpp
@@ -113,9 +113,14 @@ namespace Gigabit
RX[i]->Status = 0;
}
+#pragma diagnostic push
+#pragma GCC diagnostic ignored "-Wshift-count-overflow"
+
WriteCMD(REG::TXDESCLO, (uint32_t)(Ptr >> 32));
WriteCMD(REG::TXDESCHI, (uint32_t)(Ptr & 0xFFFFFFFF));
+#pragma diagnostic pop
+
WriteCMD(REG::RXDESCLO, (uint32_t)Ptr);
WriteCMD(REG::RXDESCHI, 0);
diff --git a/Tasking/Thread.cpp b/Tasking/Thread.cpp
index fa4c18de..080ac823 100644
--- a/Tasking/Thread.cpp
+++ b/Tasking/Thread.cpp
@@ -31,6 +31,7 @@
#include "../Architecture/amd64/cpu/gdt.hpp"
#elif defined(a32)
#include "../Architecture/i386/cpu/apic.hpp"
+#include "../Architecture/i386/cpu/gdt.hpp"
#elif defined(aa64)
#endif
@@ -218,9 +219,9 @@ namespace Tasking
foreach (AuxiliaryVector var in auxv_array)
{
// Subtract the size of the auxillary vector
- Stack64 -= sizeof(Elf64_auxv_t) / sizeof(uintptr_t);
+ Stack64 -= sizeof(Elf_auxv_t) / sizeof(uintptr_t);
// Store the auxillary vector
- POKE(Elf64_auxv_t, Stack64) = var.archaux;
+ POKE(Elf_auxv_t, Stack64) = var.archaux;
// TODO: Store strings to the stack
}
@@ -263,7 +264,14 @@ namespace Tasking
debug("SubtractStack: %#lx", SubtractStack);
// Set the stack pointer to the new stack
- this->Registers.rsp = ((uintptr_t)this->Stack->GetStackTop() - SubtractStack);
+ uintptr_t StackPointerReg = ((uintptr_t)this->Stack->GetStackTop() - SubtractStack);
+#if defined(a64)
+ this->Registers.rsp = StackPointerReg;
+#elif defined(a32)
+ this->Registers.esp = StackPointerReg;
+#elif defined(aa64)
+ this->Registers.sp = StackPointerReg;
+#endif
if (ArgvSize > 0)
delete[] ArgvStrings;
@@ -274,10 +282,22 @@ namespace Tasking
DumpData("Stack Data", (void *)((uintptr_t)this->Stack->GetStackPhysicalTop() - (uintptr_t)SubtractStack), SubtractStack);
#endif
+#if defined(a64)
this->Registers.rdi = (uintptr_t)ArgvSize; // argc
this->Registers.rsi = (uintptr_t)(this->Registers.rsp + 8); // argv
this->Registers.rcx = (uintptr_t)EnvpSize; // envc
this->Registers.rdx = (uintptr_t)(this->Registers.rsp + 8 + (8 * ArgvSize) + 8); // envp
+#elif defined(a32)
+ this->Registers.eax = (uintptr_t)ArgvSize; // argc
+ this->Registers.ebx = (uintptr_t)(this->Registers.esp + 4); // argv
+ this->Registers.ecx = (uintptr_t)EnvpSize; // envc
+ this->Registers.edx = (uintptr_t)(this->Registers.esp + 4 + (4 * ArgvSize) + 4); // envp
+#elif defined(aa64)
+ this->Registers.x0 = (uintptr_t)ArgvSize; // argc
+ this->Registers.x1 = (uintptr_t)(this->Registers.sp + 8); // argv
+ this->Registers.x2 = (uintptr_t)EnvpSize; // envc
+ this->Registers.x3 = (uintptr_t)(this->Registers.sp + 8 + (8 * ArgvSize) + 8); // envp
+#endif
}
void TCB::SetupUserStack_x86_32(const char **argv,
diff --git a/include/abi.h b/include/abi.h
index 1bfb9abb..c046d755 100644
--- a/include/abi.h
+++ b/include/abi.h
@@ -77,15 +77,17 @@ typedef struct
} a_un;
} Elf64_auxv_t;
+#if defined(a64)
+typedef Elf64_auxv_t Elf_auxv_t;
+#elif defined(a32)
+typedef Elf64_auxv_t Elf_auxv_t;
+#elif defined(aa64)
+typedef Elf64_auxv_t Elf_auxv_t;
+#endif
+
typedef struct
{
-#if defined(a64)
- Elf64_auxv_t archaux;
-#elif defined(a32)
- Elf32_auxv_t archaux;
-#elif defined(aa64)
- Elf64_auxv_t archaux;
-#endif
+ Elf_auxv_t archaux;
} AuxiliaryVector;
#endif // !__FENNIX_KERNEL_ABI_H__
diff --git a/include/cpu.hpp b/include/cpu.hpp
index 3a6582d6..c9870d39 100644
--- a/include/cpu.hpp
+++ b/include/cpu.hpp
@@ -210,6 +210,35 @@ namespace CPU
namespace x32
{
+ /**
+ * @brief MSR_APIC_BASE structure
+ * @see MSR_APIC_BASE
+ */
+ typedef union
+ {
+ struct
+ {
+ /** @brief Reserved */
+ uint32_t Reserved0 : 8;
+ /**
+ * @brief BSP Flag
+ * @details If the BSP flag is set to 1, the processor is the bootstrap processor.
+ */
+ uint32_t BSP : 1;
+ /** @brief Reserved */
+ uint32_t Reserved1 : 1;
+ /** @brief Enable x2APIC mode */
+ uint32_t EXTD : 1;
+ /** @brief APIC Global Enable */
+ uint32_t EN : 1;
+ /** @brief APIC Base Low Address */
+ uint32_t ApicBaseLo : 20;
+ /** @brief APIC Base High Address */
+ uint32_t ApicBaseHi : 32;
+ };
+ uint64_t raw;
+ } __packed APIC_BASE;
+
typedef union
{
struct
diff --git a/include/pci.hpp b/include/pci.hpp
index 10ae337f..a0b9d210 100644
--- a/include/pci.hpp
+++ b/include/pci.hpp
@@ -213,7 +213,7 @@ namespace PCI
struct DeviceConfig
{
- uintptr_t BaseAddress;
+ uint64_t BaseAddress;
uint16_t PCISegGroup;
uint8_t StartBus;
uint8_t EndBus;
@@ -228,9 +228,9 @@ namespace PCI
public:
std::vector &GetDevices() { return Devices; }
void MapPCIAddresses(PCIDeviceHeader *PCIDevice, Memory::PageTable *Table = nullptr);
- void EnumerateFunction(uintptr_t DeviceAddress, uintptr_t Function);
- void EnumerateDevice(uintptr_t BusAddress, uintptr_t Device);
- void EnumerateBus(uintptr_t BaseAddress, uintptr_t Bus);
+ void EnumerateFunction(uint64_t DeviceAddress, uintptr_t Function);
+ void EnumerateDevice(uint64_t BusAddress, uintptr_t Device);
+ void EnumerateBus(uint64_t BaseAddress, uintptr_t Bus);
std::vector FindPCIDevice(uint8_t Class, uint8_t Subclass, uint8_t ProgIF);
std::vector FindPCIDevice(int VendorID, int DeviceID);
diff --git a/include/time.hpp b/include/time.hpp
index 2f8ca7b0..6da7e840 100644
--- a/include/time.hpp
+++ b/include/time.hpp
@@ -52,15 +52,15 @@ namespace Time
private:
struct HPET
{
- uintptr_t GeneralCapabilities;
- uintptr_t Reserved0;
- uintptr_t GeneralConfiguration;
- uintptr_t Reserved1;
- uintptr_t GeneralIntStatus;
- uintptr_t Reserved2;
- uintptr_t Reserved3[24];
- uintptr_t MainCounterValue;
- uintptr_t Reserved4;
+ uint64_t GeneralCapabilities;
+ uint64_t Reserved0;
+ uint64_t GeneralConfiguration;
+ uint64_t Reserved1;
+ uint64_t GeneralIntStatus;
+ uint64_t Reserved2;
+ uint64_t Reserved3[24];
+ uint64_t MainCounterValue;
+ uint64_t Reserved4;
};
uint32_t clk = 0;