mirror of
https://github.com/EnderIce2/Fennix.git
synced 2025-07-01 18:39:16 +00:00
chore: Update makefiles & macros
This commit is contained in:
@ -56,7 +56,7 @@ NIF void tracepagetable(PageTable *pt)
|
||||
{
|
||||
for (int i = 0; i < 512; i++)
|
||||
{
|
||||
#if defined(a64)
|
||||
#if defined(__amd64__)
|
||||
if (pt->Entries[i].Present)
|
||||
debug("Entry %03d: %x %x %x %x %x %x %x %p-%#llx", i,
|
||||
pt->Entries[i].Present, pt->Entries[i].ReadWrite,
|
||||
@ -64,8 +64,8 @@ NIF void tracepagetable(PageTable *pt)
|
||||
pt->Entries[i].CacheDisable, pt->Entries[i].Accessed,
|
||||
pt->Entries[i].ExecuteDisable, pt->Entries[i].Address << 12,
|
||||
pt->Entries[i]);
|
||||
#elif defined(a32)
|
||||
#elif defined(aa64)
|
||||
#elif defined(__i386__)
|
||||
#elif defined(__aarch64__)
|
||||
#endif
|
||||
}
|
||||
}
|
||||
@ -257,15 +257,15 @@ NIF void CreatePageTable(PageTable *pt)
|
||||
|
||||
if (PSESupport)
|
||||
{
|
||||
#if defined(a64)
|
||||
#if defined(__amd64__)
|
||||
CPU::x64::CR4 cr4 = CPU::x64::readcr4();
|
||||
cr4.PSE = 1;
|
||||
CPU::x64::writecr4(cr4);
|
||||
#elif defined(a32)
|
||||
#elif defined(__i386__)
|
||||
CPU::x32::CR4 cr4 = CPU::x32::readcr4();
|
||||
cr4.PSE = 1;
|
||||
CPU::x32::writecr4(cr4);
|
||||
#elif defined(aa64)
|
||||
#elif defined(__aarch64__)
|
||||
#endif
|
||||
trace("PSE Support Enabled");
|
||||
}
|
||||
@ -289,7 +289,7 @@ NIF void CreatePageTable(PageTable *pt)
|
||||
NIF void InitializeMemoryManagement()
|
||||
{
|
||||
#ifdef DEBUG
|
||||
#ifndef a32
|
||||
#ifndef __i386__
|
||||
for (uint64_t i = 0; i < bInfo.Memory.Entries; i++)
|
||||
{
|
||||
uintptr_t Base = r_cst(uintptr_t, bInfo.Memory.Entry[i].BaseAddress);
|
||||
@ -333,7 +333,7 @@ NIF void InitializeMemoryManagement()
|
||||
End,
|
||||
Type);
|
||||
}
|
||||
#endif // a32
|
||||
#endif // __i386__
|
||||
#endif // DEBUG
|
||||
trace("Initializing Physical Memory Manager");
|
||||
// KernelAllocator = Physical(); <- Already called in the constructor
|
||||
|
Reference in New Issue
Block a user