mirror of
https://github.com/EnderIce2/Fennix.git
synced 2025-07-03 11:29:17 +00:00
Merge remote-tracking branch 'Kernel/master'
This commit is contained in:
93
Kernel/arch/i386/cpu/smp.cpp
Normal file
93
Kernel/arch/i386/cpu/smp.cpp
Normal file
@ -0,0 +1,93 @@
|
||||
/*
|
||||
This file is part of Fennix Kernel.
|
||||
|
||||
Fennix Kernel is free software: you can redistribute it and/or
|
||||
modify it under the terms of the GNU General Public License as
|
||||
published by the Free Software Foundation, either version 3 of
|
||||
the License, or (at your option) any later version.
|
||||
|
||||
Fennix Kernel is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <smp.hpp>
|
||||
|
||||
#include <memory.hpp>
|
||||
#include <acpi.hpp>
|
||||
#include <ints.hpp>
|
||||
#include <assert.h>
|
||||
#include <cpu.hpp>
|
||||
#include <atomic>
|
||||
|
||||
#include "../../../kernel.h"
|
||||
#include "apic.hpp"
|
||||
|
||||
enum SMPTrampolineAddress
|
||||
{
|
||||
PAGE_TABLE = 0x500,
|
||||
START_ADDR = 0x520,
|
||||
STACK = 0x570,
|
||||
GDT = 0x580,
|
||||
IDT = 0x590,
|
||||
CORE = 0x600,
|
||||
TRAMPOLINE_START = 0x2000
|
||||
};
|
||||
|
||||
std::atomic_bool CPUEnabled = false;
|
||||
|
||||
#pragma GCC diagnostic ignored "-Wmissing-field-initializers"
|
||||
static __aligned(PAGE_SIZE) CPUData CPUs[MAX_CPU] = {0};
|
||||
|
||||
nsa CPUData *GetCPU(long id) { return &CPUs[id]; }
|
||||
|
||||
nsa CPUData *GetCurrentCPU()
|
||||
{
|
||||
if (unlikely(!Interrupts::apic[0]))
|
||||
return &CPUs[0]; /* No APIC means we are on the BSP. */
|
||||
|
||||
APIC::APIC *apic = (APIC::APIC *)Interrupts::apic[0];
|
||||
int CoreID = 0;
|
||||
if (CPUEnabled.load(std::memory_order_acquire) == true)
|
||||
{
|
||||
if (apic->x2APIC)
|
||||
CoreID = int(CPU::x32::rdmsr(CPU::x32::MSR_X2APIC_APICID));
|
||||
else
|
||||
CoreID = apic->Read(APIC::APIC_ID) >> 24;
|
||||
}
|
||||
|
||||
if (unlikely((&CPUs[CoreID])->IsActive != true))
|
||||
{
|
||||
error("CPU %d is not active!", CoreID);
|
||||
assert((&CPUs[0])->IsActive == true); /* We can't continue without the BSP. */
|
||||
return &CPUs[0];
|
||||
}
|
||||
|
||||
assert((&CPUs[CoreID])->Checksum == CPU_DATA_CHECKSUM); /* This should never happen. */
|
||||
return &CPUs[CoreID];
|
||||
}
|
||||
|
||||
namespace SMP
|
||||
{
|
||||
int CPUCores = 0;
|
||||
|
||||
void Initialize(void *_madt)
|
||||
{
|
||||
ACPI::MADT *madt = (ACPI::MADT *)_madt;
|
||||
|
||||
int Cores = madt->CPUCores + 1;
|
||||
|
||||
if (Config.Cores > madt->CPUCores + 1)
|
||||
KPrint("More cores requested than available. Using %d cores", madt->CPUCores + 1);
|
||||
else if (Config.Cores != 0)
|
||||
Cores = Config.Cores;
|
||||
|
||||
CPUCores = Cores;
|
||||
|
||||
fixme("SMP::Initialize() is not implemented!");
|
||||
}
|
||||
}
|
Reference in New Issue
Block a user