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https://github.com/EnderIce2/Fennix.git
synced 2025-07-07 05:19:17 +00:00
Add support for 2MB and 1GB map
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@ -75,22 +75,47 @@ NIF void tracepagetable(PageTable4 *pt)
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NIF void MapFromZero(PageTable4 *PT, BootInfo *Info)
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{
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static int once = 0;
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if (!once++)
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bool Page1GBSupport = false;
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bool PSESupport = false;
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if (strcmp(CPU::Vendor(), x86_CPUID_VENDOR_AMD) == 0)
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{
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Virtual va = Virtual(PT);
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void *NullAddress = KernelAllocator.RequestPage();
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memset(NullAddress, 0, PAGE_SIZE); // TODO: If the CPU instruction pointer hits this page, there should be function to handle it. (memcpy assembly code?)
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va.Map((void *)0, (void *)NullAddress, PTFlag::RW | PTFlag::US);
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size_t MemSize = Info->Memory.Size;
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for (size_t t = 0; t < MemSize; t += PAGE_SIZE)
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va.Map((void *)t, (void *)t, PTFlag::RW);
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CPU::x86::AMD::CPUID0x80000001 cpuid;
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cpuid.Get();
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Page1GBSupport = cpuid.EDX.Page1GB;
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PSESupport = cpuid.EDX.PSE;
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}
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else if (strcmp(CPU::Vendor(), x86_CPUID_VENDOR_INTEL) == 0)
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{
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CPU::x86::Intel::CPUID0x80000001 cpuid;
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cpuid.Get();
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}
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Virtual va = Virtual(PT);
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size_t MemSize = Info->Memory.Size;
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if (Page1GBSupport && PSESupport)
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{
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debug("1GB Page Support Enabled");
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#if defined(a64)
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CPU::x64::CR4 cr4 = CPU::x64::readcr4();
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cr4.PSE = 1;
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CPU::x64::writecr4(cr4);
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#elif defined(a32)
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CPU::x32::CR4 cr4 = CPU::x32::readcr4();
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cr4.PSE = 1;
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CPU::x32::writecr4(cr4);
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#elif defined(aa64)
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#endif
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va.Map((void *)0, (void *)0, MemSize, PTFlag::RW | PTFlag::PS /* , Virtual::MapType::OneGB */);
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}
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else
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{
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error("MapFromZero() called more than once!");
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CPU::Stop();
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}
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va.Map((void *)0, (void *)0, MemSize, PTFlag::RW);
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void *NullAddress = KernelAllocator.RequestPage();
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memset(NullAddress, 0, PAGE_SIZE); // TODO: If the CPU instruction pointer hits this page, there should be function to handle it. (memcpy assembly code?)
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va.Remap((void *)0, (void *)NullAddress, PTFlag::RW | PTFlag::US);
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}
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NIF void MapFramebuffer(PageTable4 *PT, BootInfo *Info)
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@ -151,7 +176,7 @@ NIF void MapKernel(PageTable4 *PT, BootInfo *Info)
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/* Text section */
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for (k = KernelStart; k < KernelTextEnd; k += PAGE_SIZE)
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{
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va.Map((void *)k, (void *)BaseKernelMapAddress, PTFlag::RW);
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va.Map((void *)k, (void *)BaseKernelMapAddress, PTFlag::RW | PTFlag::G);
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KernelAllocator.LockPage((void *)BaseKernelMapAddress);
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BaseKernelMapAddress += PAGE_SIZE;
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}
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