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refactor: Fix build on i386
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Signed-off-by: EnderIce2 <enderice2@protonmail.com>
This commit is contained in:
@ -20,13 +20,6 @@
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#include <task.hpp>
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#include <errno.h>
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#if defined(__amd64__)
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#include "../arch/amd64/cpu/gdt.hpp"
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#elif defined(__i386__)
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#include "../arch/i386/cpu/gdt.hpp"
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#elif defined(__aarch64__)
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#endif
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#include "../kernel.h"
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#ifdef DEBUG
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@ -344,149 +337,6 @@ namespace Tasking
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return {};
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}
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bool Signal::HandleSignal(CPU::SchedulerFrame *tf, void *thread)
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{
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/* We don't want to do this in kernel mode */
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if (tf->cs != GDT_USER_CODE)
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return false;
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if (Queue.empty())
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return false;
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debug("We have %d signals to handle", Queue.size());
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SmartLock(SignalLock);
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SignalInfo sigI = GetAvailableSignal(thread);
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if (sigI.sig == SIGNULL)
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return false;
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uintptr_t _p_rsp = ((PCB *)ctx)->PageTable->Get(tf->rsp);
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uint64_t paRsp = _p_rsp;
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paRsp &= ~0xF; /* Align */
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paRsp -= 128; /* Red zone */
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/* Calculate the virtual rsp */
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uintptr_t _v_rsp = tf->rsp;
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_v_rsp &= ~0xF; /* Align */
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_v_rsp -= 128; /* Red zone */
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uint64_t *vRsp = (uint64_t *)(_v_rsp - sizeof(StackInfo));
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vRsp--; /* Alignment */
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vRsp--; /* Handler Address */
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assert(!((uintptr_t)vRsp & 0xF));
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/* Add the stack info */
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StackInfo si{};
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CPU::x64::fxsave(&si.fx);
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si.tf = *tf;
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si.GSBase = CPU::x64::rdmsr(CPU::x64::MSR_GS_BASE);
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si.FSBase = CPU::x64::rdmsr(CPU::x64::MSR_FS_BASE);
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si.ShadowGSBase = CPU::x64::rdmsr(CPU::x64::MSR_SHADOW_GS_BASE);
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si.SignalMask = ((TCB *)thread)->Signals.Mask.to_ulong();
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si.Compatibility = ((PCB *)ctx)->Info.Compatibility;
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debug("gs: %#lx fs: %#lx shadow: %#lx",
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si.GSBase, si.FSBase, si.ShadowGSBase);
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/* Copy the stack info */
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uint64_t *pRsp = (uint64_t *)(paRsp - sizeof(StackInfo));
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memcpy(pRsp, &si, sizeof(StackInfo));
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/* Set the handler address */
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pRsp--; /* Alignment */
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pRsp--;
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*pRsp = uint64_t(sa[sigI.sig].sa_handler.Handler);
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assert(!((uintptr_t)pRsp & 0xF));
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int cSig = LinuxSig() ? ConvertSignalToLinux((signal_t)sigI.sig) : sigI.sig;
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#ifdef DEBUG
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DumpData("Stack Data", (void *)pRsp,
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paRsp - uint64_t(pRsp));
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debug("initial stack tf->rsp: %#lx after: %#lx",
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tf->rsp, uint64_t(vRsp));
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debug("sig: %d -> %d", sigI.sig, cSig);
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#endif
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tf->rsp = uint64_t(vRsp);
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tf->rip = uint64_t(TrampAddr);
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/* void func(int signo); */
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/* void func(int signo, siginfo_t *info, void *context); */
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tf->rdi = cSig;
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if (sa[sigI.sig].Flags & SA_SIGINFO)
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{
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fixme("SA_SIGINFO not implemented");
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siginfo_t *info = 0;
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void *context = 0;
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tf->rsi = uint64_t(info);
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tf->rdx = uint64_t(context);
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tf->rcx = 0;
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tf->r8 = 0;
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tf->r9 = 0;
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}
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else
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{
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tf->rsi = 0;
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tf->rdx = 0;
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tf->rcx = 0;
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tf->r8 = 0;
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tf->r9 = 0;
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}
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((TCB *)thread)->Signals.Mask = sa[sigI.sig].Mask;
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assert(TrampAddr != nullptr);
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return true;
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}
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void Signal::RestoreHandleSignal(SyscallsFrame *sf, void *thread)
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{
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debug("Restoring signal handler");
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SmartLock(SignalLock);
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gsTCB *gs = (gsTCB *)CPU::x64::rdmsr(CPU::x64::MSR_GS_BASE);
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uint64_t *sp = (uint64_t *)((PCB *)ctx)->PageTable->Get(gs->TempStack);
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sp++; /* Alignment */
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sp++; /* Handler Address */
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assert(!((uintptr_t)sp & 0xF));
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StackInfo *si = (StackInfo *)sp;
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assert(si != nullptr);
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sf->r15 = si->tf.r15;
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sf->r14 = si->tf.r14;
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sf->r13 = si->tf.r13;
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sf->r12 = si->tf.r12;
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sf->r11 = si->tf.r11;
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sf->r10 = si->tf.r10;
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sf->r9 = si->tf.r9;
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sf->r8 = si->tf.r8;
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sf->bp = si->tf.rbp;
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sf->di = si->tf.rdi;
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sf->si = si->tf.rsi;
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sf->dx = si->tf.rdx;
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sf->cx = si->tf.rcx;
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sf->bx = si->tf.rbx;
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sf->ax = si->tf.rax;
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sf->Flags = si->tf.rflags.raw;
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sf->ReturnAddress = si->tf.rip;
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gs->TempStack = (void *)si->tf.rsp;
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((TCB *)thread)->Signals.Mask = si->SignalMask;
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CPU::x64::fxrstor(&si->fx);
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CPU::x64::wrmsr(CPU::x64::MSR_GS_BASE, si->ShadowGSBase);
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CPU::x64::wrmsr(CPU::x64::MSR_FS_BASE, si->FSBase);
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CPU::x64::wrmsr(CPU::x64::MSR_SHADOW_GS_BASE, si->GSBase);
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debug("gs: %#lx fs: %#lx shadow: %#lx",
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si->GSBase, si->FSBase, si->ShadowGSBase);
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// ((PCB *)ctx)->GetContext()->Yield();
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// __builtin_unreachable();
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/* Return because we will restore at sysretq */
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}
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int Signal::SetAction(signal_t sig, const SignalAction *act)
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{
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SmartLock(SignalLock);
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