refactor: Fix build on i386
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Signed-off-by: EnderIce2 <enderice2@protonmail.com>
This commit is contained in:
2025-01-07 17:49:37 +02:00
parent 463d16f8bc
commit 2bb997597e
57 changed files with 1489 additions and 923 deletions

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@ -313,7 +313,7 @@ namespace CPU
CoreData->Data.FPU.mxcsr = 0b0001111110000000;
CoreData->Data.FPU.mxcsrmask = 0b1111111110111111;
CoreData->Data.FPU.fcw = 0b0000001100111111;
fxrstor(&CoreData->Data.FPU);
CPU::x86::fxrstor(&CoreData->Data.FPU);
SSEEnableAfter = true;
}
@ -378,7 +378,7 @@ namespace CPU
debug("Updated CR4.");
debug("Enabling PAT support...");
wrmsr(MSR_CR_PAT, 0x6 | (0x0 << 8) | (0x1 << 16));
CPU::x86::wrmsr(CPU::x86::MSR_CR_PAT, 0x6 | (0x0 << 8) | (0x1 << 16));
if (!BSP++)
trace("Features for BSP initialized.");
if (SSEEnableAfter)

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@ -245,8 +245,8 @@ namespace Driver
debug("Driver %s has entry point %#lx and base %#lx",
File->Name.c_str(), Drv.EntryPoint, Drv.BaseAddress);
Elf64_Shdr sht_strtab{};
Elf64_Shdr sht_symtab{};
Elf_Shdr sht_strtab{};
Elf_Shdr sht_symtab{};
Elf_Shdr shstrtab{};
Elf_Shdr shdr{};
__DriverInfo driverInfo{};

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@ -114,13 +114,13 @@ namespace Interrupts
void Initialize(int Core)
{
#if defined(__amd64__)
#if defined(__amd64__) || defined(__i386__)
GlobalDescriptorTable::Init(Core);
InterruptDescriptorTable::Init(Core);
CPUData *CoreData = GetCPU(Core);
CoreData->Checksum = CPU_DATA_CHECKSUM;
CPU::x64::wrmsr(CPU::x64::MSR_GS_BASE, (uint64_t)CoreData);
CPU::x64::wrmsr(CPU::x64::MSR_SHADOW_GS_BASE, (uint64_t)CoreData);
CPU::x86::wrmsr(CPU::x86::MSR_GS_BASE, (uint64_t)CoreData);
CPU::x86::wrmsr(CPU::x86::MSR_SHADOW_GS_BASE, (uint64_t)CoreData);
CoreData->ID = Core;
CoreData->IsActive = true;
CoreData->Stack = (uintptr_t)StackManager.Allocate(STACK_SIZE) + STACK_SIZE;
@ -133,24 +133,6 @@ namespace Interrupts
debug("Stack for core %d is %#lx (Address: %#lx)",
Core, CoreData->Stack, CoreData->Stack - STACK_SIZE);
InitializeSystemCalls();
#elif defined(__i386__)
GlobalDescriptorTable::Init(Core);
InterruptDescriptorTable::Init(Core);
CPUData *CoreData = GetCPU(Core);
CoreData->Checksum = CPU_DATA_CHECKSUM;
CPU::x32::wrmsr(CPU::x32::MSR_GS_BASE, (uint64_t)CoreData);
CPU::x32::wrmsr(CPU::x32::MSR_SHADOW_GS_BASE, (uint64_t)CoreData);
CoreData->ID = Core;
CoreData->IsActive = true;
CoreData->Stack = (uintptr_t)StackManager.Allocate(STACK_SIZE) + STACK_SIZE;
if (CoreData->Checksum != CPU_DATA_CHECKSUM)
{
KPrint("CPU %d checksum mismatch! %x != %x",
Core, CoreData->Checksum, CPU_DATA_CHECKSUM);
CPU::Stop();
}
debug("Stack for core %d is %#lx (Address: %#lx)",
Core, CoreData->Stack, CoreData->Stack - STACK_SIZE);
#elif defined(__aarch64__)
warn("aarch64 is not supported yet");
#endif

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@ -551,7 +551,9 @@ struct heap_t
};
/* Keep in sync with heap_t inside rpmalloc_compat.cpp */
#ifndef __i386__
static_assert(sizeof(heap_t) == 56408, "heap_t size mismatch");
#endif // __i386__
// Size class for defining a block size bucket
struct size_class_t

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@ -73,7 +73,7 @@ namespace Memory
}
}
#else
#error "PageTable::Fork() not implemented for other architectures"
#warning "PageTable::Fork() not implemented for other architectures"
#endif
debug("Forked page table %#lx to %#lx", this, NewTable);

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@ -236,7 +236,9 @@ namespace Memory
assert(pte->Present == true);
pte->ReadWrite = sr.Write;
pte->UserSupervisor = sr.Read;
#if defined(__amd64__)
pte->ExecuteDisable = sr.Exec;
#endif
pte->CopyOnWrite = false;
debug("PFA %#lx is CoW (pt %#lx, flags %#lx)",

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@ -100,7 +100,7 @@ nsa void HaltAllCores()
if (SMP::CPUCores <= 1)
return;
#if defined(__amd64__) || defined(__i386__)
#if defined(__amd64__)
if (Interrupts::apic[0] == nullptr)
return;

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@ -140,9 +140,9 @@ nsa CrashXHCIKeyboardDriver::CrashXHCIKeyboardDriver(PCIDevice xhci)
debug("IO %d 64-BIT %d", BAR[0] & 0x1, BAR[0] & 0x4);
uintptr_t baseAddress = BAR[0];
uint64_t baseAddress = BAR[0];
if (BAR[0] & 0x4)
baseAddress |= (uintptr_t)BAR[1] << 32;
baseAddress |= (uint64_t)BAR[1] << 32;
if (baseAddress & 0x1)
baseAddress &= 0xFFFFFFFFFFFFFFFC;
@ -158,7 +158,7 @@ nsa CrashXHCIKeyboardDriver::CrashXHCIKeyboardDriver(PCIDevice xhci)
runtime = (XHCIruntime *)(baseAddress + (caps->RTSOFF & ~0x1F));
doorbell = (XHCIdoorbell *)(baseAddress + (caps->DBOFF & ~0x3));
uint16_t exCapOffset = caps->HCCPARAMS1.xHCIExtendedCapacitiesPointer << 2;
ExtendedCaps = (uintptr_t)caps + exCapOffset;
ExtendedCaps = (uint64_t)caps + exCapOffset;
debug("ExtendedCaps: %#lx (%#lx + %#lx)", ExtendedCaps, caps, exCapOffset);
#pragma GCC diagnostic push

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@ -95,17 +95,6 @@ x86ExceptionName x86Exceptions[] = {
/*31*/ {"#r7", "Reserved", "Reserved"},
};
static const char *x86PageFaultDescriptions[9] = {
"Supervisor tried to read a non-present page entry\n",
"Supervisor tried to read a page and caused a protection fault\n",
"Supervisor tried to write to a non-present page entry\n",
"Supervisor tried to write a page and caused a protection fault\n",
"User tried to read a non-present page entry\n",
"User tried to read a page and caused a protection fault\n",
"User tried to write to a non-present page entry\n",
"User tried to write a page and caused a protection fault\n",
"One or more page directory entries contain reserved bits which are set to 1.\n"};
int ActiveScreen = 0;
char __modSym[20];
@ -139,9 +128,19 @@ nsa const char *ExGetKSymbolByAddress(uintptr_t Address)
nsa const char *ExGetKSymbol(CPU::ExceptionFrame *Frame)
{
#if defined(__amd64__)
if (Frame->rip < (uintptr_t)&_kernel_start &&
Frame->rip > (uintptr_t)&_kernel_end)
return "<OUTSIDE KERNEL>";
#elif defined(__i386__)
if (Frame->eip < (uintptr_t)&_kernel_start &&
Frame->eip > (uintptr_t)&_kernel_end)
return "<OUTSIDE KERNEL>";
#elif defined(__aarch64__)
if (Frame->pc < (uintptr_t)&_kernel_start &&
Frame->pc > (uintptr_t)&_kernel_end)
return "<OUTSIDE KERNEL>";
#endif
#if defined(__amd64__)
return ExGetKSymbolByAddress(Frame->rip);
@ -338,94 +337,7 @@ nsa void DisplayMainScreen(CPU::ExceptionFrame *Frame)
ExPrint("\nUse command 'diag' to create a diagnostic report.\n");
}
nsa void DisplayDetailsScreen(CPU::ExceptionFrame *Frame)
{
ExPrint("\nException Frame:\n");
ExPrint(" General Purpose Registers:\n");
ExPrint(" RAX: %#lx RBX: %#lx RCX: %#lx RDX: %#lx\n",
Frame->rax, Frame->rbx, Frame->rcx, Frame->rdx);
ExPrint(" RSI: %#lx RDI: %#lx R8: %#lx R9: %#lx\n",
Frame->rsi, Frame->rdi, Frame->r8, Frame->r9);
ExPrint(" R10: %#lx R11: %#lx R12: %#lx R13: %#lx\n",
Frame->r10, Frame->r11, Frame->r12, Frame->r13);
ExPrint(" R14: %#lx R15: %#lx\n", Frame->r14, Frame->r15);
ExPrint(" Control Registers:\n");
ExPrint(" CR0: %#lx CR2: %#lx CR3: %#lx CR4: %#lx\n",
Frame->cr0, Frame->cr2, Frame->cr3, Frame->cr4);
ExPrint(" CR8: %#lx\n", Frame->cr8);
ExPrint(" Segment Registers:\n");
ExPrint(" CS: %#lx SS: %#lx DS: %#lx ES: %#lx FS: %#lx GS: %#lx\n",
Frame->cs, Frame->ss, Frame->ds, Frame->es, Frame->fs, Frame->gs);
ExPrint(" Debug Registers:\n");
ExPrint(" DR0: %#lx DR1: %#lx DR2: %#lx DR3: %#lx\n",
Frame->dr0, Frame->dr1, Frame->dr2, Frame->dr3);
ExPrint(" DR6: %#lx DR7: %#lx\n", Frame->dr6, Frame->dr7);
ExPrint(" Other:\n");
ExPrint(" INT: %#lx ERR: %#lx RIP: %#lx RFLAGS: %#lx\n",
Frame->InterruptNumber, Frame->ErrorCode,
Frame->rip, Frame->rflags.raw);
ExPrint(" RSP: %#lx RBP: %#lx\n",
Frame->rsp, Frame->rbp);
ExPrint("Exception Details:\n");
switch (Frame->InterruptNumber)
{
case CPU::x86::PageFault:
{
CPU::x64::PageFaultErrorCode pfCode = {.raw = (uint32_t)Frame->ErrorCode};
ExPrint("PFEC: P:%d W:%d U:%d R:%d I:%d PK:%d SS:%d SGX:%d\n",
pfCode.P, pfCode.W, pfCode.U, pfCode.R,
pfCode.I, pfCode.PK, pfCode.SS, pfCode.SGX);
{
Memory::Virtual vmm((Memory::PageTable *)Frame->cr3);
if (vmm.GetMapType((void *)Frame->cr2) != Memory::Virtual::FourKiB)
ExPrint("Can't display page %#lx\n", Frame->cr2);
else
{
Memory::PageTableEntry *pte = vmm.GetPTE((void *)Frame->cr2);
ExPrint("Page %#lx: P:%d W:%d U:%d G:%d CoW:%d KRsv:%d NX:%d\n",
ALIGN_DOWN(Frame->cr2, 0x1000), pte->Present, pte->ReadWrite,
pte->UserSupervisor, pte->Global, pte->CopyOnWrite,
pte->KernelReserve, pte->ExecuteDisable);
}
}
ExPrint("%s", x86PageFaultDescriptions[Frame->ErrorCode & 0b111]);
if (Frame->ErrorCode & 0x8)
ExPrint("%s", x86PageFaultDescriptions[8]);
break;
}
case CPU::x86::StackSegmentFault:
case CPU::x86::GeneralProtectionFault:
{
CPU::x64::SelectorErrorCode sCode = {.raw = Frame->ErrorCode};
ExPrint("Kernel performed an illegal operation.\n");
ExPrint("External: %d\n", sCode.External);
ExPrint("Table: %d\n", sCode.Table);
ExPrint("Index: %#x\n", sCode.Idx);
break;
}
default:
ExPrint("No additional information available for this exception.\n");
break;
}
if (!TaskManager)
return;
CPUData *core = GetCurrentCPU();
Tasking::PCB *proc = core->CurrentProcess.load();
Tasking::TCB *thread = core->CurrentThread.load();
ExPrint("Exception in %s process %s(%d) thread %s(%d)\n",
proc->Security.ExecutionMode == Tasking::User ? "user" : "kernel",
proc->Name, proc->ID,
thread->Name, thread->ID);
}
arch void DisplayDetailsScreen(CPU::ExceptionFrame *Frame);
nsa void DisplayStackScreen(CPU::ExceptionFrame *Frame)
{