refactor: Fix build on i386
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Signed-off-by: EnderIce2 <enderice2@protonmail.com>
This commit is contained in:
2025-01-07 17:49:37 +02:00
parent 463d16f8bc
commit 2bb997597e
57 changed files with 1489 additions and 923 deletions

View File

@ -146,10 +146,10 @@ static_assert(sizeof(blkcnt_t) == 8, "blkcnt_t must be 64 bits");
#else
static_assert(sizeof(dev_t) == 4, "dev_t must be 32 bits");
static_assert(sizeof(ino_t) == 4, "ino_t must be 32 bits");
static_assert(sizeof(mode_t) == 2, "mode_t must be 16 bits");
static_assert(sizeof(nlink_t) == 2, "nlink_t must be 16 bits");
static_assert(sizeof(uid_t) == 2, "uid_t must be 16 bits");
static_assert(sizeof(gid_t) == 2, "gid_t must be 16 bits");
static_assert(sizeof(mode_t) == 4, "mode_t must be 32 bits");
static_assert(sizeof(nlink_t) == 4, "nlink_t must be 32 bits");
static_assert(sizeof(uid_t) == 4, "uid_t must be 32 bits");
static_assert(sizeof(gid_t) == 4, "gid_t must be 32 bits");
static_assert(sizeof(off_t) == 4, "off_t must be 32 bits");
static_assert(sizeof(time_t) == 4, "time_t must be 32 bits");
static_assert(sizeof(blksize_t) == 4, "blksize_t must be 32 bits");

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@ -75,7 +75,7 @@ extern "C"
: "dN"(Port), "a"(Data));
}
static inline uint8_t mmioin8(uint64_t Address)
static inline uint8_t mmioin8(uintptr_t Address)
{
__asm__ volatile("" ::
: "memory");
@ -85,7 +85,7 @@ extern "C"
return Result;
}
static inline uint16_t mmioin16(uint64_t Address)
static inline uint16_t mmioin16(uintptr_t Address)
{
__asm__ volatile("" ::
: "memory");
@ -95,7 +95,7 @@ extern "C"
return Result;
}
static inline uint32_t mmioin32(uint64_t Address)
static inline uint32_t mmioin32(uintptr_t Address)
{
__asm__ volatile("" ::
: "memory");
@ -105,17 +105,17 @@ extern "C"
return Result;
}
static inline uint64_t mmioin64(uint64_t Address)
static inline uintptr_t mmioin64(uintptr_t Address)
{
__asm__ volatile("" ::
: "memory");
uint64_t Result = *(volatile uint64_t *)Address;
uintptr_t Result = *(volatile uintptr_t *)Address;
__asm__ volatile("" ::
: "memory");
return Result;
}
static inline void mmioout8(uint64_t Address, uint8_t Data)
static inline void mmioout8(uintptr_t Address, uint8_t Data)
{
__asm__ volatile("" ::
: "memory");
@ -124,7 +124,7 @@ extern "C"
: "memory");
}
static inline void mmioout16(uint64_t Address, uint16_t Data)
static inline void mmioout16(uintptr_t Address, uint16_t Data)
{
__asm__ volatile("" ::
: "memory");
@ -133,7 +133,7 @@ extern "C"
: "memory");
}
static inline void mmioout32(uint64_t Address, uint32_t Data)
static inline void mmioout32(uintptr_t Address, uint32_t Data)
{
__asm__ volatile("" ::
: "memory");
@ -142,11 +142,11 @@ extern "C"
: "memory");
}
static inline void mmioout64(uint64_t Address, uint64_t Data)
static inline void mmioout64(uintptr_t Address, uintptr_t Data)
{
__asm__ volatile("" ::
: "memory");
*(volatile uint64_t *)Address = Data;
*(volatile uintptr_t *)Address = Data;
__asm__ volatile("" ::
: "memory");
}
@ -175,10 +175,10 @@ extern "C"
: "memory");
}
static inline void mmoutq(void *Address, uint64_t Value)
static inline void mmoutq(void *Address, uintptr_t Value)
{
__asm__ volatile("mov %1, %0"
: "=m"((*(uint64_t *)(Address)))
: "=m"((*(uintptr_t *)(Address)))
: "r"(Value)
: "memory");
}
@ -213,12 +213,12 @@ extern "C"
return Result;
}
static inline uint64_t mminq(void *Address)
static inline uintptr_t mminq(void *Address)
{
uint64_t Result;
uintptr_t Result;
__asm__ volatile("mov %1, %0"
: "=r"(Result)
: "m"((*(uint64_t *)(Address)))
: "m"((*(uintptr_t *)(Address)))
: "memory");
return Result;
}

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@ -33,10 +33,16 @@
static inline scarg syscall0(scarg syscall)
{
scarg ret;
#if defined(__amd64__)
__asm__ __volatile__("syscall"
: "=a"(ret)
: "a"(syscall)
: "rcx", "r11", "memory");
#elif defined(__i386__)
#warning "i386 syscall wrapper not implemented"
#else
#error "Unsupported architecture"
#endif
return ret;
}
@ -52,10 +58,16 @@ static inline scarg syscall0(scarg syscall)
static inline scarg syscall1(scarg syscall, scarg arg1)
{
scarg ret;
#if defined(__amd64__)
__asm__ __volatile__("syscall"
: "=a"(ret)
: "a"(syscall), "D"(arg1)
: "rcx", "r11", "memory");
#elif defined(__i386__)
#warning "i386 syscall wrapper not implemented"
#else
#error "Unsupported architecture"
#endif
return ret;
}
@ -72,10 +84,16 @@ static inline scarg syscall1(scarg syscall, scarg arg1)
static inline scarg syscall2(scarg syscall, scarg arg1, scarg arg2)
{
scarg ret;
#if defined(__amd64__)
__asm__ __volatile__("syscall"
: "=a"(ret)
: "a"(syscall), "D"(arg1), "S"(arg2)
: "rcx", "r11", "memory");
#elif defined(__i386__)
#warning "i386 syscall wrapper not implemented"
#else
#error "Unsupported architecture"
#endif
return ret;
}
@ -93,10 +111,16 @@ static inline scarg syscall2(scarg syscall, scarg arg1, scarg arg2)
static inline scarg syscall3(scarg syscall, scarg arg1, scarg arg2, scarg arg3)
{
scarg ret;
#if defined(__amd64__)
__asm__ __volatile__("syscall"
: "=a"(ret)
: "a"(syscall), "D"(arg1), "S"(arg2), "d"(arg3)
: "rcx", "r11", "memory");
#elif defined(__i386__)
#warning "i386 syscall wrapper not implemented"
#else
#error "Unsupported architecture"
#endif
return ret;
}
@ -115,11 +139,17 @@ static inline scarg syscall3(scarg syscall, scarg arg1, scarg arg2, scarg arg3)
static inline scarg syscall4(scarg syscall, scarg arg1, scarg arg2, scarg arg3, scarg arg4)
{
scarg ret;
#if defined(__amd64__)
register scarg r10 __asm__("r10") = arg4;
__asm__ __volatile__("syscall"
: "=a"(ret)
: "a"(syscall), "D"(arg1), "S"(arg2), "d"(arg3), "r"(r10)
: "rcx", "r11", "memory");
#elif defined(__i386__)
#warning "i386 syscall wrapper not implemented"
#else
#error "Unsupported architecture"
#endif
return ret;
}
@ -139,12 +169,18 @@ static inline scarg syscall4(scarg syscall, scarg arg1, scarg arg2, scarg arg3,
static inline scarg syscall5(scarg syscall, scarg arg1, scarg arg2, scarg arg3, scarg arg4, scarg arg5)
{
scarg ret;
#if defined(__amd64__)
register scarg r10 __asm__("r10") = arg4;
register scarg r8 __asm__("r8") = arg5;
__asm__ __volatile__("syscall"
: "=a"(ret)
: "a"(syscall), "D"(arg1), "S"(arg2), "d"(arg3), "r"(r10), "r"(r8)
: "rcx", "r11", "memory");
#elif defined(__i386__)
#warning "i386 syscall wrapper not implemented"
#else
#error "Unsupported architecture"
#endif
return ret;
}
@ -165,6 +201,7 @@ static inline scarg syscall5(scarg syscall, scarg arg1, scarg arg2, scarg arg3,
static inline scarg syscall6(scarg syscall, scarg arg1, scarg arg2, scarg arg3, scarg arg4, scarg arg5, scarg arg6)
{
scarg ret;
#if defined(__amd64__)
register scarg r10 __asm__("r10") = arg4;
register scarg r8 __asm__("r8") = arg5;
register scarg r9 __asm__("r9") = arg6;
@ -172,6 +209,11 @@ static inline scarg syscall6(scarg syscall, scarg arg1, scarg arg2, scarg arg3,
: "=a"(ret)
: "a"(syscall), "D"(arg1), "S"(arg2), "d"(arg3), "r"(r10), "r"(r8), "r"(r9)
: "rcx", "r11", "memory");
#elif defined(__i386__)
#warning "i386 syscall wrapper not implemented"
#else
#error "Unsupported architecture"
#endif
return ret;
}

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@ -71,7 +71,7 @@ typedef uint32_t uid_t;
typedef uint32_t gid_t;
typedef int64_t clock_t;
typedef int32_t pid_t;
#elif defined(__LP32__)
#else
typedef int32_t off_t;
typedef long long off64_t;
typedef __INT32_TYPE__ mode_t;

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@ -107,6 +107,8 @@ typedef struct
#define MESSAGE_RECV_PAYLOAD ToMsg(MSG_RECVPAYLOAD)
#define MESSAGE_RECV_STATUS ToMsg(MSG_RECVSTATUS)
#if defined(__amd64__)
#define VM_PORT(cmd, in_ebx, isi, idi, \
flags, magic, \
ax, bx, cx, dx, si, di) \
@ -169,6 +171,23 @@ typedef struct
"D"(idi), \
"r"(bp) : "memory", "cc")
#elif defined(__i386__)
#define VM_PORT(cmd, in_ebx, isi, idi, \
flags, magic, \
ax, bx, cx, dx, si, di)
#define VM_PORT_HB_OUT(cmd, in_ecx, isi, idi, \
flags, \
magic, bp, ax, \
bx, cx, dx, si, di)
#define VM_PORT_HB_IN(cmd, in_ecx, isi, idi, \
flags, magic, bp, \
ax, bx, cx, dx, si, di)
#endif
/* TODO:
- use vmcall or vmmcall instead of "out" and "in" if available
*/