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326 lines
6.5 KiB
C++
326 lines
6.5 KiB
C++
#ifndef __FENNIX_API_AC97_H__
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#define __FENNIX_API_AC97_H__
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#include <types.h>
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#include <pci.h>
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#include <io.h>
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#define DescriptorListLength 0x20
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enum AudioVolumeValues
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{
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AV_Maximum = 0x0,
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AV_Minimum = 0x3F,
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};
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enum AudioEncodingValues
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{
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AE_PCMs8,
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AE_PCMu8,
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AE_PCMs16le,
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AE_PCMs20le,
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AE_PCMs24le,
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AE_PCMs32le,
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AE_PCMu16le,
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AE_PCMu20le,
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AE_PCMu24le,
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AE_PCMu32le,
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AE_PCMs16be,
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AE_PCMs20be,
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AE_PCMs24be,
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AE_PCMs32be,
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AE_PCMu16be,
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AE_PCMu20be,
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AE_PCMu24be,
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AE_PCMu32be,
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};
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enum NativeAudioMixerRegisters
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{
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/**
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* @brief Reset Register
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* @note Length: word
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*/
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NAM_Reset = 0x00,
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/**
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* @brief Master Volume Register
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* @note Length: word
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*/
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NAM_MasterVolume = 0x02,
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/**
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* @brief Microphone Volume Register
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* @note Length: word
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*/
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NAM_MicrophoneVolume = 0x0E,
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/**
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* @brief PCM Out Volume Register
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* @note Length: word
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*/
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NAM_PCMOutVolume = 0x18,
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/**
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* @brief Select Record Input Register
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* @note Length: word
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*/
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NAM_SelectRecordInput = 0x1A,
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/**
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* @brief Record Gain Register
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* @note Length: word
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*/
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NAM_RecordGain = 0x1C,
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/**
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* @brief Record Gain Microphone Register
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* @note Length: word
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*/
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NAM_RecordGainMicrophone = 0x1E,
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};
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enum NativeAudioBusMasterRegisters
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{
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/**
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* @brief Register box for PCM IN
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* @note Length: below
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*/
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NABM_PCMInBox = 0x00,
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/**
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* @brief Register box for PCM OUT
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* @note Length: below
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*/
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NABM_PCMOutBox = 0x10,
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/**
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* @brief Register box for Microphone
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* @note Length: below
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*/
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NABM_MicrophoneBox = 0x20,
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/**
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* @brief Global Control Register
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* @note Length: dword
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*/
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NABM_GlobalControl = 0x2C, /* 0x30 */
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/**
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* @brief Global Status Register
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* @note Length: dword
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*/
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NABM_GlobalStatus = 0x30, /* 0x34 */
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};
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enum NativeAudioBusMasterBoxOffsets
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{
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/**
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* @brief Physical Address of Buffer Descriptor List
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* @note Length: dword
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*/
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NABMBOFF_BufferDescriptorList = 0x00,
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/**
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* @brief Number of Actual Processed Buffer Descriptor Entry
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* @note Length: byte
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*/
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NABMBOFF_BufferDescriptorEntry = 0x04,
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/**
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* @brief Number of all Descriptor Entries
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* @note Length: byte
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*/
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NABMBOFF_DescriptorEntries = 0x05,
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/**
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* @brief Status of transferring Data
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* @note Length: word
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*/
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NABMBOFF_Status = 0x06,
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/**
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* @brief Number of transferred Samples in Actual Processed Entry
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* @note Length: word
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*/
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NABMBOFF_TransferredSamples = 0x08,
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/**
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* @brief Number of next processed Buffer Entry
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* @note Length: byte
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*/
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NABMBOFF_NextProcessedBufferEntry = 0x0A,
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/**
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* @brief Transfer Control
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* @note Length: byte
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*/
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NABMBOFF_TransferControl = 0x0B,
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};
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enum OutputPulseCodeModulationRegisters
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{
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/**
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* @brief Physical Address of Buffer Descriptor List
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* @note Length: dword
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*/
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PCMOUT_BufferDescriptorList = (int)NABM_PCMOutBox + (int)NABMBOFF_BufferDescriptorList,
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/**
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* @brief Number of Actual Processed Buffer Descriptor Entry
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* @note Length: byte
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*/
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PCMOUT_BufferDescriptorEntry = (int)NABM_PCMOutBox + (int)NABMBOFF_BufferDescriptorEntry,
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/**
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* @brief Number of all Descriptor Entries
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* @note Length: byte
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*/
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PCMOUT_DescriptorEntries = (int)NABM_PCMOutBox + (int)NABMBOFF_DescriptorEntries,
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/**
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* @brief Status of transferring Data
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* @note Length: word
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*/
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PCMOUT_Status = (int)NABM_PCMOutBox + (int)NABMBOFF_Status,
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/**
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* @brief Number of transferred Samples in Actual Processed Entry
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* @note Length: word
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*/
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PCMOUT_TransferredSamples = (int)NABM_PCMOutBox + (int)NABMBOFF_TransferredSamples,
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/**
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* @brief Number of next processed Buffer Entry
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* @note Length: byte
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*/
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PCMOUT_NextProcessedBufferEntry = (int)NABM_PCMOutBox + (int)NABMBOFF_NextProcessedBufferEntry,
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/**
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* @brief Transfer Control
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* @note Length: byte
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*/
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PCMOUT_TransferControl = (int)NABM_PCMOutBox + (int)NABMBOFF_TransferControl,
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};
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enum TransferControlRegisters
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{
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/**
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* @brief DMA controller control
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* 0 = Pause transfer
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* 1 = Transfer sound data
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*/
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TC_DMAControllerControl = 0x01,
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/**
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* @brief Reset
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* 0 = Remove reset condition
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* 1 = Reset this NABM register box, this bit is cleared by card when is reset complete
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*/
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TC_TransferReset = 0x02,
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/**
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* @brief Last Buffer Entry Interrupt enable
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* 0 = Disable interrupt
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* 1 = Enable interrupt
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*/
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TC_LastBufferEntryInterruptEnable = 0x04,
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/**
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* @brief IOC Interrupt enable
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* 0 = Disable interrupt
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* 1 = Enable interrupt
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*/
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TC_IOCInterruptEnable = 0x08,
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/**
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* @brief Fifo ERROR Interrupt enable
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* 0 = Disable interrupt
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* 1 = Enable interrupt
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*/
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TC_FifoERRORInterruptEnable = 0x10,
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};
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enum GlobalControlRegisters
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{
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/**
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* @brief Global Interrupt Enable
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* 0 = Disable Interrupts
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* 1 = Enable Interrupts
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*/
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GC_GlobalInterruptEnable = 0x01,
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/**
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* @brief Cold reset
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* 0 = Device is in reset and can not be used
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* 1 = Resume to operational state
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*/
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GC_ColdReset = 0x02,
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/**
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* @brief Warm reset
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*/
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GC_WarmReset = 0x04,
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/**
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* @brief Shut down
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* 0 = Device is powered
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* 1 = Shut down
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*/
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GC_ShutDown = 0x08,
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/**
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* @brief Channels for PCM Output
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* 00 = 2 channels
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* 01 = 4 channels
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* 10 = 6 channels
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* 11 = Reserved
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*/
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GC_ChannelsForPCMOutput = 0x30,
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/**
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* @brief PCM Output mode
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* 00 = 16 bit samples
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* 01 = 20 bit samples
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*/
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GC_PCMOutputMode = 0xC0,
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};
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struct BufferDescriptorList
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{
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/**
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* @brief Physical Address to sound data in memory
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* @note Length: dword
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*/
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uint32_t Address;
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/**
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* @brief Number of samples in this buffer
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* @note Length: word
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*/
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uint16_t SampleCount;
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/**
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* @brief Flags
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* @note Length: word
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*
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* Bit 15 = Interrupt fired when data from this entry is transferred
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* Bit 14 = Last entry of buffer, stop playing
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* Other bits = Reserved
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*/
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uint16_t Flags;
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} __attribute__((packed));
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struct BARData
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{
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uint8_t Type;
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uint64_t MixerAddress;
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uint64_t BusMasterAddress;
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};
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#endif // !__FENNIX_API_AC97_H__
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