mirror of
https://github.com/Fennix-Project/Drivers.git
synced 2025-05-27 15:04:28 +00:00
535 lines
14 KiB
C++
535 lines
14 KiB
C++
#include <netools.h>
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#include <pci.h>
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#include <io.h>
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#include "../../../Kernel/DAPI.hpp"
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#include "../../../Kernel/Fex.hpp"
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extern "C" int DriverEntry(void *Data);
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int CallbackHandler(KernelCallback *Data);
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HEAD(FexFormatType_Driver, FexOSType_Fennix, DriverEntry);
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#pragma GCC diagnostic ignored "-Wmissing-field-initializers"
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__attribute__((section(".extended"))) FexExtended ExtendedHeader = {
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.Driver = {
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.Name = "Intel Gigabit Ethernet Controller",
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.Type = FexDriverType_Network,
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.Callback = CallbackHandler,
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.Bind = {
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.Type = BIND_PCI,
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.PCI = {
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.VendorID = {0x8086},
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.DeviceID = {0x100E, 0x100F, 0x10D3, 0x10EA, 0x153A},
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.Class = 0x2,
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.SubClass = 0x0,
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.ProgIF = 0x0,
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}}}};
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KernelAPI *KAPI;
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#define print(msg) KAPI->Util.DebugPrint((char *)(msg), KAPI->Info.DriverUID)
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/* --------------------------------------------------------------------------------------------------------- */
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enum REG
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{
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CTRL = 0x0000,
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STATUS = 0x0008,
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ICR = 0x000C,
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EEPROM = 0x0014,
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CTRL_EXT = 0x0018,
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ITR = 0x00C4,
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IMASK = 0x00D0,
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IAM = 0x00D8,
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RCTRL = 0x0100,
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RXDESCLO = 0x2800,
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RXDESCHI = 0x2804,
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RXDESCLEN = 0x2808,
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RXDESCHEAD = 0x2810,
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RXDESCTAIL = 0x2818,
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TCTRL = 0x0400,
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TXDESCLO = 0x3800,
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TXDESCHI = 0x3804,
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TXDESCLEN = 0x3808,
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TXDESCHEAD = 0x3810,
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TXDESCTAIL = 0x3818,
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RDTR = 0x2820,
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RXDCTL = 0x3828,
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RADV = 0x282C,
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RSRPD = 0x2C00,
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TIPG = 0x0410
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};
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enum PCTRL
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{
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RESERVED = 0b000000, // bits 5:0
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SPEED_SELECTION_MSB = 0b010000, // bit 6
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UPDATE_COLLISION_TEST = 0b001000, // bit 7
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DUPLEX_MODE = 0b000100, // bit 8
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RESTART_AUTO_NEGOTIATION = 0b000010, // bit 9
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ISOLATE = 0b000001, // bit 10
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POWER_DOWN = 0b100000, // bit 11
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SPEED_SELECTION_LSB = 0b100000, // bit 13
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};
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enum ECTRL
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{
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SLU = 0x40
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};
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enum RTCL
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{
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RDMTS_HALF = (0 << 8),
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RDMTS_QUARTER = (1 << 8),
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RDMTS_EIGHTH = (2 << 8)
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};
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enum RCTL
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{
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EN = (1 << 1),
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SBP = (1 << 2),
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UPE = (1 << 3),
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MPE = (1 << 4),
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LPE = (1 << 5),
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LBM_NONE = (0 << 6),
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LBM_PHY = (3 << 6),
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MO_36 = (0 << 12),
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MO_35 = (1 << 12),
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MO_34 = (2 << 12),
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MO_32 = (3 << 12),
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BAM = (1 << 15),
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VFE = (1 << 18),
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CFIEN = (1 << 19),
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CFI = (1 << 20),
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DPF = (1 << 22),
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PMCF = (1 << 23),
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SECRC = (1 << 26),
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BSIZE_256 = (3 << 16),
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BSIZE_512 = (2 << 16),
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BSIZE_1024 = (1 << 16),
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BSIZE_2048 = (0 << 16),
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BSIZE_4096 = ((3 << 16) | (1 << 25)),
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BSIZE_8192 = ((2 << 16) | (1 << 25)),
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BSIZE_16384 = ((1 << 16) | (1 << 25))
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};
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enum CMD
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{
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EOP = (1 << 0),
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IFCS = (1 << 1),
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IC = (1 << 2),
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RS = (1 << 3),
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RPS = (1 << 4),
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VLE = (1 << 6),
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IDE = (1 << 7)
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};
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enum TCTL
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{
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EN_ = (1 << 1),
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PSP = (1 << 3),
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CT_SHIFT = 4,
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COLD_SHIFT = 12,
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SWXOFF = (1 << 22),
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RTLC = (1 << 24)
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};
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enum TSTA
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{
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DD = (1 << 0),
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EC = (1 << 1),
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LC = (1 << 2)
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};
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enum LSTA
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{
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LSTA_TU = (1 << 3)
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};
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struct RXDescriptor
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{
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volatile uint64_t Address;
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volatile uint16_t Length;
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volatile uint16_t Checksum;
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volatile uint8_t Status;
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volatile uint8_t Errors;
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volatile uint16_t Special;
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} __attribute__((packed));
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struct TXDescriptor
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{
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volatile uint64_t Address;
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volatile uint16_t Length;
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volatile uint8_t cso;
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volatile uint8_t Command;
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volatile uint8_t Status;
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volatile uint8_t css;
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volatile uint16_t Special;
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} __attribute__((packed));
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struct BARData
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{
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uint8_t Type;
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uint64_t IOBase;
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uint64_t MemoryBase;
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};
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PCIDeviceHeader *PCIBaseAddress;
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uint32_t CurrentPacket;
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BARData BAR;
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bool EEPROMAvailable;
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#define E1000_NUM_RX_DESC 32
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#define E1000_NUM_TX_DESC 8
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uint16_t RXCurrent;
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uint16_t TXCurrent;
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RXDescriptor *RX[E1000_NUM_RX_DESC];
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TXDescriptor *TX[E1000_NUM_TX_DESC];
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MediaAccessControl MAC;
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InternetProtocol4 IP;
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void OutCMD(uint16_t Address, uint32_t Value)
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{
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if (BAR.Type == 0)
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mmioout32(BAR.MemoryBase + Address, Value);
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else
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{
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outportl(BAR.IOBase, Address);
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outportl(BAR.IOBase + 4, Value);
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}
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}
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uint32_t InCMD(uint16_t Address)
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{
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if (BAR.Type == 0)
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return mmioin32(BAR.MemoryBase + Address);
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else
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{
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outportl(BAR.IOBase, Address);
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return inportl(BAR.IOBase + 0x4);
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}
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}
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uint32_t ReadEEPROM(uint8_t Address)
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{
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uint16_t Data = 0;
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uint32_t temp = 0;
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if (EEPROMAvailable)
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{
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OutCMD(REG::EEPROM, (1) | ((uint32_t)(Address) << 8));
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while (!((temp = InCMD(REG::EEPROM)) & (1 << 4)))
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;
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}
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else
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{
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OutCMD(REG::EEPROM, (1) | ((uint32_t)(Address) << 2));
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while (!((temp = InCMD(REG::EEPROM)) & (1 << 1)))
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;
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}
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Data = (uint16_t)((temp >> 16) & 0xFFFF);
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return Data;
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}
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MediaAccessControl GetMAC()
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{
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MediaAccessControl mac;
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if (EEPROMAvailable)
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{
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uint32_t temp;
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temp = ReadEEPROM(0);
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mac.Address[0] = temp & 0xff;
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mac.Address[1] = temp >> 8;
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temp = ReadEEPROM(1);
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mac.Address[2] = temp & 0xff;
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mac.Address[3] = temp >> 8;
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temp = ReadEEPROM(2);
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mac.Address[4] = temp & 0xff;
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mac.Address[5] = temp >> 8;
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}
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else
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{
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uint8_t *BaseMac8 = (uint8_t *)(BAR.MemoryBase + 0x5400);
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uint32_t *BaseMac32 = (uint32_t *)(BAR.MemoryBase + 0x5400);
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if (BaseMac32[0] != 0)
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for (int i = 0; i < 6; i++)
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mac.Address[i] = BaseMac8[i];
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else
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{
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print("No MAC address found.");
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return MediaAccessControl();
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}
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}
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return mac;
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}
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void InitializeRX()
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{
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print("Initializing RX...");
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uint8_t *Ptr = (uint8_t *)KAPI->Memory.RequestPage((((sizeof(RXDescriptor) * E1000_NUM_RX_DESC + 16)) / KAPI->Memory.PageSize) + 1);
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RXDescriptor *Descriptor = (RXDescriptor *)Ptr;
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for (int i = 0; i < E1000_NUM_RX_DESC; i++)
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{
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RX[i] = (RXDescriptor *)((uint8_t *)Descriptor + i * 16);
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RX[i]->Address = (uint64_t)(uint8_t *)KAPI->Memory.RequestPage(((8192 + 16) / KAPI->Memory.PageSize) + 1);
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RX[i]->Status = 0;
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}
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OutCMD(REG::TXDESCLO, (uint32_t)((uint64_t)Ptr >> 32));
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OutCMD(REG::TXDESCHI, (uint32_t)((uint64_t)Ptr & 0xFFFFFFFF));
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OutCMD(REG::RXDESCLO, (uint64_t)Ptr);
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OutCMD(REG::RXDESCHI, 0);
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OutCMD(REG::RXDESCLEN, E1000_NUM_RX_DESC * 16);
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OutCMD(REG::RXDESCHEAD, 0);
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OutCMD(REG::RXDESCTAIL, E1000_NUM_RX_DESC - 1);
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RXCurrent = 0;
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OutCMD(REG::RCTRL, RCTL::EN | RCTL::SBP | RCTL::UPE | RCTL::MPE | RCTL::LBM_NONE | RTCL::RDMTS_HALF | RCTL::BAM | RCTL::SECRC | RCTL::BSIZE_8192);
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}
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void InitializeTX()
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{
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print("Initializing TX...");
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uint8_t *Ptr = (uint8_t *)KAPI->Memory.RequestPage(((sizeof(TXDescriptor) * E1000_NUM_RX_DESC + 16) / KAPI->Memory.PageSize) + 1);
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TXDescriptor *Descriptor = (TXDescriptor *)Ptr;
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for (int i = 0; i < E1000_NUM_TX_DESC; i++)
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{
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TX[i] = (TXDescriptor *)((uint8_t *)Descriptor + i * 16);
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TX[i]->Address = 0;
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TX[i]->Command = 0;
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TX[i]->Status = TSTA::DD;
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}
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OutCMD(REG::TXDESCHI, (uint32_t)((uint64_t)Ptr >> 32));
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OutCMD(REG::TXDESCLO, (uint32_t)((uint64_t)Ptr & 0xFFFFFFFF));
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OutCMD(REG::TXDESCLEN, E1000_NUM_TX_DESC * 16);
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OutCMD(REG::TXDESCHEAD, 0);
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OutCMD(REG::TXDESCTAIL, 0);
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TXCurrent = 0;
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OutCMD(REG::TCTRL, TCTL::EN_ | TCTL::PSP | (15 << TCTL::CT_SHIFT) | (64 << TCTL::COLD_SHIFT) | TCTL::RTLC);
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OutCMD(REG::TCTRL, 0b0110000000000111111000011111010);
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OutCMD(REG::TIPG, 0x0060200A);
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}
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int DriverEntry(void *Data)
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{
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if (!Data)
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return INVALID_KERNEL_API;
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KAPI = (KernelAPI *)Data;
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if (KAPI->Version.Major < 0 || KAPI->Version.Minor < 0 || KAPI->Version.Patch < 0)
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return KERNEL_API_VERSION_NOT_SUPPORTED;
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return OK;
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}
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int CallbackHandler(KernelCallback *Data)
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{
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switch (Data->Reason)
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{
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case AcknowledgeReason:
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{
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print("Kernel acknowledged the driver.");
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break;
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}
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case ConfigurationReason:
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{
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print("Kernel received configuration data.");
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PCIBaseAddress = reinterpret_cast<PCIDeviceHeader *>(Data->RawPtr);
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switch (PCIBaseAddress->DeviceID)
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{
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case 0x100E:
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{
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print("Found Intel 82540EM Gigabit Ethernet Controller.");
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PCIBaseAddress->Command |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
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uint32_t PCIBAR0 = ((PCIHeader0 *)PCIBaseAddress)->BAR0;
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uint32_t PCIBAR1 = ((PCIHeader0 *)PCIBaseAddress)->BAR1;
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BAR.Type = PCIBAR0 & 1;
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BAR.IOBase = PCIBAR1 & (~3);
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BAR.MemoryBase = PCIBAR0 & (~15);
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// Detect EEPROM
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OutCMD(REG::EEPROM, 0x1);
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for (int i = 0; i < 1000 && !EEPROMAvailable; i++)
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if (InCMD(REG::EEPROM) & 0x10)
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EEPROMAvailable = true;
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else
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EEPROMAvailable = false;
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// Get MAC address
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if (!GetMAC().Valid())
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return NOT_AVAILABLE;
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else
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print("MAC address found.");
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MAC = GetMAC();
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// Start link
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uint32_t cmdret = InCMD(REG::CTRL);
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OutCMD(REG::CTRL, cmdret | ECTRL::SLU);
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for (int i = 0; i < 0x80; i++)
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OutCMD(0x5200 + i * 4, 0);
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OutCMD(REG::IMASK, 0x1F6DC);
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OutCMD(REG::IMASK, 0xFF & ~4);
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InCMD(0xC0);
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InitializeRX();
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InitializeTX();
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return OK;
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}
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case 0x100F:
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{
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print("Found Intel 82545EM Gigabit Ethernet Controller.");
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PCIBaseAddress->Command |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
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uint32_t PCIBAR0 = ((PCIHeader0 *)PCIBaseAddress)->BAR0;
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uint32_t PCIBAR1 = ((PCIHeader0 *)PCIBaseAddress)->BAR1;
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BAR.Type = PCIBAR0 & 1;
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BAR.IOBase = PCIBAR1 & (~3);
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BAR.MemoryBase = PCIBAR0 & (~15);
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// Detect EEPROM
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OutCMD(REG::EEPROM, 0x1);
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for (int i = 0; i < 1000 && !EEPROMAvailable; i++)
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if (InCMD(REG::EEPROM) & 0x10)
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EEPROMAvailable = true;
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else
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EEPROMAvailable = false;
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// Get MAC address
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if (!GetMAC().Valid())
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return NOT_AVAILABLE;
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else
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print("MAC address found.");
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MAC = GetMAC();
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return NOT_IMPLEMENTED;
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}
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case 0x10D3:
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{
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print("Found Intel 82574L Gigabit Ethernet Controller.");
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PCIBaseAddress->Command |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
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uint32_t PCIBAR0 = ((PCIHeader0 *)PCIBaseAddress)->BAR0;
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uint32_t PCIBAR1 = ((PCIHeader0 *)PCIBaseAddress)->BAR1;
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BAR.Type = PCIBAR0 & 1;
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BAR.IOBase = PCIBAR1 & (~3);
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BAR.MemoryBase = PCIBAR0 & (~15);
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// Detect EEPROM
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OutCMD(REG::EEPROM, 0x1);
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for (int i = 0; i < 1000 && !EEPROMAvailable; i++)
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if (InCMD(REG::EEPROM) & 0x10)
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EEPROMAvailable = true;
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else
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EEPROMAvailable = false;
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// Get MAC address
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if (!GetMAC().Valid())
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return NOT_AVAILABLE;
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else
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print("MAC address found.");
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MAC = GetMAC();
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return NOT_IMPLEMENTED;
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}
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case 0x10EA:
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{
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print("Found Intel I217-LM Gigabit Ethernet Controller.");
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return NOT_IMPLEMENTED;
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}
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case 0x153A:
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{
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print("Found Intel 82577LM Gigabit Ethernet Controller.");
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return NOT_IMPLEMENTED;
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}
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default:
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{
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print("Unsupported Intel Ethernet Controller.");
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return DEVICE_NOT_SUPPORTED;
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}
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}
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return ERROR;
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}
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case FetchReason:
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{
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KAPI->Util.memcpy(Data->NetworkCallback.Fetch.Name, (void *)"Intel Gigabit Ethernet Controller", 42);
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Data->NetworkCallback.Fetch.MAC = MAC.ToHex();
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break;
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}
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case InterruptReason:
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{
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OutCMD(REG::IMASK, 0x1);
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uint32_t status = InCMD(0xC0);
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UNUSED(status);
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while ((RX[RXCurrent]->Status & 0x1))
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{
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uint8_t *Data = (uint8_t *)RX[RXCurrent]->Address;
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uint16_t DataLength = RX[RXCurrent]->Length;
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KAPI->Command.Network.ReceivePacket(KAPI->Info.DriverUID, Data, DataLength);
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RX[RXCurrent]->Status = 0;
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uint16_t OldRXCurrent = RXCurrent;
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RXCurrent = (RXCurrent + 1) % E1000_NUM_RX_DESC;
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OutCMD(REG::RXDESCTAIL, OldRXCurrent);
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}
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break;
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}
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case SendReason:
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{
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TX[TXCurrent]->Address = (uint64_t)Data->NetworkCallback.Send.Data;
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TX[TXCurrent]->Length = Data->NetworkCallback.Send.Length;
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TX[TXCurrent]->Command = CMD::EOP | CMD::IFCS | CMD::RS;
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TX[TXCurrent]->Status = 0;
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uint8_t OldTXCurrent = TXCurrent;
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TXCurrent = (TXCurrent + 1) % E1000_NUM_TX_DESC;
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OutCMD(REG::TXDESCTAIL, TXCurrent);
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while (!(TX[OldTXCurrent]->Status & 0xFF))
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;
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break;
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}
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case StopReason:
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{
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// Clearing Enable bit in Receive Control Register
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uint64_t cmdret = InCMD(REG::RCTRL);
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OutCMD(REG::RCTRL, cmdret & ~RCTL::EN);
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// Masking Interrupt Mask, Interrupt Throttling Rate & Interrupt Auto-Mask
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OutCMD(REG::IMASK, 0x00000000);
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OutCMD(REG::ITR, 0x00000000);
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OutCMD(REG::IAM, 0x00000000);
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// Clearing SLU bit in Device Control Register
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cmdret = InCMD(REG::CTRL);
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OutCMD(REG::CTRL, cmdret & ~ECTRL::SLU);
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// Clear the Interrupt Cause Read register by reading it
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InCMD(REG::ICR);
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// Powering down the device (?)
|
|
OutCMD(REG::CTRL, PCTRL::POWER_DOWN);
|
|
/* TODO: Stop link; further testing required */
|
|
print("Driver stopped.");
|
|
break;
|
|
}
|
|
default:
|
|
{
|
|
print("Unknown reason.");
|
|
break;
|
|
}
|
|
}
|
|
return OK;
|
|
}
|