mirror of
https://github.com/Fennix-Project/Drivers.git
synced 2025-07-10 22:59:25 +00:00
Update drivers
This commit is contained in:
7
storage/Makefile
Normal file
7
storage/Makefile
Normal file
@ -0,0 +1,7 @@
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build:
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make -C ahci build
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make -C ata build
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clean:
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make -C ahci clean
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make -C ata clean
|
83
storage/ahci/Makefile
Normal file
83
storage/ahci/Makefile
Normal file
@ -0,0 +1,83 @@
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# Config file
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include ../../../Makefile.conf
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FILENAME = ahci.drv
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CC = ../../../$(COMPILER_PATH)/$(COMPILER_ARCH)gcc
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CPP = ../../../$(COMPILER_PATH)/$(COMPILER_ARCH)g++
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LD = ../../../$(COMPILER_PATH)/$(COMPILER_ARCH)ld
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AS = ../../../$(COMPILER_PATH)/$(COMPILER_ARCH)as
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OBJDUMP = ../../../$(COMPILER_PATH)/$(COMPILER_ARCH)objdump
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S_SOURCES = $(shell find ./ -type f -name '*.S')
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C_SOURCES = $(shell find ./ -type f -name '*.c')
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CPP_SOURCES = $(shell find ./ -type f -name '*.cpp')
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HEADERS = $(sort $(dir $(wildcard ../../include/*)))
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OBJ = $(C_SOURCES:.c=.o) $(CPP_SOURCES:.cpp=.o) $(ASM_SOURCES:.asm=.o) $(S_SOURCES:.S=.o) $(PSF_SOURCES:.psf=.o) $(BMP_SOURCES:.bmp=.o)
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STACK_USAGE_OBJ = $(C_SOURCES:.c=.su) $(CPP_SOURCES:.cpp=.su)
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INCLUDE_DIR = ../../include
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LIBS := ../../out/dcrt0.o -L../../out -ldriver
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LDFLAGS := \
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-fPIC -fPIE -pie \
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-Wl,--no-dynamic-linker,-ztext,--no-warn-rwx-segment \
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-nostdlib -nodefaultlibs -nolibc \
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-zmax-page-size=0x1000 \
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-Wl,-Map file.map -shared -fvisibility=hidden
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WARNCFLAG = -Wall -Wextra
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CFLAGS := -I$(INCLUDE_DIR) -fvisibility=hidden
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ifeq ($(OSARCH), amd64)
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CFLAGS += -fPIC -fPIE -pie -mno-80387 -mno-mmx -mno-3dnow \
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-mno-red-zone -mno-sse -mno-sse2 \
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-march=x86-64 -pipe -ffunction-sections \
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-msoft-float -fno-builtin
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else ifeq ($(OSARCH), i386)
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CFLAGS += -fPIC -fPIE -pie -mno-80387 -mno-mmx -mno-3dnow \
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-mno-red-zone -mno-sse -mno-sse2 -ffunction-sections \
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-march=i386 -pipe -msoft-float -fno-builtin
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else ifeq ($(OSARCH), aarch64)
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CFLAGS += -pipe -fno-builtin -fPIC
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endif
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ifeq ($(DEBUG), 1)
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CFLAGS += -DDEBUG -ggdb3 -O0 -fdiagnostics-color=always -fstack-usage
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ifeq ($(OSARCH), amd64)
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CFLAGS += -fverbose-asm
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endif
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ifneq ($(OSARCH), aarch64)
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CFLAGS += -fstack-check
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endif
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LDFLAGS += -ggdb3 -O0
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endif
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build: $(FILENAME)
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mv $(FILENAME) ../../out/$(FILENAME)
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$(FILENAME): $(OBJ)
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$(info Linking $@)
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$(CC) $(LDFLAGS) $(OBJ) $(LIBS) -o $@
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%.o: %.c $(HEADERS)
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$(info Compiling $<)
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$(CC) $(CFLAGS) $(WARNCFLAG) -std=c17 -c $< -o $@
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%.o: %.cpp $(HEADERS)
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$(info Compiling $<)
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$(CPP) $(CFLAGS) $(WARNCFLAG) -std=c++20 -fno-exceptions -fno-rtti -c $< -o $@
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%.o: %.S
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$(info Compiling $<)
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$(AS) -o $@ $<
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clean:
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rm -f file.map $(OBJ) $(STACK_USAGE_OBJ)
|
517
storage/ahci/ahci.cpp
Normal file
517
storage/ahci/ahci.cpp
Normal file
@ -0,0 +1,517 @@
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/*
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This file is part of Fennix Drivers.
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Fennix Drivers is free software: you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation, either version 3 of
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the License, or (at your option) any later version.
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Fennix Drivers is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
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||||
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||||
You should have received a copy of the GNU General Public License
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||||
along with Fennix Drivers. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include <errno.h>
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#include <block.h>
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#include <regs.h>
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#include <base.h>
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#include <pci.h>
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#define ATA_DEV_BUSY 0x80
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#define ATA_DEV_DRQ 0x08
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#define ATA_CMD_WRITE_DMA_EX 0x35
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#define ATA_CMD_READ_DMA_EX 0x25
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#define HBA_PxIS_TFES (1 << 30)
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#define HBA_PORT_DEV_PRESENT 0x3
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#define HBA_PORT_IPM_ACTIVE 0x1
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#define SATA_SIG_ATAPI 0xEB140101
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#define SATA_SIG_ATA 0x00000101
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#define SATA_SIG_SEMB 0xC33C0101
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#define SATA_SIG_PM 0x96690101
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#define HBA_PxCMD_CR 0x8000
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#define HBA_PxCMD_FRE 0x0010
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#define HBA_PxCMD_ST 0x0001
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#define HBA_PxCMD_FR 0x4000
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enum PortType
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{
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None = 0,
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SATA = 1,
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SEMB = 2,
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PM = 3,
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SATAPI = 4,
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};
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enum FIS_TYPE
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{
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FIS_TYPE_REG_H2D = 0x27,
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FIS_TYPE_REG_D2H = 0x34,
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FIS_TYPE_DMA_ACT = 0x39,
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FIS_TYPE_DMA_SETUP = 0x41,
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FIS_TYPE_DATA = 0x46,
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FIS_TYPE_BIST = 0x58,
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FIS_TYPE_PIO_SETUP = 0x5F,
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FIS_TYPE_DEV_BITS = 0xA1,
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};
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struct HBAPort
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{
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uint32_t CommandListBase;
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uint32_t CommandListBaseUpper;
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uint32_t FISBaseAddress;
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uint32_t FISBaseAddressUpper;
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uint32_t InterruptStatus;
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uint32_t InterruptEnable;
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uint32_t CommandStatus;
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uint32_t Reserved0;
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uint32_t TaskFileData;
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uint32_t Signature;
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uint32_t SataStatus;
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uint32_t SataControl;
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uint32_t SataError;
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uint32_t SataActive;
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uint32_t CommandIssue;
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uint32_t SataNotification;
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uint32_t FISSwitchControl;
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uint32_t Reserved1[11];
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uint32_t Vendor[4];
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};
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struct HBAMemory
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{
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uint32_t HostCapability;
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uint32_t GlobalHostControl;
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uint32_t InterruptStatus;
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uint32_t PortsImplemented;
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uint32_t Version;
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uint32_t CCCControl;
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uint32_t CCCPorts;
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uint32_t EnclosureManagementLocation;
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uint32_t EnclosureManagementControl;
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uint32_t HostCapabilitiesExtended;
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uint32_t BIOSHandoffControlStatus;
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uint8_t Reserved0[0x74];
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uint8_t Vendor[0x60];
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HBAPort Ports[1];
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};
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struct HBACommandHeader
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{
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uint8_t CommandFISLength : 5;
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uint8_t ATAPI : 1;
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uint8_t Write : 1;
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uint8_t Preferable : 1;
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uint8_t Reset : 1;
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uint8_t BIST : 1;
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uint8_t ClearBusy : 1;
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uint8_t Reserved0 : 1;
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uint8_t PortMultiplier : 4;
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uint16_t PRDTLength;
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uint32_t PRDBCount;
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uint32_t CommandTableBaseAddress;
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uint32_t CommandTableBaseAddressUpper;
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uint32_t Reserved1[4];
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};
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struct HBAPRDTEntry
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{
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uint32_t DataBaseAddress;
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uint32_t DataBaseAddressUpper;
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uint32_t Reserved0;
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uint32_t ByteCount : 22;
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uint32_t Reserved1 : 9;
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uint32_t InterruptOnCompletion : 1;
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};
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struct HBACommandTable
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{
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uint8_t CommandFIS[64];
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uint8_t ATAPICommand[16];
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uint8_t Reserved[48];
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HBAPRDTEntry PRDTEntry[];
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};
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struct FIS_REG_H2D
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{
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uint8_t FISType;
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uint8_t PortMultiplier : 4;
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uint8_t Reserved0 : 3;
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uint8_t CommandControl : 1;
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uint8_t Command;
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uint8_t FeatureLow;
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uint8_t LBA0;
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uint8_t LBA1;
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uint8_t LBA2;
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uint8_t DeviceRegister;
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uint8_t LBA3;
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uint8_t LBA4;
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uint8_t LBA5;
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uint8_t FeatureHigh;
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uint8_t CountLow;
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uint8_t CountHigh;
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uint8_t ISOCommandCompletion;
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uint8_t Control;
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uint8_t Reserved1[4];
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};
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class Port
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{
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public:
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PortType AHCIPortType;
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HBAPort *HBAPortPtr;
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uint8_t *Buffer;
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uint8_t PortNumber;
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Port(PortType Type, HBAPort *PortPtr, uint8_t PortNumber)
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{
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this->AHCIPortType = Type;
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this->HBAPortPtr = PortPtr;
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this->Buffer = static_cast<uint8_t *>(AllocateMemory(1));
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MemorySet(this->Buffer, 0, PAGE_SIZE);
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this->PortNumber = PortNumber;
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}
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|
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~Port()
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{
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FreeMemory(this->Buffer, 1);
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}
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void StartCMD()
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{
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while (HBAPortPtr->CommandStatus & HBA_PxCMD_CR)
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Yield();
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HBAPortPtr->CommandStatus |= HBA_PxCMD_FRE;
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HBAPortPtr->CommandStatus |= HBA_PxCMD_ST;
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}
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void StopCMD()
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{
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HBAPortPtr->CommandStatus &= ~HBA_PxCMD_ST;
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HBAPortPtr->CommandStatus &= ~HBA_PxCMD_FRE;
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while (true)
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{
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if (HBAPortPtr->CommandStatus & HBA_PxCMD_FR)
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continue;
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||||
if (HBAPortPtr->CommandStatus & HBA_PxCMD_CR)
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continue;
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||||
break;
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}
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}
|
||||
|
||||
void Configure()
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||||
{
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||||
this->StopCMD();
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void *CmdBase = AllocateMemory(1);
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HBAPortPtr->CommandListBase = (uint32_t)(uint64_t)CmdBase;
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HBAPortPtr->CommandListBaseUpper = (uint32_t)((uint64_t)CmdBase >> 32);
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||||
MemorySet(reinterpret_cast<void *>(HBAPortPtr->CommandListBase), 0, 1024);
|
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|
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void *FISBase = AllocateMemory(1);
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||||
HBAPortPtr->FISBaseAddress = (uint32_t)(uint64_t)FISBase;
|
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HBAPortPtr->FISBaseAddressUpper = (uint32_t)((uint64_t)FISBase >> 32);
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MemorySet(FISBase, 0, 256);
|
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|
||||
HBACommandHeader *CommandHeader = (HBACommandHeader *)((uint64_t)HBAPortPtr->CommandListBase + ((uint64_t)HBAPortPtr->CommandListBaseUpper << 32));
|
||||
for (int i = 0; i < 32; i++)
|
||||
{
|
||||
CommandHeader[i].PRDTLength = 8;
|
||||
void *CommandTableAddress = AllocateMemory(1);
|
||||
uint64_t Address = (uint64_t)CommandTableAddress + (i << 8);
|
||||
CommandHeader[i].CommandTableBaseAddress = (uint32_t)(uint64_t)Address;
|
||||
CommandHeader[i].CommandTableBaseAddressUpper = (uint32_t)((uint64_t)Address >> 32);
|
||||
MemorySet(CommandTableAddress, 0, 256);
|
||||
}
|
||||
this->StartCMD();
|
||||
|
||||
Log("Port %d \"%x %x %x %x\" configured", PortNumber,
|
||||
HBAPortPtr->Vendor[0], HBAPortPtr->Vendor[1],
|
||||
HBAPortPtr->Vendor[2], HBAPortPtr->Vendor[3]);
|
||||
}
|
||||
|
||||
bool ReadWrite(uint64_t Sector, uint32_t SectorCount, uint8_t *Buffer, bool Write)
|
||||
{
|
||||
if (this->AHCIPortType == PortType::SATAPI &&
|
||||
Write == true)
|
||||
{
|
||||
Log("SATAPI port does not support write.");
|
||||
return false;
|
||||
}
|
||||
|
||||
uint32_t SectorL = (uint32_t)Sector;
|
||||
uint32_t SectorH = (uint32_t)(Sector >> 32);
|
||||
|
||||
HBAPortPtr->InterruptStatus = 0xFFFFFFFF; /* Clear pending interrupt bits */
|
||||
|
||||
HBACommandHeader *CommandHeader = reinterpret_cast<HBACommandHeader *>(HBAPortPtr->CommandListBase);
|
||||
CommandHeader->CommandFISLength = sizeof(FIS_REG_H2D) / sizeof(uint32_t);
|
||||
if (Write)
|
||||
CommandHeader->Write = 1;
|
||||
else
|
||||
CommandHeader->Write = 0;
|
||||
CommandHeader->PRDTLength = 1;
|
||||
|
||||
HBACommandTable *CommandTable = reinterpret_cast<HBACommandTable *>(CommandHeader->CommandTableBaseAddress);
|
||||
MemorySet(CommandTable, 0, sizeof(HBACommandTable) + (CommandHeader->PRDTLength - 1) * sizeof(HBAPRDTEntry));
|
||||
|
||||
CommandTable->PRDTEntry[0].DataBaseAddress = (uint32_t)(uint64_t)Buffer;
|
||||
CommandTable->PRDTEntry[0].DataBaseAddressUpper = (uint32_t)((uint64_t)Buffer >> 32);
|
||||
|
||||
#pragma GCC diagnostic push
|
||||
/* conversion from 'uint32_t' {aka 'unsigned int'} to 'unsigned int:22' may change value */
|
||||
#pragma GCC diagnostic ignored "-Wconversion"
|
||||
CommandTable->PRDTEntry[0].ByteCount = (SectorCount << 9) - 1; /* 512 bytes per sector */
|
||||
#pragma GCC diagnostic pop
|
||||
|
||||
CommandTable->PRDTEntry[0].InterruptOnCompletion = 1;
|
||||
|
||||
FIS_REG_H2D *CommandFIS = (FIS_REG_H2D *)(&CommandTable->CommandFIS);
|
||||
|
||||
CommandFIS->FISType = FIS_TYPE_REG_H2D;
|
||||
CommandFIS->CommandControl = 1;
|
||||
if (Write)
|
||||
CommandFIS->Command = ATA_CMD_WRITE_DMA_EX;
|
||||
else
|
||||
CommandFIS->Command = ATA_CMD_READ_DMA_EX;
|
||||
|
||||
CommandFIS->LBA0 = (uint8_t)SectorL;
|
||||
CommandFIS->LBA1 = (uint8_t)(SectorL >> 8);
|
||||
CommandFIS->LBA2 = (uint8_t)(SectorL >> 16);
|
||||
CommandFIS->LBA3 = (uint8_t)SectorH;
|
||||
CommandFIS->LBA4 = (uint8_t)(SectorH >> 8);
|
||||
CommandFIS->LBA5 = (uint8_t)(SectorH >> 16);
|
||||
|
||||
CommandFIS->DeviceRegister = 1 << 6; // LBA mode
|
||||
CommandFIS->CountLow = SectorCount & 0xFF;
|
||||
CommandFIS->CountHigh = (SectorCount >> 8) & 0xFF;
|
||||
|
||||
uint64_t Spin = 0;
|
||||
|
||||
while ((HBAPortPtr->TaskFileData & (ATA_DEV_BUSY | ATA_DEV_DRQ)) && Spin < 1000000)
|
||||
Spin++;
|
||||
|
||||
if (Spin == 1000000)
|
||||
{
|
||||
Log("Port not responding.");
|
||||
return false;
|
||||
}
|
||||
|
||||
HBAPortPtr->CommandIssue = 1;
|
||||
|
||||
Spin = 0;
|
||||
int TryCount = 0;
|
||||
|
||||
while (true)
|
||||
{
|
||||
if (Spin > 100000000)
|
||||
{
|
||||
Log("Port %d not responding. (%d)",
|
||||
this->PortNumber, TryCount);
|
||||
|
||||
Spin = 0;
|
||||
TryCount++;
|
||||
if (TryCount > 10)
|
||||
return false;
|
||||
}
|
||||
|
||||
if (HBAPortPtr->CommandIssue == 0)
|
||||
break;
|
||||
Spin++;
|
||||
|
||||
if (HBAPortPtr->InterruptStatus & HBA_PxIS_TFES)
|
||||
{
|
||||
Log("Error reading/writing (%d).", Write);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
};
|
||||
|
||||
Port *Ports[64];
|
||||
int PortCount = 0;
|
||||
|
||||
const char *PortTypeName[] = {"None",
|
||||
"SATA",
|
||||
"SEMB",
|
||||
"PM",
|
||||
"SATAPI"};
|
||||
|
||||
PortType CheckPortType(HBAPort *Port)
|
||||
{
|
||||
uint32_t SataStatus = Port->SataStatus;
|
||||
uint8_t InterfacePowerManagement = (SataStatus >> 8) & 0b111;
|
||||
uint8_t DeviceDetection = SataStatus & 0b111;
|
||||
|
||||
if (DeviceDetection != HBA_PORT_DEV_PRESENT)
|
||||
return PortType::None;
|
||||
if (InterfacePowerManagement != HBA_PORT_IPM_ACTIVE)
|
||||
return PortType::None;
|
||||
|
||||
switch (Port->Signature)
|
||||
{
|
||||
case SATA_SIG_ATAPI:
|
||||
return PortType::SATAPI;
|
||||
case SATA_SIG_ATA:
|
||||
return PortType::SATA;
|
||||
case SATA_SIG_PM:
|
||||
return PortType::PM;
|
||||
case SATA_SIG_SEMB:
|
||||
return PortType::SEMB;
|
||||
default:
|
||||
return PortType::None;
|
||||
}
|
||||
}
|
||||
|
||||
size_t drvRead(dev_t, dev_t min,
|
||||
uint8_t *Buffer, size_t Size, off_t Offset)
|
||||
{
|
||||
bool ok = Ports[min]->ReadWrite(Offset / 512,
|
||||
uint32_t(Size / 512),
|
||||
Buffer,
|
||||
false);
|
||||
return ok ? Size : 0;
|
||||
}
|
||||
|
||||
size_t drvWrite(dev_t, dev_t min,
|
||||
uint8_t *Buffer, size_t Size, off_t Offset)
|
||||
{
|
||||
bool ok = Ports[min]->ReadWrite(Offset / 512,
|
||||
uint32_t(Size / 512),
|
||||
Buffer,
|
||||
true);
|
||||
return ok ? Size : 0;
|
||||
}
|
||||
|
||||
void OnInterruptReceived(TrapFrame *)
|
||||
{
|
||||
}
|
||||
|
||||
EXTERNC int cxx_Panic()
|
||||
{
|
||||
for (int i = 0; i < PortCount; i++)
|
||||
Ports[i]->StopCMD();
|
||||
return 0;
|
||||
}
|
||||
|
||||
PCIArray *Devices;
|
||||
EXTERNC int cxx_Probe()
|
||||
{
|
||||
uint16_t VendorIDs[] = {0x8086, /* Intel */
|
||||
0x15AD, /* VMware */
|
||||
PCI_END};
|
||||
uint16_t DeviceIDs[] = {0x2922, /* ICH9 */
|
||||
0x2829, /* ICH8 */
|
||||
0x07E0, /* SATA AHCI (VMware) */
|
||||
PCI_END};
|
||||
Devices = FindPCIDevices(VendorIDs, DeviceIDs);
|
||||
if (Devices == nullptr)
|
||||
{
|
||||
Log("No AHCI device found.");
|
||||
return -ENODEV;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXTERNC int cxx_Initialize()
|
||||
{
|
||||
PCIArray *ctx = Devices;
|
||||
|
||||
/**
|
||||
* We loop through all the devices and initialize them
|
||||
*/
|
||||
while (ctx != nullptr)
|
||||
{
|
||||
/* We don't use the interrupt handler now... maybe we will in the future */
|
||||
// RegisterInterruptHandler(iLine(ctx->Device), (void *)OnInterruptReceived);
|
||||
|
||||
InitializePCI(ctx->Device);
|
||||
HBAMemory *HBA = (HBAMemory *)(uintptr_t)GetBAR(5, ctx->Device);
|
||||
|
||||
uint32_t PortsImplemented = HBA->PortsImplemented;
|
||||
Log("AHCI ports implemented: %x", PortsImplemented);
|
||||
for (int i = 0; i < 32; i++)
|
||||
{
|
||||
if (PortCount > 64)
|
||||
{
|
||||
Log("There are more than 64 AHCI ports implemented");
|
||||
break;
|
||||
}
|
||||
|
||||
if (PortsImplemented & (1 << i))
|
||||
{
|
||||
Log("Port %d implemented", i);
|
||||
PortType portType = CheckPortType(&HBA->Ports[i]);
|
||||
if (portType == PortType::SATA || portType == PortType::SATAPI)
|
||||
{
|
||||
KPrint("%s drive found at port %d", PortTypeName[portType], i);
|
||||
Ports[PortCount] = new Port(portType, &HBA->Ports[i], PortCount);
|
||||
dev_t ret = RegisterBlockDevice(ddt_SATA,
|
||||
nullptr, nullptr,
|
||||
drvRead, drvWrite,
|
||||
nullptr);
|
||||
if (ret != (dev_t)PortCount)
|
||||
{
|
||||
KPrint("Failed to register block device %d", ret);
|
||||
return -EBADSLT;
|
||||
}
|
||||
|
||||
PortCount++;
|
||||
Ports[PortCount] = nullptr;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (portType != PortType::None)
|
||||
{
|
||||
KPrint("Unsupported drive type %s found at port %d",
|
||||
PortTypeName[portType], i);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
ctx = (PCIArray *)ctx->Next;
|
||||
}
|
||||
|
||||
Log("Initializing AHCI ports");
|
||||
for (int i = 0; i < PortCount; i++)
|
||||
Ports[i]->Configure();
|
||||
|
||||
return PortCount > 0 ? 0 : -ENODEV;
|
||||
}
|
||||
|
||||
EXTERNC int cxx_Finalize()
|
||||
{
|
||||
for (int i = 0; i < PortCount; i++)
|
||||
{
|
||||
Ports[i]->StopCMD();
|
||||
delete Ports[i];
|
||||
}
|
||||
|
||||
PortCount = 0;
|
||||
|
||||
do
|
||||
{
|
||||
UnregisterBlockDevice(PortCount, ddt_SATA);
|
||||
PortCount--;
|
||||
} while (PortCount >= 0);
|
||||
|
||||
PCIArray *ctx = Devices;
|
||||
|
||||
while (ctx != nullptr)
|
||||
{
|
||||
ctx->Device->Header->Command |= PCI_COMMAND_INTX_DISABLE;
|
||||
ctx = (PCIArray *)ctx->Next;
|
||||
}
|
||||
|
||||
// std::list<PCI::PCIDevice> Devices = PCIManager->FindPCIDevice(VendorIDs, DeviceIDs);
|
||||
// foreach (auto dev in Devices)
|
||||
// Interrupts::RemoveHandler(OnInterruptReceived, iLine(dev));
|
||||
return 0;
|
||||
}
|
25
storage/ahci/ahci.hpp
Normal file
25
storage/ahci/ahci.hpp
Normal file
@ -0,0 +1,25 @@
|
||||
/*
|
||||
This file is part of Fennix Drivers.
|
||||
|
||||
Fennix Drivers is free software: you can redistribute it and/or
|
||||
modify it under the terms of the GNU General Public License as
|
||||
published by the Free Software Foundation, either version 3 of
|
||||
the License, or (at your option) any later version.
|
||||
|
||||
Fennix Drivers is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with Fennix Drivers. If not, see <https://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <types.h>
|
||||
|
||||
EXTERNC int cxx_Panic();
|
||||
EXTERNC int cxx_Probe();
|
||||
EXTERNC int cxx_Initialize();
|
||||
EXTERNC int cxx_Finalize();
|
31
storage/ahci/main.c
Normal file
31
storage/ahci/main.c
Normal file
@ -0,0 +1,31 @@
|
||||
/*
|
||||
This file is part of Fennix Drivers.
|
||||
|
||||
Fennix Drivers is free software: you can redistribute it and/or
|
||||
modify it under the terms of the GNU General Public License as
|
||||
published by the Free Software Foundation, either version 3 of
|
||||
the License, or (at your option) any later version.
|
||||
|
||||
Fennix Drivers is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with Fennix Drivers. If not, see <https://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <base.h>
|
||||
|
||||
#include "ahci.hpp"
|
||||
|
||||
int DriverEntry() { return cxx_Initialize(); }
|
||||
int DriverFinal() { return cxx_Finalize(); }
|
||||
int DriverPanic() { return cxx_Panic(); }
|
||||
int DriverProbe() { return cxx_Probe(); }
|
||||
|
||||
DriverInfo("ahci",
|
||||
"Advanced Host Controller Interface Driver",
|
||||
"EnderIce2",
|
||||
"0.1",
|
||||
"GPLv3");
|
83
storage/ata/Makefile
Normal file
83
storage/ata/Makefile
Normal file
@ -0,0 +1,83 @@
|
||||
# Config file
|
||||
include ../../../Makefile.conf
|
||||
|
||||
FILENAME = ata.drv
|
||||
|
||||
CC = ../../../$(COMPILER_PATH)/$(COMPILER_ARCH)gcc
|
||||
CPP = ../../../$(COMPILER_PATH)/$(COMPILER_ARCH)g++
|
||||
LD = ../../../$(COMPILER_PATH)/$(COMPILER_ARCH)ld
|
||||
AS = ../../../$(COMPILER_PATH)/$(COMPILER_ARCH)as
|
||||
OBJDUMP = ../../../$(COMPILER_PATH)/$(COMPILER_ARCH)objdump
|
||||
|
||||
S_SOURCES = $(shell find ./ -type f -name '*.S')
|
||||
C_SOURCES = $(shell find ./ -type f -name '*.c')
|
||||
CPP_SOURCES = $(shell find ./ -type f -name '*.cpp')
|
||||
HEADERS = $(sort $(dir $(wildcard ../../include/*)))
|
||||
OBJ = $(C_SOURCES:.c=.o) $(CPP_SOURCES:.cpp=.o) $(ASM_SOURCES:.asm=.o) $(S_SOURCES:.S=.o) $(PSF_SOURCES:.psf=.o) $(BMP_SOURCES:.bmp=.o)
|
||||
STACK_USAGE_OBJ = $(C_SOURCES:.c=.su) $(CPP_SOURCES:.cpp=.su)
|
||||
INCLUDE_DIR = ../../include
|
||||
|
||||
LIBS := ../../out/dcrt0.o -L../../out -ldriver
|
||||
|
||||
LDFLAGS := \
|
||||
-fPIC -fPIE -pie \
|
||||
-Wl,--no-dynamic-linker,-ztext,--no-warn-rwx-segment \
|
||||
-nostdlib -nodefaultlibs -nolibc \
|
||||
-zmax-page-size=0x1000 \
|
||||
-Wl,-Map file.map -shared -fvisibility=hidden
|
||||
|
||||
WARNCFLAG = -Wall -Wextra
|
||||
|
||||
CFLAGS := -I$(INCLUDE_DIR) -fvisibility=hidden
|
||||
|
||||
ifeq ($(OSARCH), amd64)
|
||||
|
||||
CFLAGS += -fPIC -fPIE -pie -mno-80387 -mno-mmx -mno-3dnow \
|
||||
-mno-red-zone -mno-sse -mno-sse2 \
|
||||
-march=x86-64 -pipe -ffunction-sections \
|
||||
-msoft-float -fno-builtin
|
||||
|
||||
else ifeq ($(OSARCH), i386)
|
||||
|
||||
CFLAGS += -fPIC -fPIE -pie -mno-80387 -mno-mmx -mno-3dnow \
|
||||
-mno-red-zone -mno-sse -mno-sse2 -ffunction-sections \
|
||||
-march=i386 -pipe -msoft-float -fno-builtin
|
||||
|
||||
else ifeq ($(OSARCH), aarch64)
|
||||
|
||||
CFLAGS += -pipe -fno-builtin -fPIC
|
||||
|
||||
endif
|
||||
|
||||
ifeq ($(DEBUG), 1)
|
||||
CFLAGS += -DDEBUG -ggdb3 -O0 -fdiagnostics-color=always -fstack-usage
|
||||
ifeq ($(OSARCH), amd64)
|
||||
CFLAGS += -fverbose-asm
|
||||
endif
|
||||
ifneq ($(OSARCH), aarch64)
|
||||
CFLAGS += -fstack-check
|
||||
endif
|
||||
LDFLAGS += -ggdb3 -O0
|
||||
endif
|
||||
|
||||
build: $(FILENAME)
|
||||
mv $(FILENAME) ../../out/$(FILENAME)
|
||||
|
||||
$(FILENAME): $(OBJ)
|
||||
$(info Linking $@)
|
||||
$(CC) $(LDFLAGS) $(OBJ) $(LIBS) -o $@
|
||||
|
||||
%.o: %.c $(HEADERS)
|
||||
$(info Compiling $<)
|
||||
$(CC) $(CFLAGS) $(WARNCFLAG) -std=c17 -c $< -o $@
|
||||
|
||||
%.o: %.cpp $(HEADERS)
|
||||
$(info Compiling $<)
|
||||
$(CPP) $(CFLAGS) $(WARNCFLAG) -std=c++20 -fno-exceptions -fno-rtti -c $< -o $@
|
||||
|
||||
%.o: %.S
|
||||
$(info Compiling $<)
|
||||
$(AS) -o $@ $<
|
||||
|
||||
clean:
|
||||
rm -f file.map $(OBJ) $(STACK_USAGE_OBJ)
|
76
storage/ata/main.c
Normal file
76
storage/ata/main.c
Normal file
@ -0,0 +1,76 @@
|
||||
/*
|
||||
This file is part of Fennix Drivers.
|
||||
|
||||
Fennix Drivers is free software: you can redistribute it and/or
|
||||
modify it under the terms of the GNU General Public License as
|
||||
published by the Free Software Foundation, either version 3 of
|
||||
the License, or (at your option) any later version.
|
||||
|
||||
Fennix Drivers is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with Fennix Drivers. If not, see <https://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <errno.h>
|
||||
#include <regs.h>
|
||||
#include <base.h>
|
||||
#include <io.h>
|
||||
|
||||
bool IsATAPresent()
|
||||
{
|
||||
outb(0x1F0 + 2, 0);
|
||||
outb(0x1F0 + 3, 0);
|
||||
outb(0x1F0 + 4, 0);
|
||||
outb(0x1F0 + 5, 0);
|
||||
outb(0x1F0 + 7, 0xEC);
|
||||
if (inb(0x1F0 + 7) == 0 || inb(0x1F0 + 1) != 0)
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
void MasterInterruptHandler(TrapFrame *)
|
||||
{
|
||||
}
|
||||
|
||||
void SlaveInterruptHandler(TrapFrame *)
|
||||
{
|
||||
}
|
||||
|
||||
int DriverEntry()
|
||||
{
|
||||
RegisterInterruptHandler(14, MasterInterruptHandler);
|
||||
RegisterInterruptHandler(15, SlaveInterruptHandler);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int DriverFinal()
|
||||
{
|
||||
UnregisterInterruptHandler(14, MasterInterruptHandler);
|
||||
UnregisterInterruptHandler(15, SlaveInterruptHandler);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int DriverPanic()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int DriverProbe()
|
||||
{
|
||||
if (!IsATAPresent())
|
||||
return -ENODEV;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
DriverInfo("ata",
|
||||
"Advanced Technology Attachment Driver",
|
||||
"EnderIce2",
|
||||
"0.1",
|
||||
"GPLv3");
|
Reference in New Issue
Block a user