mirror of
https://github.com/Fennix-Project/Drivers.git
synced 2025-07-10 22:59:25 +00:00
Added drivers
This commit is contained in:
Alex
220
include/io.h
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220
include/io.h
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@ -0,0 +1,220 @@
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#ifndef __FENNIX_API_IO_H__
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#define __FENNIX_API_IO_H__
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#include <types.h>
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#if defined(__amd64__) || defined(__i386__)
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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static inline uint8_t inportb(uint16_t Port)
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{
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uint8_t Result;
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__asm__("in %%dx, %%al"
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: "=a"(Result)
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: "d"(Port));
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return Result;
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}
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static inline uint16_t inportw(uint16_t Port)
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{
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uint16_t Result;
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__asm__("in %%dx, %%ax"
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: "=a"(Result)
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: "d"(Port));
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return Result;
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}
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static inline uint32_t inportl(uint16_t Port)
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{
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uint32_t Result;
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__asm__ volatile("inl %1, %0"
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: "=a"(Result)
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: "dN"(Port));
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return Result;
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}
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static inline void outportb(uint16_t Port, uint8_t Data)
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{
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__asm__ volatile("out %%al, %%dx"
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:
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: "a"(Data), "d"(Port));
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}
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static inline void outportw(uint16_t Port, uint16_t Data)
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{
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__asm__ volatile("out %%ax, %%dx"
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:
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: "a"(Data), "d"(Port));
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}
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static inline void outportl(uint16_t Port, uint32_t Data)
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{
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__asm__ volatile("outl %1, %0"
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:
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: "dN"(Port), "a"(Data));
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}
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static inline uint8_t mmioin8(uint64_t Address)
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{
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__asm__ volatile("" ::
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: "memory");
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uint8_t Result = *(volatile uint8_t *)Address;
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__asm__ volatile("" ::
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: "memory");
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return Result;
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}
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static inline uint16_t mmioin16(uint64_t Address)
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{
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__asm__ volatile("" ::
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: "memory");
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uint16_t Result = *(volatile uint16_t *)Address;
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__asm__ volatile("" ::
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: "memory");
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return Result;
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}
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static inline uint32_t mmioin32(uint64_t Address)
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{
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__asm__ volatile("" ::
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: "memory");
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uint32_t Result = *(volatile uint32_t *)Address;
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__asm__ volatile("" ::
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: "memory");
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return Result;
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}
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static inline uint64_t mmioin64(uint64_t Address)
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{
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__asm__ volatile("" ::
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: "memory");
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uint64_t Result = *(volatile uint64_t *)Address;
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__asm__ volatile("" ::
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: "memory");
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return Result;
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}
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static inline void mmioout8(uint64_t Address, uint8_t Data)
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{
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__asm__ volatile("" ::
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: "memory");
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*(volatile uint8_t *)Address = Data;
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__asm__ volatile("" ::
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: "memory");
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}
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static inline void mmioout16(uint64_t Address, uint16_t Data)
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{
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__asm__ volatile("" ::
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: "memory");
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*(volatile uint16_t *)Address = Data;
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__asm__ volatile("" ::
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: "memory");
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}
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static inline void mmioout32(uint64_t Address, uint32_t Data)
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{
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__asm__ volatile("" ::
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: "memory");
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*(volatile uint32_t *)Address = Data;
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__asm__ volatile("" ::
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: "memory");
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}
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static inline void mmioout64(uint64_t Address, uint64_t Data)
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{
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__asm__ volatile("" ::
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: "memory");
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*(volatile uint64_t *)Address = Data;
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__asm__ volatile("" ::
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: "memory");
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}
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static inline void mmoutb(void *Address, uint8_t Value)
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{
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__asm__ volatile("mov %1, %0"
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: "=m"((*(uint8_t *)(Address)))
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: "r"(Value)
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: "memory");
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}
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static inline void mmoutw(void *Address, uint16_t Value)
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{
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__asm__ volatile("mov %1, %0"
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: "=m"((*(uint16_t *)(Address)))
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: "r"(Value)
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: "memory");
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}
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static inline void mmoutl(void *Address, uint32_t Value)
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{
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__asm__ volatile("mov %1, %0"
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: "=m"((*(uint32_t *)(Address)))
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: "r"(Value)
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: "memory");
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}
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static inline void mmoutq(void *Address, uint64_t Value)
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{
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__asm__ volatile("mov %1, %0"
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: "=m"((*(uint64_t *)(Address)))
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: "r"(Value)
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: "memory");
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}
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static inline uint8_t mminb(void *Address)
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{
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uint8_t Result;
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__asm__ volatile("mov %1, %0"
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: "=r"(Result)
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: "m"((*(uint8_t *)(Address)))
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: "memory");
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return Result;
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}
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static inline uint16_t mminw(void *Address)
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{
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uint16_t Result;
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__asm__ volatile("mov %1, %0"
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: "=r"(Result)
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: "m"((*(uint16_t *)(Address)))
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: "memory");
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return Result;
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}
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static inline uint32_t mminl(void *Address)
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{
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uint32_t Result;
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__asm__ volatile("mov %1, %0"
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: "=r"(Result)
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: "m"((*(uint32_t *)(Address)))
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: "memory");
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return Result;
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}
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static inline uint64_t mminq(void *Address)
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{
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uint64_t Result;
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__asm__ volatile("mov %1, %0"
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: "=r"(Result)
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: "m"((*(uint64_t *)(Address)))
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: "memory");
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return Result;
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}
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#ifdef __cplusplus
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}
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#endif
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#define inb(Port) inportb(Port)
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#define inw(Port) inportw(Port)
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#define inl(Port) inportl(Port)
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#define outb(Port, Data) outportb(Port, Data)
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#define outw(Port, Data) outportw(Port, Data)
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#define outl(Port, Data) outportl(Port, Data)
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#endif // defined(__amd64__) || defined(__i386__)
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#endif // !__FENNIX_API_IO_H__
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128
include/netools.h
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128
include/netools.h
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@ -0,0 +1,128 @@
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#ifndef __FENNIX_API_NETWORK_UTILS_H__
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#define __FENNIX_API_NETWORK_UTILS_H__
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#include <types.h>
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typedef __UINT64_TYPE__ uint48_t;
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struct MediaAccessControl
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{
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uint8_t Address[6];
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inline bool operator==(const MediaAccessControl &lhs) const
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{
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return lhs.Address[0] == this->Address[0] &&
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lhs.Address[1] == this->Address[1] &&
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lhs.Address[2] == this->Address[2] &&
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lhs.Address[3] == this->Address[3] &&
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lhs.Address[4] == this->Address[4] &&
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lhs.Address[5] == this->Address[5];
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}
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inline bool operator==(const uint48_t &lhs) const
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{
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MediaAccessControl MAC;
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MAC.Address[0] = (uint8_t)((lhs >> 40) & 0xFF);
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MAC.Address[1] = (uint8_t)((lhs >> 32) & 0xFF);
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MAC.Address[2] = (uint8_t)((lhs >> 24) & 0xFF);
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MAC.Address[3] = (uint8_t)((lhs >> 16) & 0xFF);
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MAC.Address[4] = (uint8_t)((lhs >> 8) & 0xFF);
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MAC.Address[5] = (uint8_t)(lhs & 0xFF);
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return MAC.Address[0] == this->Address[0] &&
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MAC.Address[1] == this->Address[1] &&
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MAC.Address[2] == this->Address[2] &&
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MAC.Address[3] == this->Address[3] &&
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MAC.Address[4] == this->Address[4] &&
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MAC.Address[5] == this->Address[5];
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}
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inline bool operator!=(const MediaAccessControl &lhs) const { return !(*this == lhs); }
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inline bool operator!=(const uint48_t &lhs) const { return !(*this == lhs); }
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inline uint48_t ToHex()
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{
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return ((uint48_t)this->Address[0] << 40) |
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((uint48_t)this->Address[1] << 32) |
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((uint48_t)this->Address[2] << 24) |
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((uint48_t)this->Address[3] << 16) |
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((uint48_t)this->Address[4] << 8) |
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((uint48_t)this->Address[5]);
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}
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inline MediaAccessControl FromHex(uint48_t Hex)
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{
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this->Address[0] = (uint8_t)((Hex >> 40) & 0xFF);
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this->Address[1] = (uint8_t)((Hex >> 32) & 0xFF);
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this->Address[2] = (uint8_t)((Hex >> 24) & 0xFF);
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this->Address[3] = (uint8_t)((Hex >> 16) & 0xFF);
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this->Address[4] = (uint8_t)((Hex >> 8) & 0xFF);
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this->Address[5] = (uint8_t)(Hex & 0xFF);
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return *this;
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}
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inline bool Valid()
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{
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// TODO: More complex MAC validation
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return (this->Address[0] != 0 ||
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this->Address[1] != 0 ||
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this->Address[2] != 0 ||
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this->Address[3] != 0 ||
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this->Address[4] != 0 ||
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this->Address[5] != 0) &&
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(this->Address[0] != 0xFF ||
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this->Address[1] != 0xFF ||
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this->Address[2] != 0xFF ||
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this->Address[3] != 0xFF ||
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this->Address[4] != 0xFF ||
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this->Address[5] != 0xFF);
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}
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};
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struct InternetProtocol4
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{
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uint8_t Address[4];
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inline bool operator==(const InternetProtocol4 &lhs) const
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{
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return lhs.Address[0] == this->Address[0] &&
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lhs.Address[1] == this->Address[1] &&
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lhs.Address[2] == this->Address[2] &&
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lhs.Address[3] == this->Address[3];
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}
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inline bool operator==(const uint32_t &lhs) const
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{
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InternetProtocol4 IP;
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IP.Address[0] = (uint8_t)((lhs >> 24) & 0xFF);
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IP.Address[1] = (uint8_t)((lhs >> 16) & 0xFF);
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IP.Address[2] = (uint8_t)((lhs >> 8) & 0xFF);
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IP.Address[3] = (uint8_t)(lhs & 0xFF);
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return IP.Address[0] == this->Address[0] &&
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IP.Address[1] == this->Address[1] &&
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IP.Address[2] == this->Address[2] &&
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IP.Address[3] == this->Address[3];
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}
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inline bool operator!=(const InternetProtocol4 &lhs) const { return !(*this == lhs); }
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inline bool operator!=(const uint32_t &lhs) const { return !(*this == lhs); }
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inline uint32_t ToHex()
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{
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return ((uint64_t)this->Address[0] << 24) |
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((uint64_t)this->Address[1] << 16) |
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((uint64_t)this->Address[2] << 8) |
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((uint64_t)this->Address[3]);
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}
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inline InternetProtocol4 FromHex(uint32_t Hex)
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{
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this->Address[0] = (uint8_t)((Hex >> 24) & 0xFF);
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this->Address[1] = (uint8_t)((Hex >> 16) & 0xFF);
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this->Address[2] = (uint8_t)((Hex >> 8) & 0xFF);
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this->Address[3] = (uint8_t)(Hex & 0xFF);
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return *this;
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}
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};
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#endif // !__FENNIX_API_NETWORK_UTILS_H__
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72
include/pci.h
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72
include/pci.h
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@ -0,0 +1,72 @@
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#ifndef __FENNIX_API_PCI_H__
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#define __FENNIX_API_PCI_H__
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#include <types.h>
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/* https://sites.uclouvain.be/SystInfo/usr/include/linux/pci_regs.h.html */
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enum PCICommands
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{
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/** @brief Enable response in I/O space */
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PCI_COMMAND_IO = 0x1,
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/** @brief Enable response in Memory space */
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PCI_COMMAND_MEMORY = 0x2,
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/** @brief Enable bus mastering */
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PCI_COMMAND_MASTER = 0x4,
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/** @brief Enable response to special cycles */
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PCI_COMMAND_SPECIAL = 0x8,
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/** @brief Use memory write and invalidate */
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PCI_COMMAND_INVALIDATE = 0x10,
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/** @brief Enable palette snooping */
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PCI_COMMAND_VGA_PALETTE = 0x20,
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/** @brief Enable parity checking */
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PCI_COMMAND_PARITY = 0x40,
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/** @brief Enable address/data stepping */
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PCI_COMMAND_WAIT = 0x80,
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/** @brief Enable SERR */
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PCI_COMMAND_SERR = 0x100,
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/** @brief Enable back-to-back writes */
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PCI_COMMAND_FAST_BACK = 0x200,
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/** @brief INTx Emulation Disable */
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PCI_COMMAND_INTX_DISABLE = 0x400
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};
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struct PCIDeviceHeader
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{
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uint16_t VendorID;
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uint16_t DeviceID;
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uint16_t Command;
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uint16_t Status;
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uint8_t RevisionID;
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uint8_t ProgIF;
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uint8_t Subclass;
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uint8_t Class;
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uint8_t CacheLineSize;
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uint8_t LatencyTimer;
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uint8_t HeaderType;
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uint8_t BIST;
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};
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struct PCIHeader0
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{
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PCIDeviceHeader Header;
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uint32_t BAR0;
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uint32_t BAR1;
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uint32_t BAR2;
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uint32_t BAR3;
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uint32_t BAR4;
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uint32_t BAR5;
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uint32_t CardbusCISPtr;
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uint16_t SubsystemVendorID;
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uint16_t SubsystemID;
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uint32_t ExpansionROMBaseAddr;
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uint8_t CapabilitiesPtr;
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uint8_t Rsv0;
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uint16_t Rsv1;
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uint32_t Rsv2;
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uint8_t InterruptLine;
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uint8_t InterruptPin;
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uint8_t MinGrant;
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uint8_t MaxLatency;
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};
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#endif // !__FENNIX_API_PCI_H__
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42
include/types.h
Normal file
42
include/types.h
Normal file
@ -0,0 +1,42 @@
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#ifndef __FENNIX_API_TYPES_H__
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#define __FENNIX_API_TYPES_H__
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typedef __INT8_TYPE__ int8_t;
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typedef __INT16_TYPE__ int16_t;
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typedef __INT32_TYPE__ int32_t;
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typedef __INT64_TYPE__ int64_t;
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typedef __UINT8_TYPE__ uint8_t;
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typedef __UINT16_TYPE__ uint16_t;
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typedef __UINT32_TYPE__ uint32_t;
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typedef __UINT64_TYPE__ uint64_t;
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typedef __INT_LEAST8_TYPE__ int_least8_t;
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typedef __INT_LEAST16_TYPE__ int_least16_t;
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typedef __INT_LEAST32_TYPE__ int_least32_t;
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typedef __INT_LEAST64_TYPE__ int_least64_t;
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typedef __UINT_LEAST8_TYPE__ uint_least8_t;
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typedef __UINT_LEAST16_TYPE__ uint_least16_t;
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typedef __UINT_LEAST32_TYPE__ uint_least32_t;
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typedef __UINT_LEAST64_TYPE__ uint_least64_t;
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typedef __INT_FAST8_TYPE__ int_fast8_t;
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typedef __INT_FAST16_TYPE__ int_fast16_t;
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typedef __INT_FAST32_TYPE__ int_fast32_t;
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typedef __INT_FAST64_TYPE__ int_fast64_t;
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typedef __UINT_FAST8_TYPE__ uint_fast8_t;
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typedef __UINT_FAST16_TYPE__ uint_fast16_t;
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typedef __UINT_FAST32_TYPE__ uint_fast32_t;
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typedef __UINT_FAST64_TYPE__ uint_fast64_t;
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typedef __INTPTR_TYPE__ intptr_t;
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typedef __UINTPTR_TYPE__ uintptr_t;
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typedef __INTMAX_TYPE__ intmax_t;
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typedef __UINTMAX_TYPE__ uintmax_t;
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typedef __PTRDIFF_TYPE__ ptrdiff_t;
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typedef __SIZE_TYPE__ size_t;
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#define UNUSED(x) (void)(x)
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#endif // !__FENNIX_API_TYPES_H__
|
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