mirror of
https://github.com/Fennix-Project/Kernel.git
synced 2025-05-25 22:14:37 +00:00
349 lines
12 KiB
C++
349 lines
12 KiB
C++
/*
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This file is part of Fennix Kernel.
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Fennix Kernel is free software: you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation, either version 3 of
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the License, or (at your option) any later version.
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Fennix Kernel is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "../crashhandler.hpp"
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#include "chfcts.hpp"
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#include <display.hpp>
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#include <printf.h>
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#include <debug.h>
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#include <smp.hpp>
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#include <cpu.hpp>
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#if defined(a64)
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#include "../../arch/amd64/cpu/gdt.hpp"
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#elif defined(a32)
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#elif defined(aa64)
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#endif
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#include "../../kernel.h"
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static const char *PageFaultDescriptions[8] = {
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"Supervisory process tried to read a non-present page entry\n",
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"Supervisory process tried to read a page and caused a protection fault\n",
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"Supervisory process tried to write to a non-present page entry\n",
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"Supervisory process tried to write a page and caused a protection fault\n",
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"User process tried to read a non-present page entry\n",
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"User process tried to read a page and caused a protection fault\n",
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"User process tried to write to a non-present page entry\n",
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"User process tried to write a page and caused a protection fault\n"};
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nsa void DivideByZeroExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Divide by zero exception\n");
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UNUSED(Frame);
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}
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nsa void DebugExceptionHandler(CPU::TrapFrame *Frame)
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{
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CrashHandler::EHPrint("Kernel triggered debug exception.\n");
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UNUSED(Frame);
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}
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nsa void NonMaskableInterruptExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("NMI exception");
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UNUSED(Frame);
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}
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nsa void BreakpointExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Breakpoint exception");
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UNUSED(Frame);
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}
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nsa void OverflowExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Overflow exception");
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UNUSED(Frame);
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}
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nsa void BoundRangeExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Bound range exception");
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UNUSED(Frame);
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}
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nsa void InvalidOpcodeExceptionHandler(CPU::TrapFrame *Frame)
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{
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CrashHandler::EHPrint("Kernel tried to execute an invalid opcode.\n");
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UNUSED(Frame);
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}
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nsa void DeviceNotAvailableExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Device not available exception");
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UNUSED(Frame);
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}
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nsa void DoubleFaultExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Double fault exception");
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UNUSED(Frame);
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}
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nsa void CoprocessorSegmentOverrunExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Coprocessor segment overrun exception");
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UNUSED(Frame);
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}
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nsa void InvalidTSSExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Invalid TSS exception");
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UNUSED(Frame);
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}
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nsa void SegmentNotPresentExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Segment not present exception");
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UNUSED(Frame);
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}
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nsa void StackFaultExceptionHandler(CPU::TrapFrame *Frame)
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{
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CPU::x64::SelectorErrorCode SelCode = {.raw = Frame->ErrorCode};
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#if defined(a64)
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CrashHandler::EHPrint("Stack segment fault at address %#lx\n", Frame->rip);
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#elif defined(a32)
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CrashHandler::EHPrint("Stack segment fault at address %#lx\n", Frame->eip);
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#elif defined(aa64)
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#endif
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CrashHandler::EHPrint("External: %d\n", SelCode.External);
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CrashHandler::EHPrint("Table: %d\n", SelCode.Table);
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CrashHandler::EHPrint("Index: %#x\n", SelCode.Idx);
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CrashHandler::EHPrint("Error code: %#lx\n", Frame->ErrorCode);
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}
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nsa void GeneralProtectionExceptionHandler(CPU::TrapFrame *Frame)
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{
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CPU::x64::SelectorErrorCode SelCode = {.raw = Frame->ErrorCode};
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// switch (SelCode.Table)
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// {
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// case CPU::x64::0b00:
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// memcpy(desc_tmp, "GDT", 3);
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// break;
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// case CPU::x64::0b01:
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// memcpy(desc_tmp, "IDT", 3);
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// break;
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// case CPU::x64::0b10:
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// memcpy(desc_tmp, "LDT", 3);
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// break;
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// case CPU::x64::0b11:
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// memcpy(desc_tmp, "IDT", 3);
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// break;
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// default:
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// memcpy(desc_tmp, "Unknown", 7);
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// break;
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// }
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CrashHandler::EHPrint("Kernel performed an illegal operation.\n");
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CrashHandler::EHPrint("External: %d\n", SelCode.External);
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CrashHandler::EHPrint("Table: %d\n", SelCode.Table);
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CrashHandler::EHPrint("Index: %#x\n", SelCode.Idx);
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}
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nsa void PageFaultExceptionHandler(CPU::TrapFrame *Frame)
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{
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CPU::x64::PageFaultErrorCode params = {.raw = (uint32_t)Frame->ErrorCode};
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#if defined(a64)
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CrashHandler::EHPrint("\eAFAFAFAn exception occurred at %#lx by %#lx\n", CrashHandler::PageFaultAddress, Frame->rip);
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#elif defined(a32)
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CrashHandler::EHPrint("\eAFAFAFAn exception occurred at %#lx by %#lx\n", CrashHandler::PageFaultAddress, Frame->eip);
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#elif defined(aa64)
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#endif
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CrashHandler::EHPrint("Page: %s\n", params.P ? "Present" : "Not Present");
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CrashHandler::EHPrint("Write Operation: %s\n", params.W ? "Read-Only" : "Read-Write");
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CrashHandler::EHPrint("Processor Mode: %s\n", params.U ? "User-Mode" : "Kernel-Mode");
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CrashHandler::EHPrint("CPU Reserved Bits: %s\n", params.R ? "Reserved" : "Unreserved");
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CrashHandler::EHPrint("Caused By An Instruction Fetch: %s\n", params.I ? "Yes" : "No");
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CrashHandler::EHPrint("Caused By A Protection-Key Violation: %s\n", params.PK ? "Yes" : "No");
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CrashHandler::EHPrint("Caused By A Shadow Stack Access: %s\n", params.SS ? "Yes" : "No");
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CrashHandler::EHPrint("Caused By An SGX Violation: %s\n", params.SGX ? "Yes" : "No");
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if (Frame->ErrorCode & 0x00000008)
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CrashHandler::EHPrint("One or more page directory entries contain reserved bits which are set to 1.\n");
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else
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CrashHandler::EHPrint(PageFaultDescriptions[Frame->ErrorCode & 0b111]);
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#ifdef DEBUG
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uintptr_t CheckPageFaultAddress = 0;
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CheckPageFaultAddress = CrashHandler::PageFaultAddress;
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if (CheckPageFaultAddress == 0)
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#ifdef a64
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CheckPageFaultAddress = Frame->rip;
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#elif defined(a32)
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CheckPageFaultAddress = Frame->eip;
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#elif defined(aa64)
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CheckPageFaultAddress = 0;
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#endif
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#if defined(a64)
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Memory::Virtual vmm(((Memory::PageTable *)CPU::x64::readcr3().raw));
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#elif defined(a32)
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Memory::Virtual vmm(((Memory::PageTable *)CPU::x32::readcr3().raw));
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#elif defined(aa64)
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Memory::Virtual vmm();
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#warning "TODO: aa64"
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#endif
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bool PageAvailable = vmm.Check((void *)CheckPageFaultAddress);
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debug("Page available (Check(...)): %s. %s",
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PageAvailable ? "Yes" : "No",
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(params.P && !PageAvailable) ? "CR2 == Present; Check() != Present??????" : "CR2 confirms Check() result.");
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if (PageAvailable)
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{
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bool Present = vmm.Check((void *)CheckPageFaultAddress);
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bool ReadWrite = vmm.Check((void *)CheckPageFaultAddress, Memory::PTFlag::RW);
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bool User = vmm.Check((void *)CheckPageFaultAddress, Memory::PTFlag::US);
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bool WriteThrough = vmm.Check((void *)CheckPageFaultAddress, Memory::PTFlag::PWT);
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bool CacheDisabled = vmm.Check((void *)CheckPageFaultAddress, Memory::PTFlag::PCD);
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bool Accessed = vmm.Check((void *)CheckPageFaultAddress, Memory::PTFlag::A);
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bool Dirty = vmm.Check((void *)CheckPageFaultAddress, Memory::PTFlag::D);
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bool Global = vmm.Check((void *)CheckPageFaultAddress, Memory::PTFlag::G);
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/* ... */
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debug("Page available: %s", Present ? "Yes" : "No");
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debug("Page read/write: %s", ReadWrite ? "Yes" : "No");
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debug("Page user/kernel: %s", User ? "User" : "Kernel");
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debug("Page write-through: %s", WriteThrough ? "Yes" : "No");
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debug("Page cache disabled: %s", CacheDisabled ? "Yes" : "No");
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debug("Page accessed: %s", Accessed ? "Yes" : "No");
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debug("Page dirty: %s", Dirty ? "Yes" : "No");
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debug("Page global: %s", Global ? "Yes" : "No");
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if (Present)
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{
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#if defined(a64)
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uintptr_t CheckPageFaultLinearAddress = (uintptr_t)CheckPageFaultAddress;
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CheckPageFaultLinearAddress &= 0xFFFFFFFFFFFFF000;
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debug("%#lx -> %#lx", CheckPageFaultAddress, CheckPageFaultLinearAddress);
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Memory::Virtual::PageMapIndexer Index = Memory::Virtual::PageMapIndexer((uintptr_t)CheckPageFaultLinearAddress);
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debug("Index for %#lx is PML:%d PDPTE:%d PDE:%d PTE:%d",
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CheckPageFaultLinearAddress,
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Index.PMLIndex,
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Index.PDPTEIndex,
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Index.PDEIndex,
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Index.PTEIndex);
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#if defined(a64)
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Memory::PageMapLevel4 PML4 = ((Memory::PageTable *)CPU::x64::readcr3().raw)->Entries[Index.PMLIndex];
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#elif defined(a32)
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Memory::PageMapLevel4 PML4 = ((Memory::PageTable *)CPU::x32::readcr3().raw)->Entries[Index.PMLIndex];
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#elif defined(aa64)
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Memory::PageMapLevel4 PML4 = {.raw = 0};
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#warning "TODO: aa64"
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#endif
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Memory::PageDirectoryPointerTableEntryPtr *PDPTE = (Memory::PageDirectoryPointerTableEntryPtr *)((uintptr_t)PML4.GetAddress() << 12);
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Memory::PageDirectoryEntryPtr *PDE = (Memory::PageDirectoryEntryPtr *)((uintptr_t)PDPTE->Entries[Index.PDPTEIndex].GetAddress() << 12);
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Memory::PageTableEntryPtr *PTE = (Memory::PageTableEntryPtr *)((uintptr_t)PDE->Entries[Index.PDEIndex].GetAddress() << 12);
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debug("# %03d-%03d-%03d-%03d: P:%s RW:%s US:%s PWT:%s PCB:%s A:%s NX:%s Address:%#lx",
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Index.PMLIndex, 0, 0, 0,
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PML4.Present ? "1" : "0",
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PML4.ReadWrite ? "1" : "0",
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PML4.UserSupervisor ? "1" : "0",
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PML4.WriteThrough ? "1" : "0",
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PML4.CacheDisable ? "1" : "0",
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PML4.Accessed ? "1" : "0",
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PML4.ExecuteDisable ? "1" : "0",
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PML4.GetAddress() << 12);
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debug("# %03d-%03d-%03d-%03d: P:%s RW:%s US:%s PWT:%s PCB:%s A:%s NX:%s Address:%#lx",
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Index.PMLIndex, Index.PDPTEIndex, 0, 0,
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PDPTE->Entries[Index.PDPTEIndex].Present ? "1" : "0",
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PDPTE->Entries[Index.PDPTEIndex].ReadWrite ? "1" : "0",
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PDPTE->Entries[Index.PDPTEIndex].UserSupervisor ? "1" : "0",
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PDPTE->Entries[Index.PDPTEIndex].WriteThrough ? "1" : "0",
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PDPTE->Entries[Index.PDPTEIndex].CacheDisable ? "1" : "0",
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PDPTE->Entries[Index.PDPTEIndex].Accessed ? "1" : "0",
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PDPTE->Entries[Index.PDPTEIndex].ExecuteDisable ? "1" : "0",
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PDPTE->Entries[Index.PDPTEIndex].GetAddress() << 12);
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debug("# %03d-%03d-%03d-%03d: P:%s RW:%s US:%s PWT:%s PCB:%s A:%s NX:%s Address:%#lx",
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Index.PMLIndex, Index.PDPTEIndex, Index.PDEIndex, 0,
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PDE->Entries[Index.PDEIndex].Present ? "1" : "0",
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PDE->Entries[Index.PDEIndex].ReadWrite ? "1" : "0",
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PDE->Entries[Index.PDEIndex].UserSupervisor ? "1" : "0",
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PDE->Entries[Index.PDEIndex].WriteThrough ? "1" : "0",
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PDE->Entries[Index.PDEIndex].CacheDisable ? "1" : "0",
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PDE->Entries[Index.PDEIndex].Accessed ? "1" : "0",
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PDE->Entries[Index.PDEIndex].ExecuteDisable ? "1" : "0",
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PDE->Entries[Index.PDEIndex].GetAddress() << 12);
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debug("# %03d-%03d-%03d-%03d: P:%s RW:%s US:%s PWT:%s PCB:%s A:%s D:%s PAT:%s G:%s PK:%d NX:%s Address:%#lx",
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Index.PMLIndex, Index.PDPTEIndex, Index.PDEIndex, Index.PTEIndex,
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PTE->Entries[Index.PTEIndex].Present ? "1" : "0",
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PTE->Entries[Index.PTEIndex].ReadWrite ? "1" : "0",
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PTE->Entries[Index.PTEIndex].UserSupervisor ? "1" : "0",
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PTE->Entries[Index.PTEIndex].WriteThrough ? "1" : "0",
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PTE->Entries[Index.PTEIndex].CacheDisable ? "1" : "0",
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PTE->Entries[Index.PTEIndex].Accessed ? "1" : "0",
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PTE->Entries[Index.PTEIndex].Dirty ? "1" : "0",
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PTE->Entries[Index.PTEIndex].PageAttributeTable ? "1" : "0",
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PTE->Entries[Index.PTEIndex].Global ? "1" : "0",
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PTE->Entries[Index.PTEIndex].ProtectionKey,
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PTE->Entries[Index.PTEIndex].ExecuteDisable ? "1" : "0",
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PTE->Entries[Index.PTEIndex].GetAddress() << 12);
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#endif
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}
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}
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#endif
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}
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nsa void x87FloatingPointExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("x87 floating point exception");
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UNUSED(Frame);
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}
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nsa void AlignmentCheckExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Alignment check exception");
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UNUSED(Frame);
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}
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nsa void MachineCheckExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Machine check exception");
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UNUSED(Frame);
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}
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nsa void SIMDFloatingPointExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("SIMD floating point exception");
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UNUSED(Frame);
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}
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nsa void VirtualizationExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Virtualization exception");
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UNUSED(Frame);
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}
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nsa void SecurityExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Security exception");
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UNUSED(Frame);
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}
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nsa void UnknownExceptionHandler(CPU::TrapFrame *Frame)
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{
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fixme("Unknown exception");
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UNUSED(Frame);
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}
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