mirror of
https://github.com/Fennix-Project/Kernel.git
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145 lines
3.2 KiB
C++
145 lines
3.2 KiB
C++
/*
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This file is part of Fennix Kernel.
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Fennix Kernel is free software: you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation, either version 3 of
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the License, or (at your option) any later version.
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Fennix Kernel is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef __FENNIX_KERNEL_IDT_H__
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#define __FENNIX_KERNEL_IDT_H__
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#include <types.h>
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namespace InterruptDescriptorTable
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{
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/**
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* Manual: AMD Architecture Programmer's Manual Volume 2: System Programming
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* Subsection: 4.7.4 System Descriptors
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* Table: 4-5
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*
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* @note Reserved values are not listed in the table.
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*/
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enum GateType
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{
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AVAILABLE_16BIT_TSS = 0b0001,
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LDT = 0b0010,
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BUSY_16BIT_TSS = 0b0011,
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CALL_GATE_16BIT = 0b0100,
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TASK_GATE = 0b0101,
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INTERRUPT_GATE_16BIT = 0b0110,
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TRAP_GATE_16BIT = 0b0111,
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AVAILABLE_32BIT_TSS = 0b1001,
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BUSY_32BIT_TSS = 0b1011,
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CALL_GATE_32BIT = 0b1100,
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INTERRUPT_GATE_32BIT = 0b1110,
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TRAP_GATE_32BIT = 0b1111,
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};
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enum PrivilegeLevelType
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{
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RING0 = 0b0,
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RING1 = 0b1,
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RING2 = 0b10,
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RING3 = 0b11,
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};
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struct LDTDescriptor
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{
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/* +0 */
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uint32_t SegmentLimitLow : 16;
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uint32_t BaseAddressLow : 16;
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/* +4 */
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uint32_t BaseAddressMiddle : 8;
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uint32_t Type : 4;
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uint32_t Zero : 1;
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uint32_t DescriptorPrivilegeLevel : 2;
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uint32_t Present : 1;
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uint32_t SegmentLimitHigh : 4;
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uint32_t Available : 1;
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uint32_t Zero1 : 2;
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uint32_t Granularity : 1;
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uint32_t BaseAddressHigh : 8;
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} __packed;
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typedef LDTDescriptor TSSDescriptor;
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struct CallGate
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{
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/* +0 */
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uint32_t TargetCodeSegmentOffsetLow : 16;
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uint32_t TargetCodeSegmentSelector : 16;
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/* +4 */
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uint32_t ParameterCount : 4;
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uint32_t Reserved0 : 3;
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uint32_t Type : 4;
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uint32_t Zero : 1;
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uint32_t DescriptorPrivilegeLevel : 2;
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uint32_t Present : 1;
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uint32_t TargetCodeSegmentOffsetHigh : 16;
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} __packed;
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struct InterruptGate
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{
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/* +0 */
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uint32_t TargetCodeSegmentOffsetLow : 16;
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uint32_t TargetCodeSegmentSelector : 16;
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/* +4 */
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uint32_t Reserved0 : 8;
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uint32_t Type : 4;
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uint32_t Zero : 1;
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uint32_t DescriptorPrivilegeLevel : 2;
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uint32_t Present : 1;
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uint32_t TargetCodeSegmentOffsetHigh : 16;
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} __packed;
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typedef InterruptGate TrapGate;
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struct TaskGate
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{
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/* +0 */
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uint32_t Reserved0 : 16;
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uint32_t TSSSelector : 16;
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/* +4 */
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uint32_t Reserved1 : 8;
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uint32_t Type : 4;
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uint32_t Zero : 1;
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uint32_t DescriptorPrivilegeLevel : 2;
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uint32_t Present : 1;
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uint32_t Reserved2 : 16;
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} __packed;
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union IDTGateDescriptor
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{
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InterruptGate Interrupt;
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TrapGate Trap;
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CallGate Call;
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};
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struct IDTRegister
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{
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uint16_t Limit;
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IDTGateDescriptor *BaseAddress;
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} __packed;
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void SetEntry(uint8_t Index,
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void (*Base)(),
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GateType Gate,
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PrivilegeLevelType Ring,
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bool Present,
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uint16_t SegmentSelector);
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void Init(int Core);
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}
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#endif // !__FENNIX_KERNEL_IDT_H__
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