mirror of
https://github.com/Fennix-Project/Kernel.git
synced 2025-05-28 15:34:33 +00:00
115 lines
3.9 KiB
C++
115 lines
3.9 KiB
C++
#include <smp.hpp>
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#include <interrupts.hpp>
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#include <memory.hpp>
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#include <cpu.hpp>
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#include "../../../kernel.h"
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#if defined(__amd64__)
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#include "../Architecture/amd64/acpi.hpp"
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#include "../Architecture/amd64/cpu/apic.hpp"
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#elif defined(__i386__)
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#elif defined(__aarch64__)
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#endif
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extern "C" uint64_t _trampoline_start, _trampoline_end;
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#define TRAMPOLINE_START 0x2000
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enum SMPTrampolineAddress
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{
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PAGE_TABLE = 0x500,
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START_ADDR = 0x520,
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STACK = 0x570,
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GDT = 0x580,
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IDT = 0x590,
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CORE = 0x600
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};
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volatile bool CPUEnabled = false;
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#pragma GCC diagnostic ignored "-Wmissing-field-initializers"
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static __attribute__((aligned(PAGE_SIZE))) CPUData CPUs[MAX_CPU] = {0};
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CPUData *GetCPU(long id) { return &CPUs[id]; }
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CPUData *GetCurrentCPU() { return (CPUData *)CPU::x64::rdmsr(CPU::x64::MSR_GS_BASE); }
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extern "C" void StartCPU()
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{
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CPU::Interrupts(CPU::Disable);
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CPU::InitializeFeatures();
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uint64_t CoreID = (int)*reinterpret_cast<int *>(CORE);
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// Initialize GDT and IDT
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Interrupts::Initialize(CoreID);
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Interrupts::Enable(CoreID);
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Interrupts::InitializeTimer(CoreID);
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CPU::Interrupts(CPU::Enable);
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KPrint("\e058C19CPU \e8888FF%d \e058C19is online", CoreID);
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CPUEnabled = true;
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while (1)
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CPU::Halt();
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}
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namespace SMP
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{
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int CPUCores = 0;
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void Initialize(void *madt)
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{
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if (strcmp(CPU::Hypervisor(), x86_CPUID_VENDOR_VIRTUALBOX) == 0)
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{
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KPrint("VirtualBox detected, disabling SMP");
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return;
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}
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int Cores = ((ACPI::MADT *)madt)->CPUCores + 1;
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if (Config.Cores > ((ACPI::MADT *)madt)->CPUCores + 1)
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KPrint("More cores requested than available. Using %d cores", ((ACPI::MADT *)madt)->CPUCores + 1);
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else if (Config.Cores != 0)
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Cores = Config.Cores;
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CPUCores = Cores;
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for (uint16_t i = 0; i < Cores; i++)
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{
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debug("Initializing CPU %d", i);
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if ((((APIC::APIC *)Interrupts::apic[0])->Read(APIC::APIC_ID) >> 24) != ((ACPI::MADT *)madt)->lapic[i]->ACPIProcessorId)
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{
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((APIC::APIC *)Interrupts::apic[0])->Write(APIC::APIC_ICRHI, (((ACPI::MADT *)madt)->lapic[i]->APICId << 24));
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((APIC::APIC *)Interrupts::apic[0])->Write(APIC::APIC_ICRLO, 0x500);
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Memory::Virtual().Map(0x0, 0x0, Memory::PTFlag::RW | Memory::PTFlag::US);
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uint64_t TrampolineLength = (uintptr_t)&_trampoline_end - (uintptr_t)&_trampoline_start;
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for (uint64_t i = 0; i < (TrampolineLength / PAGE_SIZE) + 2; i++)
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Memory::Virtual().Map((void *)(TRAMPOLINE_START + (i * PAGE_SIZE)), (void *)(TRAMPOLINE_START + (i * PAGE_SIZE)), Memory::PTFlag::RW | Memory::PTFlag::US);
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memcpy((void *)TRAMPOLINE_START, &_trampoline_start, TrampolineLength);
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POKE(volatile uint64_t, PAGE_TABLE) = CPU::x64::readcr3().raw;
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POKE(volatile uint64_t, STACK) = (uint64_t)KernelAllocator.RequestPages(TO_PAGES(STACK_SIZE)) + STACK_SIZE;
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POKE(volatile uint64_t, CORE) = i;
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asmv("sgdt [0x580]\n"
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"sidt [0x590]\n");
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POKE(volatile uint64_t, START_ADDR) = (uintptr_t)&StartCPU;
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((APIC::APIC *)Interrupts::apic[0])->Write(APIC::APIC_ICRHI, (((ACPI::MADT *)madt)->lapic[i]->APICId << 24));
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((APIC::APIC *)Interrupts::apic[0])->Write(APIC::APIC_ICRLO, 0x600 | ((uint32_t)TRAMPOLINE_START / PAGE_SIZE));
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while (!CPUEnabled)
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CPU::Pause();
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trace("CPU %d loaded.", ((ACPI::MADT *)madt)->lapic[i]->APICId);
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KernelAllocator.FreePages((void *)*reinterpret_cast<long *>(STACK), TO_PAGES(STACK_SIZE));
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CPUEnabled = false;
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}
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else
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KPrint("\e058C19CPU \e8888FF%d \e058C19is the BSP", ((ACPI::MADT *)madt)->lapic[i]->APICId);
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}
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}
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}
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