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Architecture
Core
ExecutionLayer
FileSystem
Files
KernelShell
Library
Modules
AHCI
ATA
AdvancedMicroDevices
AudioCodec97
AudioCodec97.cpp
ac97.hpp
Intel
PersonalSystem2
Realtek
VMware
BuiltinModuleLoader.cpp
drv.hpp
Network
Profiling
SystemCalls
Tasking
Tests
Virtualization
include
include_std
.gitignore
DAPI.hpp
Doxyfile
Fex.hpp
Kernel.cpp
KernelConfig.cpp
KernelThread.cpp
LICENSE
Makefile
README.md
dump.sh
ipc.h
kernel.h
syscalls.h
372 lines
10 KiB
C++
372 lines
10 KiB
C++
#include "ac97.hpp"
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#include <debug.h>
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#include <pci.hpp>
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#include <io.h>
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#include "../../DAPI.hpp"
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#include "../drv.hpp"
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using namespace PCI;
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namespace AudioCodec97
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{
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KernelAPI KAPI;
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/* https://wiki.osdev.org/AC97 */
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PCIDeviceHeader *PCIBaseAddress;
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BARData BAR;
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BufferDescriptorList *DescriptorList = nullptr;
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AudioEncodingValues Encoding = AE_PCMs16le;
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char Channels = 2;
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uint8_t Volume = AV_Maximum;
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bool Mute = false;
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int SampleRate = 48000;
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char SampleSize = 2;
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uint16_t MixerVolume(uint8_t Left, uint8_t Right, bool Mute)
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{
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return ((uint16_t)((Right & 0x3F) |
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((Left & 0x3F) << 0x8) |
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(Mute & 1 << 0xF)));
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}
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int DriverEntry(void *Data)
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{
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if (!Data)
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return INVALID_KERNEL_API;
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KAPI = *(KernelAPI *)Data;
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if (KAPI.Version.Major < 0 || KAPI.Version.Minor < 0 || KAPI.Version.Patch < 0)
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return KERNEL_API_VERSION_NOT_SUPPORTED;
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return OK;
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}
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int CallbackHandler(KernelCallback *Data)
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{
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switch (Data->Reason)
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{
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case AcknowledgeReason:
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{
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debug("Kernel acknowledged the driver.");
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break;
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}
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case ConfigurationReason:
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{
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debug("Driver received configuration data.");
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PCIBaseAddress = reinterpret_cast<PCIDeviceHeader *>(Data->RawPtr);
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PCIBaseAddress->Command |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
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/* Native Audio Mixer Base Address */
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uint32_t PCIBAR0 = ((PCIHeader0 *)PCIBaseAddress)->BAR0;
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/* Native Audio Bus Master Base Address */
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uint32_t PCIBAR1 = ((PCIHeader0 *)PCIBaseAddress)->BAR1;
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BAR.Type = PCIBAR0 & 1;
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BAR.MixerAddress = (uint16_t)(PCIBAR0 & (~3));
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BAR.BusMasterAddress = PCIBAR1 & (~15);
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if (BAR.Type != 1)
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{
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error("BAR0 is not I/O.");
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return INVALID_PCI_BAR;
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}
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uint16_t OutputPCMTransferControl = (uint16_t)(BAR.BusMasterAddress + PCMOUT_TransferControl);
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/* DescriptorList address MUST be physical. */
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DescriptorList = (BufferDescriptorList *)KAPI.Memory.RequestPage((sizeof(BufferDescriptorList) * DescriptorListLength) / KAPI.Memory.PageSize + 1);
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memset(DescriptorList, 0, sizeof(BufferDescriptorList) * DescriptorListLength);
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uint16_t DLSampleCount = (uint16_t)(KAPI.Memory.PageSize / SampleSize);
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for (int i = 0; i < DescriptorListLength; i++)
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{
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int DescriptorPages = (int)(sizeof(uint16_t *) / KAPI.Memory.PageSize + 1);
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DescriptorList[i].Address = (uint32_t)(uint64_t)KAPI.Memory.RequestPage(DescriptorPages);
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DescriptorList[i].SampleCount = DLSampleCount;
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DescriptorList[i].Flags = 0;
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debug("DescriptorList[%d] = { Address: 0x%x (%d %s), SampleCount: %d, Flags: 0x%x }",
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i,
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DescriptorList[i].Address, DescriptorPages, DescriptorPages == 1 ? "page" : "pages",
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DescriptorList[i].SampleCount,
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DescriptorList[i].Flags);
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}
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outw(BAR.MixerAddress + NAM_MasterVolume, MixerVolume(Volume, Volume, Mute));
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outw(BAR.MixerAddress + NAM_PCMOutVolume, MixerVolume(Volume, Volume, Mute));
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outb(OutputPCMTransferControl, inb(OutputPCMTransferControl) | TC_TransferReset);
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while (inb(OutputPCMTransferControl) & TC_TransferReset)
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;
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uint32_t GlobalControl = inl((uint16_t)(BAR.BusMasterAddress + NABM_GlobalControl));
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GlobalControl = (GlobalControl & ~((0x3U) << 22)); /* PCM 16-bit mode */
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GlobalControl = (GlobalControl & ~((0x3U) << 20)); /* 2 channels */
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GlobalControl |= GC_GlobalInterruptEnable;
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GlobalControl &= ~GC_ShutDown;
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outl((uint16_t)(BAR.BusMasterAddress + PCMOUT_BufferDescriptorList), (uint32_t)(uint64_t)DescriptorList);
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outl((uint16_t)(BAR.BusMasterAddress + NABM_GlobalControl), GlobalControl);
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uint8_t TransferControl = inb(OutputPCMTransferControl);
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TransferControl |= TC_LastBufferEntryInterruptEnable | TC_IOCInterruptEnable | TC_FifoERRORInterruptEnable;
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outb(OutputPCMTransferControl, TransferControl);
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// Stop DMA
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outb(OutputPCMTransferControl, inb(OutputPCMTransferControl) & ~TC_DMAControllerControl);
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debug("AC'97 configured.");
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break;
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}
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case AdjustReason:
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{
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if (Data->AudioCallback.Adjust._Volume)
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{
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Volume = (uint8_t)(0x3F - (0x3F * Data->AudioCallback.Adjust.Volume / 100));
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outw(BAR.MixerAddress + NAM_MasterVolume, MixerVolume(Volume, Volume, Mute));
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// outw(BAR.MixerAddress + NAM_PCMOutVolume, MixerVolume(Volume, Volume, Mute));
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}
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else if (Data->AudioCallback.Adjust._Encoding)
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{
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fixme("Encoding changing not supported yet.");
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}
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else if (Data->AudioCallback.Adjust._SampleRate)
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{
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switch (Data->AudioCallback.Adjust.SampleRate)
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{
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case 0:
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{
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SampleRate = 8000;
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break;
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}
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case 1:
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{
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SampleRate = 11025;
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break;
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}
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case 2:
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{
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SampleRate = 16000;
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break;
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}
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case 3:
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{
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SampleRate = 22050;
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break;
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}
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case 4:
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{
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SampleRate = 32000;
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break;
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}
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case 5:
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{
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SampleRate = 44100;
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break;
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}
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case 6:
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{
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SampleRate = 48000;
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break;
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}
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case 7:
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{
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SampleRate = 88200;
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break;
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}
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case 8:
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{
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SampleRate = 96000;
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break;
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}
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default:
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{
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SampleRate = 16000;
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error("Invalid sample rate. Defaulting to 16000.");
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break;
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}
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}
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}
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else if (Data->AudioCallback.Adjust._Channels)
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{
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switch (Data->AudioCallback.Adjust.Channels)
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{
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case 0:
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{
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Channels = 1; // Mono
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break;
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}
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case 1:
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{
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Channels = 2; // Stereo
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break;
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}
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default:
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{
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Channels = 2;
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error("Invalid channel count. Defaulting to 2.");
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break;
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}
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}
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}
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break;
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}
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case QueryReason:
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{
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Data->AudioCallback.Fetch.Volume = (unsigned char)((inw(BAR.MixerAddress + NAM_MasterVolume) & 0x3F) * 100 / 0x3F);
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Data->AudioCallback.Fetch.Encoding = Encoding; /* FIXME */
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// Data->AudioCallback.Fetch.SampleRate = SampleRate; /* FIXME */
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Data->AudioCallback.Fetch.Channels = Channels;
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break;
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}
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case SendReason:
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{
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unsigned char *Buffer = (unsigned char *)Data->AudioCallback.Send.Data;
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unsigned int Length = (unsigned int)Data->AudioCallback.Send.Length;
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if (Buffer == nullptr)
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{
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error("Invalid buffer.");
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return INVALID_DATA;
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}
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if ((Length == 0) || (Length % (SampleSize * Channels)))
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{
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error("Invalid buffer length.");
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return INVALID_DATA;
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}
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int TotalBDLToFill = (int)((Length + KAPI.Memory.PageSize - 1) >> 12);
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while (Length > 0)
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{
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bool ActiveDMA = !(inw((uint16_t)(BAR.BusMasterAddress + PCMOUT_Status)) & TC_DMAControllerControl);
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if (ActiveDMA)
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{
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int RemainingBDL = 0;
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do
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{
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int CurrentBDL = inb((uint16_t)(BAR.BusMasterAddress + PCMOUT_BufferDescriptorEntry));
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int LastBDL = inb((uint16_t)(BAR.BusMasterAddress + PCMOUT_DescriptorEntries));
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RemainingBDL = LastBDL - CurrentBDL;
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if (RemainingBDL < 0)
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RemainingBDL += DescriptorListLength;
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RemainingBDL += 1;
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if (RemainingBDL >= DescriptorListLength - 1)
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{
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long SampleCount = DescriptorList[(CurrentBDL + 1) % DescriptorListLength].SampleCount / Channels;
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if (SampleCount > 0)
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KAPI.Util.Sleep(SampleCount * 1000 / SampleRate); // milliseconds
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}
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} while (RemainingBDL >= DescriptorListLength - 1 && !(inw((uint16_t)(BAR.BusMasterAddress + PCMOUT_Status)) & TC_DMAControllerControl));
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}
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{
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uint8_t CurrentBDL = inb((uint16_t)(BAR.BusMasterAddress + PCMOUT_BufferDescriptorEntry));
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uint8_t LastBDL = inb((uint16_t)(BAR.BusMasterAddress + PCMOUT_DescriptorEntries));
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uint8_t NextBDL = LastBDL % DescriptorListLength;
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ActiveDMA = !(inw((uint16_t)(BAR.BusMasterAddress + PCMOUT_Status)) & TC_DMAControllerControl);
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if (ActiveDMA)
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{
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NextBDL = (uint8_t)((LastBDL + 1) % DescriptorListLength);
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if (NextBDL == CurrentBDL)
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continue;
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}
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do
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{
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size_t Wrote = (KAPI.Memory.PageSize > Length) ? size_t(Length)
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: size_t(KAPI.Memory.PageSize);
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if (Wrote == 0)
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break;
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memcpy((void *)((uint64_t)DescriptorList[NextBDL].Address), Buffer, Wrote);
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DescriptorList[NextBDL].Flags = 0;
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Buffer += Wrote;
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Length -= (unsigned int)Wrote;
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DescriptorList[NextBDL].SampleCount = (uint16_t)(Wrote / SampleSize);
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TotalBDLToFill--;
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NextBDL = (uint8_t)((NextBDL + 1) % DescriptorListLength);
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} while (TotalBDLToFill-- && NextBDL != CurrentBDL);
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outb((uint16_t)(BAR.BusMasterAddress + PCMOUT_DescriptorEntries), NextBDL - 1);
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ActiveDMA = !(inw((uint16_t)(BAR.BusMasterAddress + PCMOUT_Status)) & TC_DMAControllerControl);
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if (!ActiveDMA)
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{
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// Start DMA
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outb((uint16_t)(BAR.BusMasterAddress + PCMOUT_TransferControl), inb((uint16_t)(BAR.BusMasterAddress + PCMOUT_TransferControl) | TC_DMAControllerControl));
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}
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}
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}
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break;
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}
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case StopReason:
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{
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outw(BAR.MixerAddress + NAM_MasterVolume, MixerVolume(AV_Maximum, AV_Maximum, true));
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outw(BAR.MixerAddress + NAM_PCMOutVolume, MixerVolume(AV_Maximum, AV_Maximum, true));
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// Stop DMA
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outb((uint16_t)(BAR.BusMasterAddress + PCMOUT_TransferControl), inb((uint16_t)(BAR.BusMasterAddress + PCMOUT_TransferControl)) & ~TC_DMAControllerControl);
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// Disable interrupts
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uint8_t TransferControl = inb((uint16_t)(BAR.BusMasterAddress + PCMOUT_TransferControl));
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TransferControl &= ~(TC_LastBufferEntryInterruptEnable | TC_IOCInterruptEnable | TC_FifoERRORInterruptEnable);
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outb((uint16_t)(BAR.BusMasterAddress + PCMOUT_TransferControl), TransferControl);
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// Disable global control
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uint32_t GlobalControl = inl((uint16_t)(BAR.BusMasterAddress + NABM_GlobalControl));
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GlobalControl &= ~GC_GlobalInterruptEnable;
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GlobalControl |= GC_ShutDown;
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outl((uint16_t)(BAR.BusMasterAddress + NABM_GlobalControl), GlobalControl);
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debug("Driver stopped.");
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break;
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}
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default:
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{
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warn("Unknown reason.");
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break;
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}
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}
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return OK;
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}
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int InterruptCallback(CPURegisters *)
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{
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uint16_t Status = inw(BAR.MixerAddress + PCMOUT_Status);
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if (Status & TC_IOCInterruptEnable)
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{
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debug("Interrupt on completion.");
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}
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else if (Status & TC_LastBufferEntryInterruptEnable)
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{
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debug("Last buffer entry.");
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// Stop DMA
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outb((uint16_t)(BAR.BusMasterAddress + PCMOUT_TransferControl), inb((uint16_t)(BAR.BusMasterAddress + PCMOUT_TransferControl)) & ~TC_DMAControllerControl);
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}
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else if (Status & TC_FifoERRORInterruptEnable)
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{
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debug("FIFO error.");
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}
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else if (Status != 0x0)
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{
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error("Unknown status: %#lx", Status);
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}
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outw(BAR.MixerAddress + PCMOUT_Status, 0xFFFF);
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return OK;
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}
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}
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