6 Commits

Author	SHA1	Message	Date
EnderIce2	7d1041a3bd	Refactor interrupt handling code	2024-03-13 18:46:01 +02:00
EnderIce2	f34f6f94c6	Change the IDT table to use interrupt gate	2024-02-28 04:48:05 +02:00
EnderIce2	1bc7c4b4dd	Fix ExceptionHandlerStub to work with CPU::ExceptionFrame	2024-02-15 22:09:33 +02:00
EnderIce2	96daa43d38	Update kernel	2024-01-19 06:47:42 +02:00
EnderIce2	cfee4807c4	ISR 0x1 should have RING3	2023-10-20 01:42:24 +03:00
Alex	889e1522a3	Restructured and rewritten entire codebase	2023-10-09 01:16:24 +03:00