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Removal of NASM support and migration of .asm files to .s

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This commit is contained in:
Alex
2023-08-11 04:57:32 +03:00
parent 0dc4593625
commit ef3b761d4f
24 changed files with 868 additions and 1053 deletions
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22
Architecture/amd64/Bootstrap/Multiboot/1/Start.asm
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@@ -1,22 +0,0 @@
; This file is part of Fennix Kernel.
;
; Fennix Kernel is free software: you can redistribute it and/or
; modify it under the terms of the GNU General Public License as
; published by the Free Software Foundation, either version 3 of
; the License, or (at your option) any later version.
;
; Fennix Kernel is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
[bits 32]
section .bootstrap.text
global Multiboot1_start
Multiboot1_start:
int3

23
Architecture/amd64/Bootstrap/Multiboot/1/Start.s Normal file
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@@ -0,0 +1,23 @@
/*
This file is part of Fennix Kernel.
Fennix Kernel is free software: you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation, either version 3 of
the License, or (at your option) any later version.
Fennix Kernel is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
*/
.code32
.section .bootstrap.text
.global Multiboot1_start
Multiboot1_start:
jmp .

16
Architecture/amd64/Bootstrap/Multiboot/2/Detect.s
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@@ -25,7 +25,7 @@ DetectCPUID:
pushfd
pop eax
mov ecx, eax
xor eax, 1 << 21
xor eax, 0x200000
push eax
popfd
pushfd
@@ -34,7 +34,7 @@ DetectCPUID:
popfd
xor eax, ecx
jz .NoCPUID
mov eax, 1
mov eax, 0x1
ret
.NoCPUID:
xor eax, eax
@@ -48,9 +48,9 @@ Detect64Bit:
jb .NoLongMode
mov eax, 0x80000001
cpuid
test edx, 1 << 29
test edx, 0x20000000
jz .NoLongMode
mov eax, 1
mov eax, 0x1
ret
.NoLongMode:
xor eax, eax
@@ -58,11 +58,11 @@ Detect64Bit:
.global DetectPSE
DetectPSE:
mov eax, 0x00000001
mov eax, 0x00000001
cpuid
test edx, 0x00000008
jz .NoPSE
mov eax, 1
mov eax, 0x1
ret
.NoPSE:
xor eax, eax
@@ -70,11 +70,11 @@ DetectPSE:
.global DetectPAE
DetectPAE:
mov eax, 0x00000001
mov eax, 0x00000001
cpuid
test edx, 0x00000040
jz .NoPAE
mov eax, 1
mov eax, 0x1
ret
.NoPAE:
xor eax, eax

22
Architecture/amd64/Bootstrap/Multiboot/2/GDT32.s
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@@ -15,8 +15,6 @@
along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
*/
.intel_syntax noprefix
.code32
.section .bootstrap.text
@@ -48,19 +46,19 @@ GDT32:
.word 0x4092
.byte 0x00
GDT32_END:
nop
.global LoadGDT32
LoadGDT32:
lgdt [gdtr]
ljmp $0x8, $ActivateGDT
jmp 0x8:ActivateGDT
ActivateGDT:
mov cx, 0x10
mov ss, cx
mov ds, cx
mov es, cx
mov fs, cx
mov cx, 0x18
mov gs, cx
ActivateGDT:
mov $0x10, %cx
mov %cx, %ss
mov %cx, %ds
mov %cx, %es
mov %cx, %fs
mov $0x18, %cx
mov %cx, %gs
ret

35
Architecture/amd64/Bootstrap/Multiboot/2/GDT64.s
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@@ -15,49 +15,48 @@
along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
*/
.intel_syntax noprefix
.code64
.section .bootstrap.data
/* Access bits */
.equ A, 1 << 0
.equ RW, 1 << 1
.equ DC, 1 << 2
.equ E, 1 << 3
.equ S, 1 << 4
.equ DPL0, 0 << 5
.equ DPL1, 1 << 5
.equ P, 1 << 7
A = 0x1
RW = 0x2
DC = 0x4
E = 0x8
S = 0x10
DPL0 = 0x0 /* 0 << 5 ???? */
DPL1 = 0x20
P = 0x80
/* Flags bits */
.equ LONG_MODE, 1 << 5
.equ SZ_32, 1 << 6
.equ GRAN_4K, 1 << 7
LONG_MODE = 0x20
SZ_32 = 0x40
GRAN_4K = 0x80
.global GDT64.Null
.global GDT64.Code
.global GDT64.Data
.global GDT64.Tss
.global GDT64.Ptr
GDT64:
.equ GDT64.Null, $ - GDT64
GDT64.Null = . - GDT64
.quad 0
.equ GDT64.Code, $ - GDT64
GDT64.Code = . - GDT64
.long 0xFFFF
.byte 0
.byte P | S | E | RW
.byte GRAN_4K | LONG_MODE | 0xF
.byte 0
.equ GDT64.Data, $ - GDT64
GDT64.Data = . - GDT64
.long 0xFFFF
.byte 0
.byte P | S | RW
.byte GRAN_4K | SZ_32 | 0xF
.byte 0
.equ GDT64.Tss, $ - GDT64
GDT64.Tss = . - GDT64
.long 0x00000068
.long 0x00CF8900
GDT64.Ptr:
.word $ - GDT64 - 1
.word . - GDT64 - 1
.quad GDT64

3
Architecture/amd64/Bootstrap/Multiboot/2/Header.s
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@@ -15,8 +15,6 @@
along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
*/
.intel_syntax noprefix
.code32
.extern Multiboot2_start
@@ -91,3 +89,4 @@ EndTag_Start:
.long EndTag_End - EndTag_Start
EndTag_End:
MULTIBOOT2_HEADER_END:
nop

61
Architecture/amd64/Bootstrap/Multiboot/2/Multiboot_PageTable.asm
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@@ -1,61 +0,0 @@
; This file is part of Fennix Kernel.
;
; Fennix Kernel is free software: you can redistribute it and/or
; modify it under the terms of the GNU General Public License as
; published by the Free Software Foundation, either version 3 of
; the License, or (at your option) any later version.
;
; Fennix Kernel is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
[bits 32]
PAGE_TABLE_SIZE equ 0x4
section .bootstrap.data
align 0x1000
global BootPageTable
BootPageTable:
times (0x10000) dq 0 ; 0x4000 bytes will be used in UpdatePageTable
section .bootstrap.text
global UpdatePageTable
UpdatePageTable:
mov edi, (BootPageTable + 0x0000) ; First PML4E
mov eax, (BootPageTable + 0x1000) ; First PDPTE
or eax, 11b ; Bitwise OR on rax (PDPTE) with 11b (Present, Write)
mov dword [edi], eax ; Write 11b to PML4E
mov edi, (BootPageTable + 0x1000) ; First PDPTE
mov eax, (BootPageTable + 0x2000) ; First PDE
or eax, 11b ; Bitwise OR on rax (PDE) with 11b (Present, Write)
mov ecx, PAGE_TABLE_SIZE ; For loop instruction
mov ebx, 0x0 ; Value to store in the next 4 bytes
.FillPageTableLevel3:
mov dword [edi], eax ; Store modified PDE in PDPTE
mov dword [edi + 4], ebx ; Store the rbx value in the next 4 bytes
add eax, 0x1000 ; Increment (page size)
adc ebx, 0 ; Add 0 to carry flag
add edi, 8 ; Add 8 to rdi (next PDE)
loop .FillPageTableLevel3 ; Loop until rcx is 0
mov edi, (BootPageTable + 0x2000) ; First PDE
mov eax, 10000011b ; Present, Write, Large Page
mov ecx, (512 * PAGE_TABLE_SIZE) ; For loop instruction
mov ebx, 0x0 ; Value to store in the next 4 bytes
.FillPageTableLevel2:
mov dword [edi], eax ; Store modified PDE in PDPTE
mov dword [edi + 4], ebx ; Store the rbx value in the next 4 bytes
add eax, 1 << 21 ; Increment (page size)
adc ebx, 0 ; Add 0 (carry flag) to rbx to increment if there was a carry
add edi, 8 ; Add 8 to rdi (next PDE)
loop .FillPageTableLevel2 ; Loop until rcx is 0
ret

62
Architecture/amd64/Bootstrap/Multiboot/2/Multiboot_PageTable.s Normal file
View File

@@ -0,0 +1,62 @@
/*
This file is part of Fennix Kernel.
Fennix Kernel is free software: you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation, either version 3 of
the License, or (at your option) any later version.
Fennix Kernel is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
*/
PAGE_TABLE_SIZE = 0x4
.code32
.section .bootstrap.data
.align 0x1000
.global BootPageTable
BootPageTable:
.space 0x10000 /* 0x4000 bytes will be used in UpdatePageTable */
.section .bootstrap.text
.global UpdatePageTable
UpdatePageTable:
mov $(BootPageTable + 0x0000), %edi /* First PML4E */
mov $(BootPageTable + 0x1000), %eax /* First PDPTE */
or $0x3, %eax /* Bitwise OR on eax (PDPTE) with 11b (Present, Write) */
mov %eax, (%edi) /* Write 11b to PML4E */
mov $(BootPageTable + 0x1000), %edi /* First PDPTE */
mov $(BootPageTable + 0x2000), %eax /* First PDE */
or $0x3, %eax /* Bitwise OR on eax (PDE) with 11b (Present, Write) */
mov $PAGE_TABLE_SIZE, %ecx /* For loop instruction */
mov $0x0, %ebx /* Value to store in the next 4 bytes */
.FillPageTableLevel3:
mov %eax, (%edi) /* Store modified PDE in PDPTE */
mov %ebx, 0x4(%edi) /* Store the ebx value in the next 4 bytes */
add $0x1000, %eax /* Increment (page size) */
adc $0x0, %ebx /* Add 0 to carry flag */
add $0x8, %edi /* Add 8 to edi (next PDE) */
loop .FillPageTableLevel3 /* Loop until ecx is 0 */
mov $(BootPageTable + 0x2000), %edi /* First PDE */
mov $0x83, %eax /* Present, Write, Large Page */
mov $(512 * PAGE_TABLE_SIZE), %ecx /* For loop instruction */
mov $0x0, %ebx /* Value to store in the next 4 bytes */
.FillPageTableLevel2:
mov %eax, (%edi) /* Store modified PDE in PDPTE */
mov %ebx, 0x4(%edi) /* Store the ebx value in the next 4 bytes */
add $0x200000, %eax /* Increment (page size) */
adc $0x0, %ebx /* Add 0 (carry flag) to ebx to increment if there was a carry */
add $0x8, %edi /* Add 8 to edi (next PDE) */
loop .FillPageTableLevel2 /* Loop until ecx is 0 */
ret

67
Architecture/amd64/Bootstrap/Multiboot/2/Multiboot_PageTable.s_fixme
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@@ -1,67 +0,0 @@
/*
This file is part of Fennix Kernel.
Fennix Kernel is free software: you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation, either version 3 of
the License, or (at your option) any later version.
Fennix Kernel is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
*/
.intel_syntax noprefix
.code32
.equ PAGE_TABLE_SIZE, 0x4
.section .bootstrap.data
.align 0x1000
.global BootPageTable
BootPageTable:
.rept 0x10000 /* 0x4000 bytes will be used in UpdatePageTable */
.long 0
.endr
.section .bootstrap.text
.global UpdatePageTable
UpdatePageTable:
mov edi, (BootPageTable + 0x0000) /* First PML4E */
mov eax, (BootPageTable + 0x1000) /* First PDPTE */
or eax, 0b11 /* Bitwise OR on rax (PDPTE) with 11b (Present, Write) */
mov dword [edi], eax /* Write 11b to PML4E */
mov edi, (BootPageTable + 0x1000) /* First PDPTE */
mov eax, (BootPageTable + 0x2000) /* First PDE */
or eax, 0b11 /* Bitwise OR on rax (PDE) with 11b (Present, Write) */
mov ecx, PAGE_TABLE_SIZE /* For loop instruction */
mov ebx, 0x0 /* Value to store in the next 4 bytes */
.FillPageTableLevel3:
mov dword [edi], eax /* Store modified PDE in PDPTE */
mov dword [edi + 4], ebx /* Store the rbx value in the next 4 bytes */
add eax, 0x1000 /* Increment (page size) */
adc ebx, 0 /* Add 0 to carry flag */
add edi, 8 /* Add 8 to rdi (next PDE) */
loop .FillPageTableLevel3 /* Loop until rcx is 0 */
mov edi, (BootPageTable + 0x2000) /* First PDE */
mov eax, 0b10000011 /* Present, Write, Large Page */
mov ecx, (512 * PAGE_TABLE_SIZE) /* For loop instruction */
mov ebx, 0x0 /* Value to store in the next 4 bytes */
.FillPageTableLevel2:
mov dword [edi], eax /* Store modified PDE in PDPTE */
mov dword [edi + 4], ebx /* Store the rbx value in the next 4 bytes */
add eax, 1 << 21 /* Increment (page size) */
adc ebx, 0 /* Add 0 (carry flag) to rbx to increment if there was a carry */
add edi, 8 /* Add 8 to rdi (next PDE) */
loop .FillPageTableLevel2 /* Loop until rcx is 0 */
ret

112
Architecture/amd64/Bootstrap/Multiboot/2/Start.asm
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@@ -1,112 +0,0 @@
; This file is part of Fennix Kernel.
;
; Fennix Kernel is free software: you can redistribute it and/or
; modify it under the terms of the GNU General Public License as
; published by the Free Software Foundation, either version 3 of
; the License, or (at your option) any later version.
;
; Fennix Kernel is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
[bits 32]
KERNEL_STACK_SIZE equ 0x4000 ; 16KB
extern DetectCPUID
extern Detect64Bit
extern DetectPSE
extern DetectPAE
extern multiboot_main
extern LoadGDT32
extern BootPageTable
extern UpdatePageTable
extern GDT64.Ptr
extern GDT64.Code
extern GDT64.Data
section .bootstrap.data
MB_HeaderMagic:
dq 0
MB_HeaderInfo:
dq 0
section .bootstrap.text
global Multiboot2_start
Multiboot2_start:
cli
mov [MB_HeaderMagic], eax
mov [MB_HeaderInfo], ebx
call DetectCPUID
cmp eax, 0
je $
call Detect64Bit
cmp eax, 0
je $
call DetectPSE
cmp eax, 0
je $
call DetectPAE
cmp eax, 0
je $
mov ecx, cr4
or ecx, 0x00000010 ; Set PSE in CR4
or ecx, 0x00000020 ; Set PAE in CR4
mov cr4, ecx
call LoadGDT32
call UpdatePageTable
mov ecx, BootPageTable
mov cr3, ecx
mov ecx, 0xC0000080 ; EFER
rdmsr
or eax, 0x800 | 0x100 | 0x1 ; Set LME, LMA, SCE
wrmsr
mov ecx, cr0
or ecx, 0x80000001 ; Set PG and PE in CR0
mov cr0, ecx
lgdt [GDT64.Ptr]
jmp GDT64.Code:HigherHalfStart
extern UpdatePageTable64
[bits 64]
HigherHalfStart:
mov ax, GDT64.Data
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
call UpdatePageTable64
mov rsp, KernelStack + KERNEL_STACK_SIZE
mov rdi, [MB_HeaderMagic]
mov rsi, [MB_HeaderInfo]
push rsi
push rdi
call multiboot_main
.Hang:
hlt
jmp .Hang
section .bootstrap.bss
align 16
KernelStack:
resb KERNEL_STACK_SIZE

76
Architecture/amd64/Bootstrap/Multiboot/2/Start.s_fixme → Architecture/amd64/Bootstrap/Multiboot/2/Start.s
View File

@@ -15,10 +15,8 @@
along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
*/
.intel_syntax noprefix
.code32
.equ KERNEL_STACK_SIZE, 0x4000 /* 16KB */
KERNEL_STACK_SIZE = 0x4000 /* 16KB */
.extern DetectCPUID
.extern Detect64Bit
@@ -45,67 +43,71 @@ MB_HeaderInfo:
Multiboot2_start:
cli
mov [MB_HeaderMagic], eax
mov [MB_HeaderInfo], ebx
mov %eax, [MB_HeaderMagic]
mov %ebx, [MB_HeaderInfo]
call DetectCPUID
cmp eax, 0
je $
cmp $0, %eax
je .
call Detect64Bit
cmp eax, 0
je $
cmp $0, %eax
je .
call DetectPSE
cmp eax, 0
je $
cmp $0, %eax
je .
call DetectPAE
cmp eax, 0
je $
cmp $0, %eax
je .
mov ecx, cr4
or ecx, 0x00000010 /* Set PSE in CR4 */
or ecx, 0x00000020 /* Set PAE in CR4 */
mov cr4, ecx
mov %cr4, %ecx
or $0x00000010, %ecx /* PSE */
or $0x00000020, %ecx /* PAE */
mov %ecx, %cr4
call LoadGDT32
call UpdatePageTable
mov ecx, BootPageTable
mov cr3, ecx
mov $BootPageTable, %ecx
mov %ecx, %cr3
mov ecx, 0xC0000080 /* EFER */
mov $0xC0000080, %ecx /* EFER */
rdmsr
or eax, 0x800 | 0x100 | 0x1 /* Set LME, LMA, SCE */
or $0x800, %eax /* LME */
or $0x100, %eax /* LMA */
or $0x1, %eax /* SCE */
wrmsr
mov ecx, cr0
or ecx, 0x80000001 /* Set PG and PE in CR0 */
mov cr0, ecx
mov %cr0, %ecx
or $0x80000000, %ecx /* PG */
or $0x1, %ecx /* PE */
mov %ecx, %cr0
lgdt [GDT64.Ptr]
jmp GDT64.Code:HigherHalfStart
ljmp $GDT64.Code, $HigherHalfStart
.extern UpdatePageTable64
.code64
HigherHalfStart:
mov ax, GDT64.Data
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
mov GDT64.Data, %ax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov %ax, %ss
call UpdatePageTable64
mov rsp, KernelStack + KERNEL_STACK_SIZE
mov rbp, 0
mov rdi, [MB_HeaderMagic]
mov rsi, [MB_HeaderInfo]
push rsi
push rdi
mov $(KernelStack + KERNEL_STACK_SIZE), %rsp
mov $0x0, %rbp
mov [MB_HeaderMagic], %rdi
mov [MB_HeaderInfo], %rsi
push %rsi
push %rdi
call multiboot_main
.Hang:
hlt