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https://github.com/Fennix-Project/Kernel.git
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More tasking implementation
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@ -728,6 +728,8 @@ namespace CPU
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typedef enum
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{
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/* ISR */
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ISR0 = 0x0, // Divide-by-zero Error
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ISR1 = 0x1, // Debug
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ISR2 = 0x2, // Non-maskable Interrupt
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@ -761,26 +763,29 @@ namespace CPU
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ISR30 = 0x1e, // Security Exception
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ISR31 = 0x1f, // Reserved
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IRQ0 = 0x20, // Programmable Interrupt Timer Interrupt
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IRQ1 = 0x21, // Keyboard Interrupt
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IRQ2 = 0x22, // Cascade (used internally by the two PICs. never raised)
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IRQ3 = 0x23, // COM2 (if enabled)
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IRQ4 = 0x24, // COM1 (if enabled)
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IRQ5 = 0x25, // LPT2 (if enabled)
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IRQ6 = 0x26, // Floppy Disk
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IRQ7 = 0x27, // LPT1 / Unreliable "spurious" interrupt (usually)
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IRQ8 = 0x28, // CMOS real-time clock (if enabled)
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IRQ9 = 0x29, // Free for peripherals / legacy SCSI / NIC
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IRQ10 = 0x2a, // Free for peripherals / SCSI / NIC
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IRQ11 = 0x2b, // Free for peripherals / SCSI / NIC
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IRQ12 = 0x2c, // PS2 Mouse
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IRQ13 = 0x2d, // FPU / Coprocessor / Inter-processor
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IRQ14 = 0x2e, // Primary ATA Hard Disk
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IRQ15 = 0x2f, // Secondary ATA Hard Disk
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/* IRQ */
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IRQ16 = 0x30, // Reserved for multitasking
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IRQ17 = 0x31, // Reserved for monotasking
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IRQ0 = 0x20, // Programmable Interrupt Timer Interrupt
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IRQ1 = 0x21, // Keyboard Interrupt
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IRQ2 = 0x22, // Cascade (used internally by the two PICs. never raised)
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IRQ3 = 0x23, // COM2 (if enabled)
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IRQ4 = 0x24, // COM1 (if enabled)
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IRQ5 = 0x25, // LPT2 (if enabled)
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IRQ6 = 0x26, // Floppy Disk
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IRQ7 = 0x27, // LPT1 / Unreliable "spurious" interrupt (usually)
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IRQ8 = 0x28, // CMOS real-time clock (if enabled)
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IRQ9 = 0x29, // Free for peripherals / legacy SCSI / NIC
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IRQ10 = 0x2a, // Free for peripherals / SCSI / NIC
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IRQ11 = 0x2b, // Free for peripherals / SCSI / NIC
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IRQ12 = 0x2c, // PS2 Mouse
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IRQ13 = 0x2d, // FPU / Coprocessor / Inter-processor
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IRQ14 = 0x2e, // Primary ATA Hard Disk
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IRQ15 = 0x2f, // Secondary ATA Hard Disk
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/* Reserved by OS */
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IRQ16 = 0x30, // Reserved for multitasking
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IRQ17 = 0x31,
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IRQ18 = 0x32,
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IRQ19 = 0x33,
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IRQ20 = 0x34,
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@ -793,6 +798,9 @@ namespace CPU
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IRQ27 = 0x3b,
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IRQ28 = 0x3c,
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IRQ29 = 0x3d,
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/* Free */
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IRQ30 = 0x3e,
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IRQ31 = 0x3f,
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IRQ32 = 0x40,
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@ -49,6 +49,7 @@ CPUData *GetCPU(long ID);
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namespace SMP
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{
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extern int CPUCores;
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void Initialize(void *madt);
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}
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163
include/task.hpp
163
include/task.hpp
@ -3,13 +3,118 @@
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#include <types.h>
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#include <vector.hpp>
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#include <memory.hpp>
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namespace Tasking
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{
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typedef unsigned long IP;
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typedef unsigned long IPOffset;
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typedef unsigned long UPID;
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typedef unsigned long UTID;
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typedef unsigned long Token;
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struct ThreadFrame
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{
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#if defined(__amd64__)
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// uint64_t gs; // General-purpose Segment
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// uint64_t fs; // General-purpose Segment
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// uint64_t es; // Extra Segment (used for string operations)
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uint64_t ds; // Data Segment
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uint64_t r15; // General purpose
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uint64_t r14; // General purpose
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uint64_t r13; // General purpose
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uint64_t r12; // General purpose
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uint64_t r11; // General purpose
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uint64_t r10; // General purpose
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uint64_t r9; // General purpose
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uint64_t r8; // General purpose
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uint64_t rbp; // Base Pointer (meant for stack frames)
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uint64_t rdi; // First Argument
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uint64_t rsi; // Second Argument
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uint64_t rdx; // Data (commonly extends the A register)
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uint64_t rcx; // Counter
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uint64_t rbx; // Base
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uint64_t rax; // Accumulator
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uint64_t int_num; // Interrupt Number
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uint64_t error_code; // Error code
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uint64_t rip; // Instruction Pointer
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uint64_t cs; // Code Segment
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union
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{
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struct
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{
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/** @brief Carry Flag */
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uint64_t CF : 1;
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/** @brief Reserved */
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uint64_t always_one : 1;
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/** @brief Parity Flag */
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uint64_t PF : 1;
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/** @brief Reserved */
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uint64_t _reserved0 : 1;
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/** @brief Auxiliary Carry Flag */
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uint64_t AF : 1;
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/** @brief Reserved */
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uint64_t _reserved1 : 1;
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/** @brief Zero Flag */
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uint64_t ZF : 1;
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/** @brief Sign Flag */
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uint64_t SF : 1;
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/** @brief Trap Flag */
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uint64_t TF : 1;
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/** @brief Interrupt Enable Flag */
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uint64_t IF : 1;
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/** @brief Direction Flag */
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uint64_t DF : 1;
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/** @brief Overflow Flag */
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uint64_t OF : 1;
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/** @brief I/O Privilege Level */
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uint64_t IOPL : 2;
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/** @brief Nested Task */
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uint64_t NT : 1;
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/** @brief Reserved */
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uint64_t _reserved2 : 1;
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/** @brief Resume Flag */
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uint64_t RF : 1;
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/** @brief Virtual 8086 Mode */
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uint64_t VM : 1;
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/** @brief Alignment Check */
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uint64_t AC : 1;
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/** @brief Virtual Interrupt Flag */
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uint64_t VIF : 1;
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/** @brief Virtual Interrupt Pending */
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uint64_t VIP : 1;
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/** @brief ID Flag */
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uint64_t ID : 1;
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/** @brief Reserved */
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uint64_t _reserved3 : 10;
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};
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uint64_t raw;
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} rflags; // Register Flags
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uint64_t rsp; // Stack Pointer
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uint64_t ss; // Stack Segment / Data Segment
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#elif defined(__i386__)
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#elif defined(__aarch64__)
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#endif
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};
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enum TaskArchitecture
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{
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UnknownArchitecture,
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x86,
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x64,
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ARM,
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ARM64
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};
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enum TaskPlatform
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{
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UnknownPlatform,
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Native,
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Linux,
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Windows
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};
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enum TaskElevation
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{
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UnknownElevation,
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@ -35,19 +140,57 @@ namespace Tasking
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Token UniqueToken;
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};
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struct PCB
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struct TaskInfo
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{
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UPID PID;
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char Name[256];
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TaskSecurity Security;
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TaskStatus Status;
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uint64_t SpawnTime = 0, UsedTime = 0, OldUsedTime = 0;
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uint64_t OldSystemTime = 0, CurrentSystemTime = 0;
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uint64_t Year, Month, Day, Hour, Minute, Second;
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uint64_t Usage[256]; // MAX_CPU
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TaskArchitecture Architecture;
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TaskPlatform Platform;
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int Priority;
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bool Affinity[256]; // MAX_CPU
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};
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struct TCB
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{
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UTID TID;
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PCB *Parent;
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UTID ID;
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char Name[256];
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struct PCB *Parent;
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IP EntryPoint;
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IPOffset Offset;
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int ExitCode;
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void *Stack;
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ThreadFrame Registers;
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TaskSecurity Security;
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TaskInfo Info;
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TaskStatus Status;
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TaskElevation Elevation;
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void Rename(const char *name)
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{
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for (int i = 0; i < 256; i++)
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{
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Name[i] = name[i];
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if (name[i] == '\0')
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break;
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}
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}
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};
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struct PCB
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{
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UPID ID;
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char Name[256];
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PCB *Parent;
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int ExitCode;
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TaskSecurity Security;
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TaskInfo Info;
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TaskStatus Status;
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TaskElevation Elevation;
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Vector<TCB *> Threads;
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Vector<PCB *> Children;
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// Memory::PageTable PageTable;
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};
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class Task
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@ -55,18 +198,18 @@ namespace Tasking
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public:
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/**
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* @brief Get the Current Process object
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* @return PCB*
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* @return PCB*
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*/
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PCB *GetCurrentProcess();
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/**
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* @brief Get the Current Thread object
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* @return TCB*
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* @return TCB*
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*/
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TCB *GetCurrentThread();
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PCB *CreateProcess(PCB *Parent,
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char *Name,
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const char *Name,
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TaskElevation Elevation);
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TCB *CreateThread(PCB *Parent,
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