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Alex
311
Modules/AHCI/AdvancedHostControllerInterface.cpp
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311
Modules/AHCI/AdvancedHostControllerInterface.cpp
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/*
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This file is part of Fennix Kernel.
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Fennix Kernel is free software: you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation, either version 3 of
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the License, or (at your option) any later version.
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Fennix Kernel is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Fennix Kernel. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "ahci.hpp"
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#include <debug.h>
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#include <pci.hpp>
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#include "../../DAPI.hpp"
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#include "../drv.hpp"
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using namespace PCI;
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namespace AdvancedHostControllerInterface
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{
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KernelAPI KAPI;
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HBAMemory *ABAR;
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Port *Ports[32];
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uint8_t PortCount = 0;
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PCIDeviceHeader *PCIBaseAddress;
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const char *PortTypeName[] = {"None",
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"SATA",
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"SEMB",
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"PM",
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"SATAPI"};
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PortType CheckPortType(HBAPort *Port)
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{
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uint32_t SataStatus = Port->SataStatus;
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uint8_t InterfacePowerManagement = (SataStatus >> 8) & 0b111;
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uint8_t DeviceDetection = SataStatus & 0b111;
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if (DeviceDetection != HBA_PORT_DEV_PRESENT)
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return PortType::None;
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if (InterfacePowerManagement != HBA_PORT_IPM_ACTIVE)
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return PortType::None;
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switch (Port->Signature)
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{
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case SATA_SIG_ATAPI:
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return PortType::SATAPI;
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case SATA_SIG_ATA:
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return PortType::SATA;
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case SATA_SIG_PM:
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return PortType::PM;
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case SATA_SIG_SEMB:
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return PortType::SEMB;
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default:
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return PortType::None;
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}
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}
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Port::Port(PortType Type, HBAPort *PortPtr, uint8_t PortNumber)
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{
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this->AHCIPortType = Type;
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this->HBAPortPtr = PortPtr;
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this->Buffer = static_cast<uint8_t *>(KAPI.Memory.RequestPage(1));
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memset(this->Buffer, 0, KAPI.Memory.PageSize);
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this->PortNumber = PortNumber;
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}
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Port::~Port()
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{
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KAPI.Memory.FreePage(this->Buffer, 1);
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}
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void Port::StartCMD()
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{
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while (HBAPortPtr->CommandStatus & HBA_PxCMD_CR)
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;
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HBAPortPtr->CommandStatus |= HBA_PxCMD_FRE;
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HBAPortPtr->CommandStatus |= HBA_PxCMD_ST;
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}
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void Port::StopCMD()
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{
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HBAPortPtr->CommandStatus &= ~HBA_PxCMD_ST;
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HBAPortPtr->CommandStatus &= ~HBA_PxCMD_FRE;
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while (true)
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{
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if (HBAPortPtr->CommandStatus & HBA_PxCMD_FR)
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continue;
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if (HBAPortPtr->CommandStatus & HBA_PxCMD_CR)
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continue;
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break;
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}
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}
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void Port::Configure()
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{
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StopCMD();
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void *NewBase = KAPI.Memory.RequestPage(1);
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HBAPortPtr->CommandListBase = (uint32_t)(uint64_t)NewBase;
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HBAPortPtr->CommandListBaseUpper = (uint32_t)((uint64_t)NewBase >> 32);
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memset(reinterpret_cast<void *>(HBAPortPtr->CommandListBase), 0, 1024);
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void *FISBase = KAPI.Memory.RequestPage(1);
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HBAPortPtr->FISBaseAddress = (uint32_t)(uint64_t)FISBase;
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HBAPortPtr->FISBaseAddressUpper = (uint32_t)((uint64_t)FISBase >> 32);
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memset(FISBase, 0, 256);
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HBACommandHeader *CommandHeader = (HBACommandHeader *)((uint64_t)HBAPortPtr->CommandListBase + ((uint64_t)HBAPortPtr->CommandListBaseUpper << 32));
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for (int i = 0; i < 32; i++)
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{
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CommandHeader[i].PRDTLength = 8;
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void *CommandTableAddress = KAPI.Memory.RequestPage(1);
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uint64_t Address = (uint64_t)CommandTableAddress + (i << 8);
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CommandHeader[i].CommandTableBaseAddress = (uint32_t)(uint64_t)Address;
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CommandHeader[i].CommandTableBaseAddressUpper = (uint32_t)((uint64_t)Address >> 32);
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memset(CommandTableAddress, 0, 256);
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}
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StartCMD();
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}
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bool Port::ReadWrite(uint64_t Sector, uint32_t SectorCount, uint8_t *Buffer, bool Write)
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{
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if (this->PortNumber == PortType::SATAPI && Write)
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{
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error("SATAPI port does not support write.");
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return false;
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}
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uint32_t SectorL = (uint32_t)Sector;
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uint32_t SectorH = (uint32_t)(Sector >> 32);
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HBAPortPtr->InterruptStatus = (uint32_t)-1; // Clear pending interrupt bits
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HBACommandHeader *CommandHeader = reinterpret_cast<HBACommandHeader *>(HBAPortPtr->CommandListBase);
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CommandHeader->CommandFISLength = sizeof(FIS_REG_H2D) / sizeof(uint32_t);
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if (Write)
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CommandHeader->Write = 1;
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else
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CommandHeader->Write = 0;
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CommandHeader->PRDTLength = 1;
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HBACommandTable *CommandTable = reinterpret_cast<HBACommandTable *>(CommandHeader->CommandTableBaseAddress);
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memset(CommandTable, 0, sizeof(HBACommandTable) + (CommandHeader->PRDTLength - 1) * sizeof(HBAPRDTEntry));
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CommandTable->PRDTEntry[0].DataBaseAddress = (uint32_t)(uint64_t)Buffer;
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CommandTable->PRDTEntry[0].DataBaseAddressUpper = (uint32_t)((uint64_t)Buffer >> 32);
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#pragma GCC diagnostic push
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/* conversion from ‘uint32_t’ {aka ‘unsigned int’} to ‘unsigned int:22’ may change value */
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#pragma GCC diagnostic ignored "-Wconversion"
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CommandTable->PRDTEntry[0].ByteCount = (SectorCount << 9) - 1; /* 512 bytes per sector */
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#pragma GCC diagnostic pop
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CommandTable->PRDTEntry[0].InterruptOnCompletion = 1;
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FIS_REG_H2D *CommandFIS = (FIS_REG_H2D *)(&CommandTable->CommandFIS);
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CommandFIS->FISType = FIS_TYPE_REG_H2D;
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CommandFIS->CommandControl = 1;
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if (Write)
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CommandFIS->Command = ATA_CMD_WRITE_DMA_EX;
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else
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CommandFIS->Command = ATA_CMD_READ_DMA_EX;
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CommandFIS->LBA0 = (uint8_t)SectorL;
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CommandFIS->LBA1 = (uint8_t)(SectorL >> 8);
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CommandFIS->LBA2 = (uint8_t)(SectorL >> 16);
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CommandFIS->LBA3 = (uint8_t)SectorH;
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CommandFIS->LBA4 = (uint8_t)(SectorH >> 8);
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CommandFIS->LBA5 = (uint8_t)(SectorH >> 16);
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CommandFIS->DeviceRegister = 1 << 6; // LBA mode
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CommandFIS->CountLow = SectorCount & 0xFF;
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CommandFIS->CountHigh = (SectorCount >> 8) & 0xFF;
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uint64_t Spin = 0;
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while ((HBAPortPtr->TaskFileData & (ATA_DEV_BUSY | ATA_DEV_DRQ)) && Spin < 1000000)
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Spin++;
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if (Spin == 1000000)
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{
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error("Port not responding.");
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return false;
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}
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HBAPortPtr->CommandIssue = 1;
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Spin = 0;
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int TryCount = 0;
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while (true)
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{
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if (Spin > 100000000)
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{
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error("Port %d not responding. (%d)", this->PortNumber, TryCount);
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Spin = 0;
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TryCount++;
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if (TryCount > 10)
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return false;
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}
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if (HBAPortPtr->CommandIssue == 0)
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break;
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Spin++;
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if (HBAPortPtr->InterruptStatus & HBA_PxIS_TFES)
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{
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error("Error reading/writing (%d).", Write);
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return false;
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}
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}
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return true;
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}
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int DriverEntry(void *Data)
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{
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if (!Data)
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return INVALID_KERNEL_API;
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KAPI = *(KernelAPI *)Data;
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if (KAPI.Version.Major < 0 || KAPI.Version.Minor < 0 || KAPI.Version.Patch < 0)
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return KERNEL_API_VERSION_NOT_SUPPORTED;
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return OK;
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}
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int CallbackHandler(KernelCallback *Data)
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{
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switch (Data->Reason)
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{
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case AcknowledgeReason:
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{
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debug("Kernel acknowledged the driver.");
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break;
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}
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case ConfigurationReason:
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{
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debug("Driver received configuration data.");
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PCIBaseAddress = reinterpret_cast<PCIDeviceHeader *>(Data->RawPtr);
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ABAR = reinterpret_cast<HBAMemory *>(((PCIHeader0 *)PCIBaseAddress)->BAR5);
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KAPI.Memory.Map((void *)ABAR, (void *)ABAR, (1 << 1));
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uint32_t PortsImplemented = ABAR->PortsImplemented;
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for (int i = 0; i < 32; i++)
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{
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if (PortsImplemented & (1 << i))
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{
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PortType portType = CheckPortType(&ABAR->Ports[i]);
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if (portType == PortType::SATA || portType == PortType::SATAPI)
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{
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trace("%s drive found at port %d", PortTypeName[portType], i);
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Ports[PortCount] = new Port(portType, &ABAR->Ports[i], PortCount);
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PortCount++;
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}
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else
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{
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if (portType != PortType::None)
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warn("Unsupported drive type %s found at port %d", PortTypeName[portType], i);
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}
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}
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}
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for (int i = 0; i < PortCount; i++)
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Ports[i]->Configure();
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break;
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}
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case FetchReason:
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{
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Data->DiskCallback.Fetch.Ports = PortCount;
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Data->DiskCallback.Fetch.BytesPerSector = 512;
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break;
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}
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case StopReason:
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{
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// TODO: Stop the driver.
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debug("Driver stopped.");
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break;
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}
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case SendReason:
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case ReceiveReason:
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{
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Ports[Data->DiskCallback.RW.Port]->ReadWrite(Data->DiskCallback.RW.Sector,
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(uint32_t)Data->DiskCallback.RW.SectorCount,
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Data->DiskCallback.RW.Buffer,
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Data->DiskCallback.RW.Write);
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break;
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}
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default:
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{
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warn("Unknown reason.");
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break;
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}
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}
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return OK;
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}
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int InterruptCallback(CPURegisters *)
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{
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/* There's no need to do anything here. */
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return OK;
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}
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}
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