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APIC implementation (not working as expected)

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This commit is contained in:
Alex
2022-10-17 04:05:44 +03:00
parent c5b4666b50
commit c944f57a3b
15 changed files with 272 additions and 153 deletions
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4
Core/CPU.cpp
View File

@ -208,7 +208,9 @@ namespace CPU
void InitializeFeatures()
{
#if defined(__amd64__)
static int BSP;
static int BSP = 0;
if (!BSP)
CPU::x64::wrmsr(CPU::x64::MSR_FS_BASE, 0);
CPU::x64::CR0 cr0 = CPU::x64::readcr0();
CPU::x64::CR4 cr4 = CPU::x64::readcr4();
uint32_t rax, rbx, rcx, rdx;

3
Core/CrashHandler.cpp
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@ -341,8 +341,7 @@ namespace CrashHandler
CrashEnd:
Display->SetBuffer(255);
while (1)
CPU::Stop();
CPU::Stop();
}
}

64
Core/Interrupts/IntManager.cpp
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@ -2,6 +2,7 @@
#include <syscalls.hpp>
#include <hashmap.hpp>
#include <io.h>
#if defined(__amd64__)
#include "../Architecture/amd64/cpu/gdt.hpp"
@ -24,9 +25,10 @@ namespace Interrupts
HashMap<int, uint64_t> *RegisteredEvents;
#if defined(__amd64__)
/* APIC::APIC */ void *apic = nullptr;
/* APIC::APIC */ void *apic[MAX_CPU];
/* APIC::Timer */ void *apicTimer[MAX_CPU];
#elif defined(__i386__)
/* APIC::APIC */ void *apic = nullptr;
/* APIC::APIC */ void *apic[MAX_CPU];
#elif defined(__aarch64__)
#endif
@ -37,8 +39,8 @@ namespace Interrupts
RegisteredEvents = new HashMap<int, uint64_t>;
#if defined(__amd64__)
GlobalDescriptorTable::Init(0);
InterruptDescriptorTable::Init(0);
GlobalDescriptorTable::Init(Core);
InterruptDescriptorTable::Init(Core);
InitializeSystemCalls();
#elif defined(__i386__)
warn("i386 is not supported yet");
@ -47,13 +49,14 @@ namespace Interrupts
#endif
}
void Enable()
void Enable(int Core)
{
#if defined(__amd64__)
if (((ACPI::MADT *)PowerManager->GetMADT())->LAPICAddress != nullptr)
{
apic = new APIC::APIC;
((APIC::APIC *)apic)->RedirectIRQs(0);
// TODO: This function is called by SMP too. Do not initialize timers that doesn't support multiple cores.
apic[Core] = new APIC::APIC(Core);
((APIC::APIC *)apic[Core])->RedirectIRQs(Core);
}
else
{
@ -67,10 +70,16 @@ namespace Interrupts
#endif
}
void InitializeTimer()
void InitializeTimer(int Core)
{
// TODO: This function is called by SMP too. Do not initialize timers that doesn't support multiple cores.
#if defined(__amd64__)
if (apic[Core] != nullptr)
apicTimer[Core] = new APIC::Timer((APIC::APIC *)apic[Core]);
else
{
fixme("apic not found");
}
#elif defined(__i386__)
warn("i386 is not supported yet");
#elif defined(__aarch64__)
@ -82,16 +91,17 @@ namespace Interrupts
{
#if defined(__amd64__)
CPU::x64::TrapFrame *Frame = (CPU::x64::TrapFrame *)Data;
int Core = CPU::x64::rdmsr(CPU::x64::MSR_FS_BASE);
Handler *handler = (Handler *)RegisteredEvents->Get(Frame->InterruptNumber);
if (handler != (Handler *)0xdeadbeef)
handler->OnInterruptReceived(Frame);
else
error("Unhandled IRQ%d on CPU %d", Frame->InterruptNumber - 32, ((APIC::APIC *)Interrupts::apic)->Read(APIC::APIC::APIC_ID) >> 24);
error("Unhandled IRQ%d on CPU %d.", Frame->InterruptNumber - 32, Core);
if (apic)
if (apic[Core])
{
((APIC::APIC *)Interrupts::apic)->EOI();
((APIC::APIC *)Interrupts::apic[Core])->EOI();
return;
}
// TODO: PIC
@ -100,21 +110,41 @@ namespace Interrupts
#elif defined(__aarch64__)
void *Frame = Data;
#endif
while (1)
CPU::Stop();
CPU::Stop();
}
Handler::Handler(int InterruptNumber)
{
debug("Registering interrupt handler for IRQ%d", InterruptNumber - 32);
if (RegisteredEvents->Get(InterruptNumber) != (uint64_t)0xdeadbeef)
{
warn("IRQ%d is already registered.", InterruptNumber - 32);
return;
}
debug("Registering interrupt handler for IRQ%d.", InterruptNumber - 32);
this->InterruptNumber = InterruptNumber;
RegisteredEvents->AddNode(InterruptNumber, (uint64_t)this);
}
Handler::~Handler()
{
debug("Unregistering interrupt handler for IRQ%d", InterruptNumber - 32);
debug("Unregistering interrupt handler for IRQ%d.", InterruptNumber - 32);
if (RegisteredEvents->DeleteNode(InterruptNumber) == 0xdeadbeef)
warn("Node %d not found", InterruptNumber);
warn("Node %d not found.", InterruptNumber);
}
#if defined(__amd64__)
void Handler::OnInterruptReceived(CPU::x64::TrapFrame *Frame)
{
trace("Unhandled interrupt IRQ%d", Frame->InterruptNumber - 32);
#elif defined(__i386__)
void Handler::OnInterruptReceived(void *Frame);
{
trace("Unhandled interrupt received");
#elif defined(__aarch64__)
void Handler::OnInterruptReceived(void *Frame);
{
trace("Unhandled interrupt received");
#endif
}
}

49
Core/Power.cpp
View File

@ -1,21 +1,62 @@
#include <power.hpp>
#include <memory.hpp>
#include "../kernel.h"
#include <debug.h>
#include "../kernel.h"
#if defined(__amd64__)
#include <io.h>
#include "../Architecture/amd64/acpi.hpp"
namespace Power
{
void Power::Reboot() { ((ACPI::DSDT *)this->dsdt)->Reboot(); }
void Power::Shutdown() { ((ACPI::DSDT *)this->dsdt)->Shutdown(); }
void Power::Reboot()
{
if (((ACPI::ACPI *)this->acpi)->FADT)
if (((ACPI::DSDT *)this->dsdt)->ACPIShutdownSupported)
((ACPI::DSDT *)this->dsdt)->Reboot();
uint8_t val = 0x02;
while (val & 0x02)
val = inb(0x64);
outb(0x64, 0xFE);
warn("Executing the second attempt to reboot...");
// second attempt to reboot
// https://wiki.osdev.org/Reboot
uint8_t temp;
asm volatile("cli");
do
{
temp = inb(0x64);
if (((temp) & (1 << (0))) != 0)
inb(0x60);
} while (((temp) & (1 << (1))) != 0);
outb(0x64, 0xFE);
CPU::Stop();
}
void Power::Shutdown()
{
if (((ACPI::ACPI *)this->acpi)->FADT)
if (((ACPI::DSDT *)this->dsdt)->ACPIShutdownSupported)
((ACPI::DSDT *)this->dsdt)->Shutdown();
outl(0xB004, 0x2000); // for qemu
outl(0x604, 0x2000); // if qemu not working, bochs and older versions of qemu
outl(0x4004, 0x3400); // virtual box
CPU::Stop();
}
Power::Power()
{
this->acpi = new ACPI::ACPI(bInfo);
this->dsdt = new ACPI::DSDT((ACPI::ACPI *)acpi);
if (((ACPI::ACPI *)this->acpi)->FADT)
this->dsdt = new ACPI::DSDT((ACPI::ACPI *)acpi);
this->madt = new ACPI::MADT(((ACPI::ACPI *)acpi)->MADT);
trace("Power manager initialized");
}