Syscalls working as expected

This commit is contained in:
Alex
2022-11-15 15:09:52 +02:00
parent 5dd496a73f
commit c2628019b7
10 changed files with 61 additions and 53 deletions

View File

@ -348,10 +348,13 @@ namespace CrashHandler
CPU::x64::CR8 cr8 = CPU::x64::readcr8();
CPU::x64::EFER efer;
efer.raw = CPU::x64::rdmsr(CPU::x64::MSR_EFER);
uint64_t ds;
asmv("mov %%ds, %0"
: "=r"(ds));
EHPrint("\eFF0000FS=%#llx GS=%#llx SS=%#llx CS=%#llx DS=%#llx\n",
CPU::x64::rdmsr(CPU::x64::MSR_FS_BASE), CPU::x64::rdmsr(CPU::x64::MSR_GS_BASE),
Frame->ss, Frame->cs, Frame->ds);
Frame->ss, Frame->cs, ds);
EHPrint("R8=%#llx R9=%#llx R10=%#llx R11=%#llx\n", Frame->r8, Frame->r9, Frame->r10, Frame->r11);
EHPrint("R12=%#llx R13=%#llx R14=%#llx R15=%#llx\n", Frame->r12, Frame->r13, Frame->r14, Frame->r15);
EHPrint("RAX=%#llx RBX=%#llx RCX=%#llx RDX=%#llx\n", Frame->rax, Frame->rbx, Frame->rcx, Frame->rdx);
@ -402,6 +405,9 @@ namespace CrashHandler
crashdata.cr4 = CPU::x64::readcr4();
crashdata.cr8 = CPU::x64::readcr8();
crashdata.efer.raw = CPU::x64::rdmsr(CPU::x64::MSR_EFER);
uint64_t ds;
asmv("mov %%ds, %0"
: "=r"(ds));
// Get debug registers
asmv("movq %%dr0, %0"
@ -458,7 +464,7 @@ namespace CrashHandler
{
error("FS=%#llx GS=%#llx SS=%#llx CS=%#llx DS=%#llx",
CPU::x64::rdmsr(CPU::x64::MSR_FS_BASE), CPU::x64::rdmsr(CPU::x64::MSR_GS_BASE),
Frame->ss, Frame->cs, Frame->ds);
Frame->ss, Frame->cs, ds);
error("R8=%#llx R9=%#llx R10=%#llx R11=%#llx", Frame->r8, Frame->r9, Frame->r10, Frame->r11);
error("R12=%#llx R13=%#llx R14=%#llx R15=%#llx", Frame->r12, Frame->r13, Frame->r14, Frame->r15);
error("RAX=%#llx RBX=%#llx RCX=%#llx RDX=%#llx", Frame->rax, Frame->rbx, Frame->rcx, Frame->rdx);

View File

@ -28,9 +28,20 @@ namespace CrashHandler
data.Thread->Name,
data.Thread->ID);
EHPrint("\e7981FCTechnical Informations on CPU %lld:\n", data.ID);
#if defined(__amd64__)
uint64_t ds;
asmv("mov %%ds, %0"
: "=r"(ds));
#elif defined(__i386__)
uint32_t ds;
asmv("mov %%ds, %0"
: "=r"(ds));
#elif defined(__aarch64__)
#endif
EHPrint("\e7981FCFS=%#llx GS=%#llx SS=%#llx CS=%#llx DS=%#llx\n",
CPU::x64::rdmsr(CPU::x64::MSR_FS_BASE), CPU::x64::rdmsr(CPU::x64::MSR_GS_BASE),
data.Frame->ss, data.Frame->cs, data.Frame->ds);
data.Frame->ss, data.Frame->cs, ds);
#if defined(__amd64__)
EHPrint("R8=%#llx R9=%#llx R10=%#llx R11=%#llx\n", data.Frame->r8, data.Frame->r9, data.Frame->r10, data.Frame->r11);
EHPrint("R12=%#llx R13=%#llx R14=%#llx R15=%#llx\n", data.Frame->r12, data.Frame->r13, data.Frame->r14, data.Frame->r15);

View File

@ -42,10 +42,20 @@ __no_stack_protector void UserModeExceptionHandler(CHArchTrapFrame *Frame)
efer.raw = CPU::x64::rdmsr(CPU::x64::MSR_EFER);
error("Technical Informations on CPU %lld:", GetCurrentCPU()->ID);
#if defined(__amd64__)
uint64_t ds;
asmv("mov %%ds, %0"
: "=r"(ds));
#elif defined(__i386__)
uint32_t ds;
asmv("mov %%ds, %0"
: "=r"(ds));
#elif defined(__aarch64__)
#endif
error("FS=%#llx GS=%#llx SS=%#llx CS=%#llx DS=%#llx",
CPU::x64::rdmsr(CPU::x64::MSR_FS_BASE), CPU::x64::rdmsr(CPU::x64::MSR_GS_BASE),
Frame->ss, Frame->cs, Frame->ds);
#if defined(__amd64__)
Frame->ss, Frame->cs, ds);
#if defined(__amd64__)
error("R8=%#llx R9=%#llx R10=%#llx R11=%#llx", Frame->r8, Frame->r9, Frame->r10, Frame->r11);
error("R12=%#llx R13=%#llx R14=%#llx R15=%#llx", Frame->r12, Frame->r13, Frame->r14, Frame->r15);
error("RAX=%#llx RBX=%#llx RCX=%#llx RDX=%#llx", Frame->rax, Frame->rbx, Frame->rcx, Frame->rdx);