diff --git a/core/cpu.cpp b/core/cpu.cpp index 623cb32..0a814ae 100644 --- a/core/cpu.cpp +++ b/core/cpu.cpp @@ -53,8 +53,7 @@ namespace CPU memcpy(Vendor + 4, &edx, 4); memcpy(Vendor + 8, &ecx, 4); #elif defined(aa64) - asmv("mrs %0, MIDR_EL1" - : "=r"(Vendor[0])); +#error "Not implemented" #endif return Vendor; } @@ -99,8 +98,7 @@ namespace CPU memcpy(Name + 40, &ecx, 4); memcpy(Name + 44, &edx, 4); #elif defined(aa64) - asmv("mrs %0, MIDR_EL1" - : "=r"(Name[0])); +#error "Not implemented" #endif return Name; } @@ -143,8 +141,7 @@ namespace CPU memcpy(Hypervisor + 4, &ecx, 4); memcpy(Hypervisor + 8, &edx, 4); #elif defined(aa64) - asmv("mrs %0, MIDR_EL1" - : "=r"(Hypervisor[0])); +#error "Not implemented" #endif return Hypervisor; } @@ -169,7 +166,7 @@ namespace CPU #elif defined(aa64) asmv("mrs %0, cpsr" : "=r"(Flags)); - return !(Flags & (1 << 7)); + return Flags & (1 << 7); #endif } case Enable: @@ -191,6 +188,7 @@ namespace CPU return true; } default: + assert(!"Unknown InterruptsType"); break; } return false; @@ -207,7 +205,8 @@ namespace CPU { asmv("movq %0, %%cr3" : - : "r"(PT)); + : "r"(PT) + : "memory"); } #elif defined(a32) asmv("movl %%cr3, %0" @@ -217,7 +216,8 @@ namespace CPU { asmv("movl %0, %%cr3" : - : "r"(PT)); + : "r"(PT) + : "memory"); } #elif defined(aa64) asmv("mrs %0, ttbr0_el1" @@ -227,7 +227,8 @@ namespace CPU { asmv("msr ttbr0_el1, %0" : - : "r"(PT)); + : "r"(PT) + : "memory"); } #endif return ret; diff --git a/include/cpu.hpp b/include/cpu.hpp index fea58e5..0d98698 100644 --- a/include/cpu.hpp +++ b/include/cpu.hpp @@ -154,21 +154,21 @@ namespace CPU /** * @brief Stop the CPU (infinite loop) */ -#if defined(a86) SafeFunction __noreturn __naked __used inline void Stop() { +#if defined(a86) asmv("CPUStopLoop:\n" "cli\n" "hlt\n" "jmp CPUStopLoop"); -#elif defined(aa64) // annoying warning: "'noreturn' function does return" and "'naked' attribute directive ignored" - SafeFunction __used inline void Stop() - { +#elif defined(aa64) asmv("CPUStopLoop:\n" - "msr daifset, #2\n" // Disable IRQs (bit 1 of the DAIF register) - "wfi\n" // Wait for Interrupt (puts the processor in low-power state until an interrupt occurs) - "b CPUStopLoop"); // Branch to the beginning of the loop + "cpsid i\n" + "wfe\n" + "wfi\n" + "b CPUStopLoop"); #endif + __builtin_unreachable(); } /** @@ -987,12 +987,12 @@ namespace CPU */ typedef x32::TrapFrame TrapFrame; #elif defined(aa64) -/** - * CPU trap frame for the current architecture - * - * @note This is for aarch64 - */ -typedef aarch64::TrapFrame TrapFrame; + /** + * CPU trap frame for the current architecture + * + * @note This is for aarch64 + */ + typedef aarch64::TrapFrame TrapFrame; #endif }