mirror of
https://github.com/Fennix-Project/Kernel.git
synced 2025-07-11 07:19:20 +00:00
Rename "SafeFunction" macro to "NoSecurityAnalysis"
This commit is contained in:
@ -139,7 +139,7 @@ namespace CPU
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/**
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* @brief Pause the CPU
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*/
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SafeFunction static __always_inline inline void Pause(bool Loop = false)
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nsa static __always_inline inline void Pause(bool Loop = false)
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{
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do
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{
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@ -154,7 +154,7 @@ namespace CPU
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/**
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* @brief Stop the CPU (infinite loop)
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*/
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SafeFunction __noreturn __used inline void Stop()
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nsa __noreturn __used inline void Stop()
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{
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#if defined(a86)
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asmv("CPUStopLoop:\n"
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@ -174,7 +174,7 @@ namespace CPU
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/**
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* @brief Halt the CPU
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*/
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SafeFunction static __always_inline inline void Halt(bool Loop = false)
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nsa static __always_inline inline void Halt(bool Loop = false)
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{
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do
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{
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@ -444,7 +444,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void lgdt(void *gdt)
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nsa static inline void lgdt(void *gdt)
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{
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#ifdef a32
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asmv("lgdt (%0)"
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@ -455,7 +455,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void lidt(void *idt)
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nsa static inline void lidt(void *idt)
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{
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#ifdef a32
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asmv("lidt (%0)"
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@ -466,7 +466,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void ltr(uint16_t Segment)
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nsa static inline void ltr(uint16_t Segment)
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{
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#ifdef a32
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asmv("ltr %0"
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@ -477,7 +477,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void invlpg(void *Address)
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nsa static inline void invlpg(void *Address)
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{
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#ifdef a32
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asmv("invlpg (%0)"
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@ -489,7 +489,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void fxsave(void *FXSaveArea)
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nsa static inline void fxsave(void *FXSaveArea)
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{
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#ifdef a32
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if (!FXSaveArea)
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@ -504,7 +504,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void fxrstor(void *FXRstorArea)
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nsa static inline void fxrstor(void *FXRstorArea)
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{
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#ifdef a32
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if (!FXRstorArea)
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@ -831,7 +831,7 @@ namespace CPU
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uint8_t xmm[16][16];
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} __packed __aligned(16);
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SafeFunction static inline void lgdt(void *gdt)
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nsa static inline void lgdt(void *gdt)
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{
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#ifdef a64
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asmv("lgdt (%0)"
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@ -840,7 +840,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void lidt(void *idt)
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nsa static inline void lidt(void *idt)
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{
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#ifdef a64
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asmv("lidt (%0)"
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@ -849,7 +849,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void ltr(uint16_t Segment)
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nsa static inline void ltr(uint16_t Segment)
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{
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#ifdef a64
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asmv("ltr %0"
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@ -858,7 +858,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void invlpg(void *Address)
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nsa static inline void invlpg(void *Address)
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{
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#ifdef a64
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asmv("invlpg (%0)"
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@ -877,7 +877,7 @@ namespace CPU
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* @param ecx ECX
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* @param edx EDX
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*/
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SafeFunction static inline void cpuid(uint32_t Function, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
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nsa static inline void cpuid(uint32_t Function, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
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{
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#ifdef a64
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asmv("cpuid"
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@ -893,14 +893,14 @@ namespace CPU
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*
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* @return uint32_t
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*/
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SafeFunction static inline uint32_t GetHighestLeaf()
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nsa static inline uint32_t GetHighestLeaf()
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{
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uint32_t eax, ebx, ecx, edx;
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cpuid(0x0, &eax, &ebx, &ecx, &edx);
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return eax;
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}
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SafeFunction static inline void fxsave(void *FXSaveArea)
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nsa static inline void fxsave(void *FXSaveArea)
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{
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#ifdef a64
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if (!FXSaveArea || FXSaveArea >= (char *)0xfffffffffffff000)
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@ -913,7 +913,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void fxrstor(void *FXRstorArea)
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nsa static inline void fxrstor(void *FXRstorArea)
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{
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#ifdef a64
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if (!FXRstorArea || FXRstorArea >= (char *)0xfffffffffffff000)
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@ -24,7 +24,7 @@ namespace CPU
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{
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namespace MemBar
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{
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SafeFunction static inline void Barrier()
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nsa static inline void Barrier()
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{
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#if defined(a86)
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asmv("" ::
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@ -35,7 +35,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void Fence()
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nsa static inline void Fence()
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{
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#if defined(a86)
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asmv("mfence" ::
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@ -46,7 +46,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void StoreFence()
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nsa static inline void StoreFence()
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{
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#if defined(a86)
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asmv("sfence" ::
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@ -57,7 +57,7 @@ namespace CPU
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#endif
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}
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SafeFunction static inline void LoadFence()
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nsa static inline void LoadFence()
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{
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#if defined(a86)
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asmv("lfence" ::
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@ -152,7 +152,7 @@ namespace CPU
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uint32_t raw;
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} CR8;
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#if defined(a32)
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SafeFunction static inline CR0 readcr0()
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nsa static inline CR0 readcr0()
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{
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uint32_t Result = 0;
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asmv("mov %%cr0, %[Result]"
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@ -160,7 +160,7 @@ namespace CPU
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return (CR0){.raw = Result};
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}
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SafeFunction static inline CR2 readcr2()
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nsa static inline CR2 readcr2()
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{
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uint32_t Result = 0;
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asmv("mov %%cr2, %[Result]"
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@ -168,7 +168,7 @@ namespace CPU
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return (CR2){.raw = Result};
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}
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SafeFunction static inline CR3 readcr3()
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nsa static inline CR3 readcr3()
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{
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uint32_t Result = 0;
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asmv("mov %%cr3, %[Result]"
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@ -176,7 +176,7 @@ namespace CPU
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return (CR3){.raw = Result};
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}
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SafeFunction static inline CR4 readcr4()
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nsa static inline CR4 readcr4()
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{
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uint32_t Result = 0;
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asmv("mov %%cr4, %[Result]"
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@ -184,7 +184,7 @@ namespace CPU
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return (CR4){.raw = Result};
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}
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SafeFunction static inline CR8 readcr8()
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nsa static inline CR8 readcr8()
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{
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uint32_t Result = 0;
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asmv("mov %%cr8, %[Result]"
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@ -192,7 +192,7 @@ namespace CPU
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return (CR8){.raw = Result};
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}
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SafeFunction static inline void writecr0(CR0 ControlRegister)
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nsa static inline void writecr0(CR0 ControlRegister)
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{
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asmv("mov %[ControlRegister], %%cr0"
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:
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@ -200,7 +200,7 @@ namespace CPU
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: "memory");
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}
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SafeFunction static inline void writecr2(CR2 ControlRegister)
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nsa static inline void writecr2(CR2 ControlRegister)
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{
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asmv("mov %[ControlRegister], %%cr2"
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:
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@ -208,7 +208,7 @@ namespace CPU
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: "memory");
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}
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SafeFunction static inline void writecr3(CR3 ControlRegister)
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nsa static inline void writecr3(CR3 ControlRegister)
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{
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asmv("mov %[ControlRegister], %%cr3"
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:
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@ -216,7 +216,7 @@ namespace CPU
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: "memory");
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}
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SafeFunction static inline void writecr4(CR4 ControlRegister)
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nsa static inline void writecr4(CR4 ControlRegister)
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{
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asmv("mov %[ControlRegister], %%cr4"
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:
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@ -224,7 +224,7 @@ namespace CPU
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: "memory");
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}
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SafeFunction static inline void writecr8(CR8 ControlRegister)
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nsa static inline void writecr8(CR8 ControlRegister)
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{
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asmv("mov %[ControlRegister], %%cr8"
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:
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@ -401,7 +401,7 @@ namespace CPU
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};
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#if defined(a32)
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SafeFunction static inline uint64_t rdmsr(uint32_t msr)
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nsa static inline uint64_t rdmsr(uint32_t msr)
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{
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uint32_t Low, High;
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asmv("rdmsr"
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@ -411,7 +411,7 @@ namespace CPU
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return ((uint64_t)Low) | (((uint64_t)High) << 32);
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}
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SafeFunction static inline void wrmsr(uint32_t msr, uint64_t Value)
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nsa static inline void wrmsr(uint32_t msr, uint64_t Value)
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{
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uint32_t Low = (uint32_t)Value, High = (uint32_t)(Value >> 32);
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asmv("wrmsr"
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@ -190,7 +190,7 @@ namespace CPU
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} XCR0;
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#if defined(a64)
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SafeFunction static inline CR0 readcr0()
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nsa static inline CR0 readcr0()
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{
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uint64_t Result = 0;
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asmv("mov %%cr0, %[Result]"
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@ -198,7 +198,7 @@ namespace CPU
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return (CR0){.raw = Result};
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}
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SafeFunction static inline CR2 readcr2()
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nsa static inline CR2 readcr2()
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{
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uint64_t Result = 0;
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asmv("mov %%cr2, %[Result]"
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@ -206,7 +206,7 @@ namespace CPU
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return (CR2){.raw = Result};
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}
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SafeFunction static inline CR3 readcr3()
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nsa static inline CR3 readcr3()
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{
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uint64_t Result = 0;
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asmv("mov %%cr3, %[Result]"
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@ -214,7 +214,7 @@ namespace CPU
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return (CR3){.raw = Result};
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}
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SafeFunction static inline CR4 readcr4()
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nsa static inline CR4 readcr4()
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{
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uint64_t Result = 0;
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asmv("mov %%cr4, %[Result]"
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@ -222,7 +222,7 @@ namespace CPU
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return (CR4){.raw = Result};
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}
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SafeFunction static inline CR8 readcr8()
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nsa static inline CR8 readcr8()
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{
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uint64_t Result = 0;
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asmv("mov %%cr8, %[Result]"
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@ -230,7 +230,7 @@ namespace CPU
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return (CR8){.raw = Result};
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}
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SafeFunction static inline XCR0 readxcr0()
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nsa static inline XCR0 readxcr0()
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{
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uint64_t Result = 0;
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asmv("xgetbv"
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@ -240,7 +240,7 @@ namespace CPU
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return (XCR0){.raw = Result};
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}
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SafeFunction static inline void writecr0(CR0 ControlRegister)
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nsa static inline void writecr0(CR0 ControlRegister)
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{
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asmv("mov %[ControlRegister], %%cr0"
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:
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@ -248,7 +248,7 @@ namespace CPU
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: "memory");
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}
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SafeFunction static inline void writecr2(CR2 ControlRegister)
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nsa static inline void writecr2(CR2 ControlRegister)
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{
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asmv("mov %[ControlRegister], %%cr2"
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:
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@ -256,7 +256,7 @@ namespace CPU
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: "memory");
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}
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SafeFunction static inline void writecr3(CR3 ControlRegister)
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nsa static inline void writecr3(CR3 ControlRegister)
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{
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asmv("mov %[ControlRegister], %%cr3"
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:
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@ -264,7 +264,7 @@ namespace CPU
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: "memory");
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}
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SafeFunction static inline void writecr4(CR4 ControlRegister)
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nsa static inline void writecr4(CR4 ControlRegister)
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{
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asmv("mov %[ControlRegister], %%cr4"
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:
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@ -272,7 +272,7 @@ namespace CPU
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: "memory");
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}
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SafeFunction static inline void writecr8(CR8 ControlRegister)
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nsa static inline void writecr8(CR8 ControlRegister)
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{
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asmv("mov %[ControlRegister], %%cr8"
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:
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@ -280,7 +280,7 @@ namespace CPU
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: "memory");
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}
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SafeFunction static inline void writexcr0(XCR0 ControlRegister)
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nsa static inline void writexcr0(XCR0 ControlRegister)
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{
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asmv("xsetbv"
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:
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@ -402,7 +402,7 @@ namespace CPU
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};
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#if defined(a64)
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SafeFunction static inline uint64_t rdmsr(uint32_t msr)
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nsa static inline uint64_t rdmsr(uint32_t msr)
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{
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uint32_t Low, High;
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asmv("rdmsr"
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@ -412,7 +412,7 @@ namespace CPU
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return ((uint64_t)Low) | (((uint64_t)High) << 32);
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}
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SafeFunction static inline void wrmsr(uint32_t msr, uint64_t Value)
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nsa static inline void wrmsr(uint32_t msr, uint64_t Value)
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{
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uint32_t Low = s_cst(uint32_t, Value), High = s_cst(uint32_t, Value >> 32);
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asmv("wrmsr"
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@ -413,7 +413,8 @@ typedef uint48_t uint_fast48_t;
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#define PUBLIC __visibility("default")
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#define PRIVATE __visibility("hidden")
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#define SafeFunction __no_stack_protector __no_sanitize_address __no_sanitize_undefined __no_address_safety_analysis __no_sanitize_thread
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#define NoSecurityAnalysis __no_stack_protector __no_sanitize_address __no_sanitize_undefined __no_address_safety_analysis __no_sanitize_thread
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#define nsa NoSecurityAnalysis
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#define NIF __no_instrument_function
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@ -69,7 +69,7 @@ namespace UniversalAsynchronousReceiverTransmitter
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* @brief Get the Registered Port object
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* @return SerialPorts
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*/
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SafeFunction NIF SerialPorts GetRegisteredPort() { return this->Port; }
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nsa NIF SerialPorts GetRegisteredPort() { return this->Port; }
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/**
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* @brief Called when a character is sent.
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