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This commit is contained in:
Alex
2023-03-24 16:22:42 +02:00
parent 3d03f8943b
commit 9ce301907a
15 changed files with 378 additions and 326 deletions
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142
Architecture/amd64/cpu/GlobalDescriptorTable.cpp
View File

@ -8,72 +8,95 @@
namespace GlobalDescriptorTable
{
static GlobalDescriptorTableEntries GDTEntriesTemplate = {
// null
{.Length = 0x0,
.BaseLow = 0x0,
.BaseMiddle = 0x0,
.Access = {.Raw = 0x0},
.Flags = {.Raw = 0x0},
.BaseHigh = 0x0},
.Null =
{
.Length = 0x0,
.BaseLow = 0x0,
.BaseMiddle = 0x0,
.Access = {.Raw = 0x0},
.Flags = {.Raw = 0x0},
.BaseHigh = 0x0,
},
// kernel code
{.Length = 0x0,
.BaseLow = 0x0,
.BaseMiddle = 0x0,
.Access = {.A = 0,
.Code =
{
.Length = 0x0,
.BaseLow = 0x0,
.BaseMiddle = 0x0,
.Access = {
.A = 0,
.RW = 1,
.DC = 0,
.E = 1,
.S = 1,
.DPL = 0,
.P = 1},
.Flags = {.Unknown = 0x0, .L = 1},
.BaseHigh = 0x0},
.P = 1,
},
.Flags = {
.Unknown = 0x0,
.L = 1,
},
.BaseHigh = 0x0,
},
// kernel data
{.Length = 0x0,
.BaseLow = 0x0,
.BaseMiddle = 0x0,
.Access = {.A = 0,
.RW = 1,
.DC = 0,
.E = 0,
.S = 1,
.DPL = 0,
.P = 1},
.Flags = {.Raw = 0x0},
.BaseHigh = 0x0},
.Data = {
.Length = 0x0,
.BaseLow = 0x0,
.BaseMiddle = 0x0,
.Access = {
.A = 0,
.RW = 1,
.DC = 0,
.E = 0,
.S = 1,
.DPL = 0,
.P = 1,
},
.Flags = {.Raw = 0x0},
.BaseHigh = 0x0,
},
// user data
{.Length = 0x0,
.BaseLow = 0x0,
.BaseMiddle = 0x0,
.Access = {.A = 0,
.RW = 1,
.DC = 0,
.E = 0,
.S = 1,
.DPL = 3,
.P = 1},
.Flags = {.Raw = 0x0},
.BaseHigh = 0x0},
.UserData = {
.Length = 0x0,
.BaseLow = 0x0,
.BaseMiddle = 0x0,
.Access = {
.A = 0,
.RW = 1,
.DC = 0,
.E = 0,
.S = 1,
.DPL = 3,
.P = 1,
},
.Flags = {
.Raw = 0x0,
},
.BaseHigh = 0x0,
},
// user code
{.Length = 0x0,
.BaseLow = 0x0,
.BaseMiddle = 0x0,
.Access = {.A = 0,
.RW = 1,
.DC = 0,
.E = 1,
.S = 1,
.DPL = 3,
.P = 1},
.Flags = {.Unknown = 0x0, .L = 1},
.BaseHigh = 0x0},
.UserCode = {
.Length = 0x0,
.BaseLow = 0x0,
.BaseMiddle = 0x0,
.Access = {
.A = 0,
.RW = 1,
.DC = 0,
.E = 1,
.S = 1,
.DPL = 3,
.P = 1,
},
.Flags = {
.Unknown = 0x0,
.L = 1,
},
.BaseHigh = 0x0,
},
// tss
{}};
.TaskStateSegment = {},
};
GlobalDescriptorTableEntries GDTEntries[MAX_CPU];
GlobalDescriptorTableDescriptor gdt[MAX_CPU];
@ -155,7 +178,12 @@ namespace GlobalDescriptorTable
else
tss[CPUID].StackPointer[0] = (uint64_t)CPUStackPointer[CPUID] + STACK_SIZE;
// TODO: This may cause problems in the future I guess? This should be checked later
/*
FIXME: There's a bug in kernel which if
we won't update "tss[CPUID].StackPointer[0]"
with the current stack pointer, the kernel
will crash.
*/
asmv("mov %%rsp, %0"
: "=r"(tss[CPUID].StackPointer[0]));
}

122
Architecture/amd64/cpu/InterruptDescriptorTable.cpp
View File

@ -14,8 +14,10 @@ namespace InterruptDescriptorTable
{
static InterruptDescriptorTableEntry Entries[0x100];
InterruptDescriptorTableDescriptor idtd = {.Length = sizeof(Entries) - 1,
.Entries = Entries};
InterruptDescriptorTableDescriptor idtd = {
.Length = sizeof(Entries) - 1,
.Entries = Entries,
};
void SetEntry(uint8_t Index,
void (*Base)(),
@ -36,19 +38,10 @@ namespace InterruptDescriptorTable
Entries[Index].Present = 1;
}
extern "C" __attribute__((naked, used, no_stack_protector)) void ExceptionHandlerStub()
extern "C" __naked __used __no_stack_protector void ExceptionHandlerStub()
{
asm(
// "cmp $0x1000, %rsp\n" // Just in case the stack is corrupted
// "jng .skip_swap_check_1\n" /* if is not greater than */
// "cmpw $0x8, 0x8(%rsp)\n"
// "je .skip_swap_check_1\n"
// "swapgs\n"
// ".skip_swap_check_1:\n"
asm("cld\n"
"cld\n" // clear direction flag
// push all registers
"pushq %rax\n"
"pushq %rbx\n"
"pushq %rcx\n"
@ -68,7 +61,6 @@ namespace InterruptDescriptorTable
"movq %rsp, %rdi\n"
"call ExceptionHandler\n"
// pop all registers
"popq %r15\n"
"popq %r14\n"
"popq %r13\n"
@ -87,44 +79,13 @@ namespace InterruptDescriptorTable
"addq $16, %rsp\n"
// "cmp $0x1000, %rsp\n"
// "jng .skip_swap_check_2\n"
// "cmpw $0x8, 0x8(%rsp)\n"
// "je .skip_swap_check_2\n"
// "swapgs\n"
// ".skip_swap_check_2:\n"
"iretq"); // pop CS RIP RFLAGS SS RSP
}
extern "C" void WarnSwapgs() { warn("swapgs"); }
// void *OriginalCR3;
extern "C" __attribute__((naked, used, no_stack_protector)) void InterruptHandlerStub()
extern "C" __naked __used __no_stack_protector void InterruptHandlerStub()
{
// // Store cr3 to OriginalCR3
// asmv("mov %%cr3, %0"
// : "=q"(OriginalCR3)
// :
// : "memory");
// // Set cr3 to KPT (Kernel Page Table)
// asmv("mov %0, %%cr3"
// :
// : "q"(KPT)
// : "memory");
asm("cld\n"
// GlobalDescriptorTable::SetKernelStack(nullptr);
asm(
// "cmp $0x1000, %rsp\n"
// "jng .skip_swap_check__1\n"
// "cmpw $0x8, 0x8(%rsp)\n"
// "je .skip_swap_check__1\n"
// "swapgs\n"
// "call WarnSwapgs\n"
// ".skip_swap_check__1:\n"
"cld\n"
"pushq %rax\n"
"pushq %rbx\n"
"pushq %rcx\n"
@ -142,28 +103,9 @@ namespace InterruptDescriptorTable
"pushq %r15\n"
"movq %rsp, %rdi\n"
"call MainInterruptHandler\n");
"call MainInterruptHandler\n"
// // Check if the current cr3 is the same as the KPT
// // If not, then we need to restore the cr3
// asmv("pushq %rax\n" // push rax
// "pushq %rbx\n" // push rbx
// "movq %cr3, %rbx\n"); // mov cr3 to rbx
// asmv("movq %0, %%rax\n" // mov KPT to rax
// :
// : "q"(KPT)
// : "memory");
// asmv("cmpq %rax, %rbx\n" // compare cr3 to rax
// "jne .skip_restore_cr3\n"); // if not equal, skip restore cr3
// asmv("movq %0, %%cr3\n" // restore cr3
// :
// : "q"(OriginalCR3)
// : "memory");
// asm(".skip_restore_cr3:\n" // skip restore cr3 label
// "popq %rax\n" // KPT
// "popq %rbx\n"); // cr3
asm("popq %r15\n"
"popq %r15\n"
"popq %r14\n"
"popq %r13\n"
"popq %r12\n"
@ -181,38 +123,30 @@ namespace InterruptDescriptorTable
"addq $16, %rsp\n"
// "cmp $0x1000, %rsp\n"
// "jng .skip_swap_check__2\n"
// "cmpw $0x8, 0x8(%rsp)\n"
// "je .skip_swap_check__2\n"
// "call WarnSwapgs\n"
// "swapgs\n"
// ".skip_swap_check__2:\n"
"iretq");
"iretq"); // pop CS RIP RFLAGS SS RSP
}
#pragma region Exceptions
#define EXCEPTION_HANDLER(num) \
__attribute__((naked, no_stack_protector)) static void InterruptHandler_##num() \
{ \
asm("pushq $0\npushq $" #num "\n" \
"jmp ExceptionHandlerStub"); \
#define EXCEPTION_HANDLER(num) \
__naked __used __no_stack_protector static void InterruptHandler_##num() \
{ \
asm("pushq $0\npushq $" #num "\n" \
"jmp ExceptionHandlerStub"); \
}
#define EXCEPTION_ERROR_HANDLER(num) \
__attribute__((naked, no_stack_protector)) static void InterruptHandler_##num() \
{ \
asm("pushq $" #num "\n" \
"jmp ExceptionHandlerStub"); \
#define EXCEPTION_ERROR_HANDLER(num) \
__naked __used __no_stack_protector static void InterruptHandler_##num() \
{ \
asm("pushq $" #num "\n" \
"jmp ExceptionHandlerStub"); \
}
#define INTERRUPT_HANDLER(num) \
__attribute__((naked, used, no_stack_protector)) void InterruptHandler_##num() \
{ \
asm("pushq $0\npushq $" #num "\n" \
"jmp InterruptHandlerStub\n"); \
#define INTERRUPT_HANDLER(num) \
__naked __used __no_stack_protector void InterruptHandler_##num() \
{ \
asm("pushq $0\npushq $" #num "\n" \
"jmp InterruptHandlerStub\n"); \
}
/* ISR */
@ -487,9 +421,7 @@ namespace InterruptDescriptorTable
void Init(int Core)
{
UNUSED(Core);
static int once = 0;
if (!once++)
if (Core == 0) /* Disable PIC using BSP */
{
// PIC
outb(0x20, 0x10 | 0x1);

3
Architecture/amd64/cpu/SymmetricMultiprocessing.cpp
View File

@ -25,7 +25,7 @@ enum SMPTrampolineAddress
volatile bool CPUEnabled = false;
#pragma GCC diagnostic ignored "-Wmissing-field-initializers"
static __attribute__((aligned(PAGE_SIZE))) CPUData CPUs[MAX_CPU] = {0};
static __aligned(PAGE_SIZE) CPUData CPUs[MAX_CPU] = {0};
SafeFunction CPUData *GetCPU(long id) { return &CPUs[id]; }
@ -33,6 +33,7 @@ SafeFunction CPUData *GetCurrentCPU()
{
if (unlikely(!Interrupts::apic[0]))
return &CPUs[0]; /* No APIC means we are on the BSP. */
int CoreID = ((APIC::APIC *)Interrupts::apic[0])->Read(APIC::APIC_ID) >> 24;
if (unlikely((&CPUs[CoreID])->IsActive != true))