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Implemented a kinda broken tty

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This commit is contained in:
Alex
2022-10-09 04:01:49 +03:00
parent e332fc57e0
commit 7c4d43fec3
11 changed files with 496 additions and 133 deletions
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105
arch/CPU.cpp
View File

@ -1,63 +1,86 @@
#include <cpu.hpp>
#include <memory.hpp>
namespace CPU
{
void Pause()
{
void Pause()
{
#if defined(__amd64__) || defined(__i386__)
asmv("pause");
asmv("pause");
#elif defined(__aarch64__)
asmv("yield");
asmv("yield");
#endif
}
}
void Halt()
{
void Halt()
{
#if defined(__amd64__) || defined(__i386__)
asmv("hlt");
asmv("hlt");
#elif defined(__aarch64__)
asmv("wfe");
asmv("wfe");
#endif
}
}
bool Interrupts(InterruptsType Type)
{
switch (Type)
{
case Check:
{
bool Interrupts(InterruptsType Type)
{
switch (Type)
{
case Check:
{
#if defined(__amd64__) || defined(__i386__)
uint64_t rflags;
asmv("pushfq");
asmv("popq %0"
: "=r"(rflags));
return rflags & (1 << 9);
uint64_t rflags;
asmv("pushfq");
asmv("popq %0"
: "=r"(rflags));
return rflags & (1 << 9);
#elif defined(__aarch64__)
uint64_t daif;
asmv("mrs %0, daif"
: "=r"(daif));
return !(daif & (1 << 2));
uint64_t daif;
asmv("mrs %0, daif"
: "=r"(daif));
return !(daif & (1 << 2));
#endif
}
case Enable:
{
}
case Enable:
{
#if defined(__amd64__) || defined(__i386__)
asmv("sti");
asmv("sti");
#elif defined(__aarch64__)
asmv("msr daifclr, #2");
asmv("msr daifclr, #2");
#endif
return true;
}
case Disable:
{
return true;
}
case Disable:
{
#if defined(__amd64__) || defined(__i386__)
asmv("cli");
asmv("cli");
#elif defined(__aarch64__)
asmv("msr daifset, #2");
asmv("msr daifset, #2");
#endif
return true;
}
}
return false;
}
return true;
}
}
return false;
}
void *PageTable(void *PT)
{
#if defined(__amd64__) || defined(__i386__)
if (PT)
asmv("movq %0, %%cr3"
:
: "r"(PT));
else
asmv("movq %%cr3, %0"
: "=r"(PT));
#elif defined(__aarch64__)
if (PT)
asmv("msr ttbr0_el1, %0"
:
: "r"(PT));
else
asmv("mrs %0, ttbr0_el1"
: "=r"(PT));
#endif
return PT;
}
}

2
arch/amd64/Limine.c
View File

@ -52,7 +52,7 @@ void init_limine()
while (1)
asmv("hlt");
}
TerminalResponse->write(TerminalResponse->terminals[0], "Please wait... ", 15);
TerminalResponse->write(TerminalResponse->terminals[0], "\033[37mPlease wait... ", 20);
struct limine_framebuffer_response *FrameBufferResponse = FramebufferRequest.response;
struct limine_memmap_response *MemmapResponse = MemmapRequest.response;