From 776f6d71b0592a1eb6827d1929ad5a2ea71d0637 Mon Sep 17 00:00:00 2001 From: Alex Date: Sun, 6 Nov 2022 04:55:01 +0200 Subject: [PATCH] implemented fxsr --- Architecture/amd64/cpu/fxsr.asm | 11 +++++++++++ Architecture/i686/cpu/fxsr.asm | 11 +++++++++++ include/cpu.hpp | 7 +++++++ 3 files changed, 29 insertions(+) create mode 100644 Architecture/amd64/cpu/fxsr.asm create mode 100644 Architecture/i686/cpu/fxsr.asm diff --git a/Architecture/amd64/cpu/fxsr.asm b/Architecture/amd64/cpu/fxsr.asm new file mode 100644 index 0000000..b91d269 --- /dev/null +++ b/Architecture/amd64/cpu/fxsr.asm @@ -0,0 +1,11 @@ +[bits 64] + +[global _amd64_fxsave] +_amd64_fxsave: + fxsave [rdi] + ret + +[global _amd64_fxrstor] +_amd64_fxrstor: + fxrstor [rdi] + ret diff --git a/Architecture/i686/cpu/fxsr.asm b/Architecture/i686/cpu/fxsr.asm new file mode 100644 index 0000000..47e40d7 --- /dev/null +++ b/Architecture/i686/cpu/fxsr.asm @@ -0,0 +1,11 @@ +[bits 64] + +[global _i386_fxsave] +_i386_fxsave: + fxsave [edi] + ret + +[global _i386_fxrstor] +_i386_fxrstor: + fxrstor [edi] + ret diff --git a/include/cpu.hpp b/include/cpu.hpp index 4f0ad78..95b055d 100644 --- a/include/cpu.hpp +++ b/include/cpu.hpp @@ -5,6 +5,11 @@ #include +extern "C" void _amd64_fxsave(char *Buffer); +extern "C" void _amd64_fxrstor(char *Buffer); +extern "C" void _i386_fxsave(char *Buffer); +extern "C" void _i386_fxrstor(char *Buffer); + #define x86_CPUID_VENDOR_OLDAMD "AMDisbetter!" /* Early engineering samples of AMD K5 processor */ #define x86_CPUID_VENDOR_AMD "AuthenticAMD" #define x86_CPUID_VENDOR_INTEL "GenuineIntel" @@ -1580,6 +1585,7 @@ namespace CPU __attribute__((no_stack_protector)) static inline void fxsave(char *FXSaveArea) { #if defined(__amd64__) + _amd64_fxsave(FXSaveArea); // asmv("fxsaveq (%0)" // : // : "r"(FXSaveArea) @@ -1590,6 +1596,7 @@ namespace CPU __attribute__((no_stack_protector)) static inline void fxrstor(char *FXRstorArea) { #if defined(__amd64__) + _amd64_fxrstor(FXRstorArea); // asmv("fxrstorq (%0)" // : // : "r"(FXRstorArea)