Fennix/Kernel
1
0
Fork 0
mirror of https://github.com/Fennix-Project/Kernel.git synced 2025-05-28 15:34:33 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Small fixes

Browse Source
This commit is contained in:
Alex 2022-12-06 00:14:37 +02:00
parent 1bb97f19fd
commit 632852c9e4
Signed by untrusted user who does not match committer: enderice2
GPG Key ID: EACC3AD603BAB4DD
3 changed files with 114 additions and 94 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

147
Core/Crash/CrashHandler.cpp
View File

@ -21,22 +21,6 @@
NewLock(UserInputLock); NewLock(UserInputLock);
#define TRACE_PAGE_TABLE(x, itr, depth) \
EHPrint("\e888888#%s\eAABBCC%03d\e4500F5: P:%s RW:%s US:%s PWT:%s PCB:%s A:%s D:%s PS:%s G:%s Address:\e888888%#lx\n", \
depth, \
itr, \
x.Present ? "\e00AA00Yes\e4500F5" : "\eAA0000No \e4500F5", \
x.ReadWrite ? "\e00AA00Yes\e4500F5" : "\eAA0000No \e4500F5", \
x.UserSupervisor ? "\e00AA00Yes\e4500F5" : "\eAA0000No \e4500F5", \
x.WriteThrough ? "\e00AA00Yes\e4500F5" : "\eAA0000No \e4500F5", \
x.CacheDisable ? "\e00AA00Yes\e4500F5" : "\eAA0000No \e4500F5", \
x.Accessed ? "\e00AA00Yes\e4500F5" : "\eAA0000No \e4500F5", \
x.Dirty ? "\e00AA00Yes\e4500F5" : "\eAA0000No \e4500F5", \
x.PageSize ? "\e00AA00Yes\e4500F5" : "\eAA0000No \e4500F5", \
x.Global ? "\e00AA00Yes\e4500F5" : "\eAA0000No \e4500F5", \
x.GetAddress() << 12); \
Display->SetBuffer(SBIdx);
namespace CrashHandler namespace CrashHandler
{ {
void *EHIntFrames[INT_FRAMES_MAX]; void *EHIntFrames[INT_FRAMES_MAX];
@ -312,54 +296,93 @@ namespace CrashHandler
debug("Converted %s to %#lx", arg, Address); debug("Converted %s to %#lx", arg, Address);
Memory::PageTable4 *BasePageTable = (Memory::PageTable4 *)Address; Memory::PageTable4 *BasePageTable = (Memory::PageTable4 *)Address;
if (Memory::Virtual().Check(BasePageTable)) if (Memory::Virtual().Check(BasePageTable))
for (int Index = 0; Index < 512; Index++) {
for (int PMLIndex = 0; PMLIndex < 512; PMLIndex++)
{ {
if (BasePageTable->Entries[Index].raw == 0) Memory::PageMapLevel4 PML4 = BasePageTable->Entries[PMLIndex];
continue; EHPrint("\e888888# \eAABBCC%03d-%03d-%03d-%03d\e4500F5: P:%s RW:%s US:%s PWT:%s PCB:%s A:%s NX:%s Address:\e888888%#lx\n",
PMLIndex, 0, 0, 0,
// TRACE_PAGE_TABLE(BasePageTable->Entries[Index], Index, ""); PML4.Present ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// for (int i = 0; i < 10000; i++) PML4.ReadWrite ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// inb(0x80); PML4.UserSupervisor ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PML4.WriteThrough ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// if (BasePageTable->Entries[Index].GetFlag(Memory::PTFlag::P)) PML4.CacheDisable ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// { PML4.Accessed ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// Memory::PageTable4 *PDP = (Memory::PageTable4 *)((uint64_t)BasePageTable->Entries[Index].GetAddress() << 12); PML4.ExecuteDisable ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// for (int PMLIndex = 0; PMLIndex < 512; PMLIndex++) PML4.GetAddress());
// { Display->SetBuffer(SBIdx);
// if (PDP->Entries[PMLIndex].raw == 0) if (PML4.Present)
// continue; {
// TRACE_PAGE_TABLE(PDP->Entries[PMLIndex], PMLIndex, " "); Memory::PageDirectoryPointerTableEntryPtr *PDPTE = (Memory::PageDirectoryPointerTableEntryPtr *)((uint64_t)PML4.GetAddress() << 12);
// for (int i = 0; i < 10000; i++) if (PDPTE)
// inb(0x80); {
for (int PDPTEIndex = 0; PDPTEIndex < 512; PDPTEIndex++)
// if (PDP->Entries[PMLIndex].GetFlag(Memory::PTFlag::P)) {
// { EHPrint("\e888888# \eAABBCC%03d-%03d-%03d-%03d\e4500F5: P:%s RW:%s US:%s PWT:%s PCB:%s A:%s NX:%s Address:\e888888%#lx\n",
// Memory::PageTable4 *PD = (Memory::PageTable4 *)((uint64_t)PDP->Entries[PMLIndex].GetAddress() << 12); PMLIndex, PDPTEIndex, 0, 0,
// for (int PDPTEIndex = 0; PDPTEIndex < 512; PDPTEIndex++) PDPTE->Entries[PDPTEIndex].Present ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// { PDPTE->Entries[PDPTEIndex].ReadWrite ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// if (PD->Entries[PDPTEIndex].raw == 0) PDPTE->Entries[PDPTEIndex].UserSupervisor ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// continue; PDPTE->Entries[PDPTEIndex].WriteThrough ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// TRACE_PAGE_TABLE(PD->Entries[PDPTEIndex], PDPTEIndex, " "); PDPTE->Entries[PDPTEIndex].CacheDisable ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// for (int i = 0; i < 10000; i++) PDPTE->Entries[PDPTEIndex].Accessed ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// inb(0x80); PDPTE->Entries[PDPTEIndex].ExecuteDisable ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PDPTE->Entries[PDPTEIndex].GetAddress());
// if (PD->Entries[PDPTEIndex].GetFlag(Memory::PTFlag::P)) Display->SetBuffer(SBIdx);
// { if ((PDPTE->Entries[PDPTEIndex].Present))
// Memory::PageTable4 *PT = (Memory::PageTable4 *)((uint64_t)PD->Entries[PDPTEIndex].GetAddress() << 12); {
// for (int PTEIndex = 0; PTEIndex < 512; PTEIndex++) Memory::PageDirectoryEntryPtr *PDE = (Memory::PageDirectoryEntryPtr *)((uint64_t)PDPTE->Entries[PDPTEIndex].GetAddress() << 12);
// { if (PDE)
// if (PT->Entries[PTEIndex].raw == 0) {
// continue; for (int PDEIndex = 0; PDEIndex < 512; PDEIndex++)
// TRACE_PAGE_TABLE(PT->Entries[PTEIndex], PTEIndex, " "); {
// for (int i = 0; i < 10000; i++) EHPrint("\e888888# \eAABBCC%03d-%03d-%03d-%03d\e4500F5: P:%s RW:%s US:%s PWT:%s PCB:%s A:%s NX:%s Address:\e888888%#lx\n",
// inb(0x80); PMLIndex, PDPTEIndex, PDEIndex, 0,
// } PDE->Entries[PDEIndex].Present ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// } PDE->Entries[PDEIndex].ReadWrite ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// } PDE->Entries[PDEIndex].UserSupervisor ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// } PDE->Entries[PDEIndex].WriteThrough ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// } PDE->Entries[PDEIndex].CacheDisable ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
// } PDE->Entries[PDEIndex].Accessed ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PDE->Entries[PDEIndex].ExecuteDisable ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PDE->Entries[PDEIndex].GetAddress());
Display->SetBuffer(SBIdx);
if ((PDE->Entries[PDEIndex].Present))
{
Memory::PageTableEntryPtr *PTE = (Memory::PageTableEntryPtr *)((uint64_t)PDE->Entries[PDEIndex].GetAddress() << 12);
if (PTE)
{
for (int PTEIndex = 0; PTEIndex < 512; PTEIndex++)
{
EHPrint("\e888888# \eAABBCC%03d-%03d-%03d-%03d\e4500F5: P:%s RW:%s US:%s PWT:%s PCB:%s A:%s D:%s PAT:%s G:%s PK:%d NX:%s Address:\e888888%#lx\n",
PMLIndex, PDPTEIndex, PDEIndex, PTEIndex,
PTE->Entries[PTEIndex].Present ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PTE->Entries[PTEIndex].ReadWrite ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PTE->Entries[PTEIndex].UserSupervisor ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PTE->Entries[PTEIndex].WriteThrough ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PTE->Entries[PTEIndex].CacheDisable ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PTE->Entries[PTEIndex].Accessed ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PTE->Entries[PTEIndex].Dirty ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PTE->Entries[PTEIndex].PageAttributeTable ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PTE->Entries[PTEIndex].Global ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PTE->Entries[PTEIndex].ProtectionKey,
PTE->Entries[PTEIndex].ExecuteDisable ? "\e00FF001\e4500F5" : "\eFF00000\e4500F5",
PTE->Entries[PTEIndex].GetAddress());
Display->SetBuffer(SBIdx);
if ((PTE->Entries[PTEIndex].Present))
{
}
}
}
}
}
}
}
}
}
}
} }
}
} }
else if (strncmp(Input, "bitmap", 6) == 0) else if (strncmp(Input, "bitmap", 6) == 0)
{ {

3
Core/Memory/VirtualMemoryManager.cpp
View File

@ -127,10 +127,7 @@ namespace Memory
(byte & 0x01 ? '1' : '0') (byte & 0x01 ? '1' : '0')
if (!this->Check(VirtualAddress, (PTFlag)Flags)) // quick workaround just to see where it fails if (!this->Check(VirtualAddress, (PTFlag)Flags)) // quick workaround just to see where it fails
{
this->Check(VirtualAddress, (PTFlag)Flags);
warn("Failed to map %#lx - %#lx with flags: " BYTE_TO_BINARY_PATTERN, VirtualAddress, PhysicalAddress, BYTE_TO_BINARY(Flags)); warn("Failed to map %#lx - %#lx with flags: " BYTE_TO_BINARY_PATTERN, VirtualAddress, PhysicalAddress, BYTE_TO_BINARY(Flags));
}
#endif #endif
} }

58
include/memory.hpp
View File

@ -169,8 +169,8 @@ namespace Memory
bool Global : 1; // 8 bool Global : 1; // 8
uint8_t Available0 : 3; // 9-11 uint8_t Available0 : 3; // 9-11
uint64_t Address : 40; // 12-51 uint64_t Address : 40; // 12-51
uint32_t Available1 : 7; // 52-58 uint32_t Available1 : 7; // 52-58
bool ProtectionKey : 4; // 59-62 uint8_t ProtectionKey : 4; // 59-62
bool ExecuteDisable : 1; // 63 bool ExecuteDisable : 1; // 63
}; };
uint64_t raw; uint64_t raw;
@ -215,15 +215,15 @@ namespace Memory
{ {
struct struct
{ {
bool Present : 1; // 0 bool Present : 1; // 0
bool ReadWrite : 1; // 1 bool ReadWrite : 1; // 1
bool UserSupervisor : 1; // 2 bool UserSupervisor : 1; // 2
bool WriteThrough : 1; // 3 bool WriteThrough : 1; // 3
bool CacheDisable : 1; // 4 bool CacheDisable : 1; // 4
bool Accessed : 1; // 5 bool Accessed : 1; // 5
bool Available0 : 1; // 6 bool Available0 : 1; // 6
bool PageSize : 1; // 7 bool PageSize : 1; // 7
uint8_t Available1 : 4; // 8-11 uint8_t Available1 : 4; // 8-11
uint64_t Address : 40; // 12-51 uint64_t Address : 40; // 12-51
uint32_t Available2 : 11; // 52-62 uint32_t Available2 : 11; // 52-62
bool ExecuteDisable : 1; // 63 bool ExecuteDisable : 1; // 63
@ -270,15 +270,15 @@ namespace Memory
{ {
struct struct
{ {
bool Present : 1; // 0 bool Present : 1; // 0
bool ReadWrite : 1; // 1 bool ReadWrite : 1; // 1
bool UserSupervisor : 1; // 2 bool UserSupervisor : 1; // 2
bool WriteThrough : 1; // 3 bool WriteThrough : 1; // 3
bool CacheDisable : 1; // 4 bool CacheDisable : 1; // 4
bool Accessed : 1; // 5 bool Accessed : 1; // 5
bool Available0 : 1; // 6 bool Available0 : 1; // 6
bool PageSize : 1; // 7 bool PageSize : 1; // 7
uint8_t Available1 : 4; // 8-11 uint8_t Available1 : 4; // 8-11
uint64_t Address : 40; // 12-51 uint64_t Address : 40; // 12-51
uint32_t Available2 : 11; // 52-62 uint32_t Available2 : 11; // 52-62
bool ExecuteDisable : 1; // 63 bool ExecuteDisable : 1; // 63
@ -325,15 +325,15 @@ namespace Memory
{ {
struct struct
{ {
bool Present : 1; // 0 bool Present : 1; // 0
bool ReadWrite : 1; // 1 bool ReadWrite : 1; // 1
bool UserSupervisor : 1; // 2 bool UserSupervisor : 1; // 2
bool WriteThrough : 1; // 3 bool WriteThrough : 1; // 3
bool CacheDisable : 1; // 4 bool CacheDisable : 1; // 4
bool Accessed : 1; // 5 bool Accessed : 1; // 5
bool Available0 : 1; // 6 bool Available0 : 1; // 6
bool Reserved0 : 1; // 7 bool Reserved0 : 1; // 7
uint8_t Available1 : 4; // 8-11 uint8_t Available1 : 4; // 8-11
uint64_t Address : 40; // 12-51 uint64_t Address : 40; // 12-51
uint32_t Available2 : 11; // 52-62 uint32_t Available2 : 11; // 52-62
bool ExecuteDisable : 1; // 63 bool ExecuteDisable : 1; // 63