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Enable compilation of project on AArch64 architecture

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This commit is contained in:
Alex
2023-04-04 16:06:54 +03:00
parent c4ae288ef1
commit 4e20d4d9f4
28 changed files with 242 additions and 50 deletions
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1
include/abi.h
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@ -84,6 +84,7 @@ typedef struct
#elif defined(a32)
Elf32_auxv_t archaux;
#elif defined(aa64)
Elf64_auxv_t archaux;
#endif
} AuxiliaryVector;

35
include/cpu.hpp
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@ -156,16 +156,20 @@ namespace CPU
/**
* @brief Stop the CPU (infinite loop)
*/
#if defined(a64) || defined(a32)
SafeFunction __noreturn __naked __used inline void Stop()
{
#if defined(a64) || defined(a32)
asmv("CPUStopLoop:\n"
"cli\n"
"hlt\n"
"jmp CPUStopLoop");
#elif defined(aa64)
asmv("msr daifset, #2");
asmv("wfe");
#elif defined(aa64) // annoying warning: "‘noreturn’ function does return" and "‘naked’ attribute directive ignored"
SafeFunction __used inline void Stop()
{
asmv("CPUStopLoop:\n"
"msr daifset, #2\n" // Disable IRQs (bit 1 of the DAIF register)
"wfi\n" // Wait for Interrupt (puts the processor in low-power state until an interrupt occurs)
"b CPUStopLoop"); // Branch to the beginning of the loop
#endif
}
@ -772,6 +776,29 @@ namespace CPU
namespace aarch64
{
typedef struct TrapFrame
{
uint64_t x19; // General purpose
uint64_t x20; // General purpose
uint64_t x21; // General purpose
uint64_t x22; // General purpose
uint64_t x23; // General purpose
uint64_t x24; // General purpose
uint64_t x25; // General purpose
uint64_t x26; // General purpose
uint64_t x27; // Stack frame pointer
uint64_t x28; // Link register
uint64_t x29; // Frame pointer
uint64_t x30; // Program counter
uint64_t sp_el0; // Stack pointer
uint64_t elr_el1; // Exception Link Register
uint64_t spsr_el1; // Saved Program Status Register
uint64_t ErrorCode /* esr_el1 */; // Exception Syndrome Register
uint64_t InterruptNumber /* iar_el1 */; // Interrupt Acknowledge Register
} TrapFrame;
}
}

2
include/driver.hpp
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@ -65,7 +65,7 @@ namespace Driver
#elif defined(a32)
void OnInterruptReceived(CPU::x32::TrapFrame *Frame);
#elif defined(aa64)
void OnInterruptReceived(void *Frame);
void OnInterruptReceived(CPU::aarch64::TrapFrame *Frame);
#endif
public:

40
include/intrin.hpp
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@ -21,6 +21,7 @@
#include <types.h>
#include <debug.h>
#if defined(a64) || defined(a32)
#define MMX_FN_ATTR __always_inline __target("mmx")
#define SSE_FN_ATTR __always_inline __target("sse")
#define SSE2_FN_ATTR __always_inline __target("sse2")
@ -30,6 +31,18 @@
#define SSE4_2_FN_ATTR __always_inline __target("sse4.2")
#define AVX_FN_ATTR __always_inline __target("avx")
#define AVX2_FN_ATTR __always_inline __target("avx2")
#elif defined(aa64)
#define MMX_FN_ATTR __always_inline
#define SSE_FN_ATTR __always_inline
#define SSE2_FN_ATTR __always_inline
#define SSE3_FN_ATTR __always_inline
#define SSSE3_FN_ATTR __always_inline
#define SSE4_1_FN_ATTR __always_inline
#define SSE4_2_FN_ATTR __always_inline
#define AVX_FN_ATTR __always_inline
#define AVX2_FN_ATTR __always_inline
#endif
#define ST_IN static inline
namespace FXSR
@ -73,19 +86,24 @@ namespace SMAP
{
void _clac(void)
{
#if defined(a64) || defined(a32)
asmv("clac" ::
: "cc");
#endif // a64 || a32
}
void _stac(void)
{
#if defined(a64) || defined(a32)
asmv("stac" ::
: "cc");
#endif // a64 || a32
}
}
namespace MMX
{
#if defined(a64) || defined(a32)
typedef long long __m64 __attribute__((__vector_size__(8), __aligned__(8)));
typedef long long __v1di __attribute__((__vector_size__(8)));
@ -97,10 +115,12 @@ namespace MMX
{
__builtin_ia32_emms();
}
#endif // a64 || a32
}
namespace SSE
{
#if defined(a64) || defined(a32)
typedef int __v4si __attribute__((__vector_size__(16)));
typedef unsigned int __v4su __attribute__((__vector_size__(16)));
typedef float __v4sf __attribute__((__vector_size__(16)));
@ -119,10 +139,12 @@ namespace SSE
{
return (__m128)((__v4sf)a + (__v4sf)b);
}
#endif // a64 || a32
}
namespace SSE2
{
#if defined(a64) || defined(a32)
typedef double __v2df __attribute__((__vector_size__(16)));
typedef long long __v2di __attribute__((__vector_size__(16)));
@ -178,41 +200,49 @@ namespace SSE2
: "=m"(*mem_addr)
: "x"(a));
}
#endif // a64 || a32
}
namespace SSE3
{
#if defined(a64) || defined(a32)
#endif // a64 || a32
}
namespace SSSE3
{
#if defined(a64) || defined(a32)
#endif // a64 || a32
}
namespace SSE4_1
{
#if defined(a64) || defined(a32)
typedef long long __m128i __attribute__((__vector_size__(16), __aligned__(16)));
ST_IN SSE4_1_FN_ATTR __m128i _mm_cvtepu8_epi32(__m128i a);
ST_IN SSE4_1_FN_ATTR __m128i _mm_mullo_epi32(__m128i a, __m128i b);
ST_IN SSE4_1_FN_ATTR __m128i _mm_srli_epi32(__m128i a, int imm8);
ST_IN SSE4_1_FN_ATTR int _mm_cvtsi128_si32(__m128i a);
#endif // a64 || a32
}
namespace SSE4_2
{
#if defined(a64) || defined(a32)
#endif // a64 || a32
}
namespace AVX
{
#if defined(a64) || defined(a32)
#endif // a64 || a32
}
namespace AVX2
{
#if defined(a64) || defined(a32)
#endif // a64 || a32
}
#endif // !__FENNIX_KERNEL_SIMD_H__

2
include/ints.hpp
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@ -70,7 +70,7 @@ namespace Interrupts
#elif defined(a32)
virtual void OnInterruptReceived(CPU::x32::TrapFrame *Frame);
#elif defined(aa64)
virtual void OnInterruptReceived(void *Frame);
virtual void OnInterruptReceived(CPU::aarch64::TrapFrame *Frame);
#endif
};
}

4
include/task.hpp
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@ -274,8 +274,8 @@ namespace Tasking
void Schedule(void *Frame);
void OnInterruptReceived(CPU::x32::TrapFrame *Frame);
#elif defined(aa64)
void Schedule(void *Frame);
void OnInterruptReceived(void *Frame);
void Schedule(CPU::aarch64::TrapFrame *Frame);
void OnInterruptReceived(CPU::aarch64::TrapFrame *Frame);
#endif
public: