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https://github.com/Fennix-Project/Kernel.git
synced 2025-07-11 07:19:20 +00:00
Enable compilation of project on AArch64 architecture
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@ -84,6 +84,7 @@ typedef struct
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#elif defined(a32)
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Elf32_auxv_t archaux;
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#elif defined(aa64)
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Elf64_auxv_t archaux;
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#endif
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} AuxiliaryVector;
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@ -156,16 +156,20 @@ namespace CPU
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/**
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* @brief Stop the CPU (infinite loop)
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*/
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#if defined(a64) || defined(a32)
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SafeFunction __noreturn __naked __used inline void Stop()
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{
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#if defined(a64) || defined(a32)
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asmv("CPUStopLoop:\n"
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"cli\n"
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"hlt\n"
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"jmp CPUStopLoop");
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#elif defined(aa64)
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asmv("msr daifset, #2");
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asmv("wfe");
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#elif defined(aa64) // annoying warning: "‘noreturn’ function does return" and "‘naked’ attribute directive ignored"
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SafeFunction __used inline void Stop()
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{
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asmv("CPUStopLoop:\n"
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"msr daifset, #2\n" // Disable IRQs (bit 1 of the DAIF register)
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"wfi\n" // Wait for Interrupt (puts the processor in low-power state until an interrupt occurs)
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"b CPUStopLoop"); // Branch to the beginning of the loop
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#endif
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}
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@ -772,6 +776,29 @@ namespace CPU
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namespace aarch64
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{
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typedef struct TrapFrame
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{
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uint64_t x19; // General purpose
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uint64_t x20; // General purpose
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uint64_t x21; // General purpose
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uint64_t x22; // General purpose
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uint64_t x23; // General purpose
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uint64_t x24; // General purpose
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uint64_t x25; // General purpose
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uint64_t x26; // General purpose
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uint64_t x27; // Stack frame pointer
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uint64_t x28; // Link register
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uint64_t x29; // Frame pointer
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uint64_t x30; // Program counter
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uint64_t sp_el0; // Stack pointer
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uint64_t elr_el1; // Exception Link Register
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uint64_t spsr_el1; // Saved Program Status Register
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uint64_t ErrorCode /* esr_el1 */; // Exception Syndrome Register
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uint64_t InterruptNumber /* iar_el1 */; // Interrupt Acknowledge Register
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} TrapFrame;
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}
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}
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@ -65,7 +65,7 @@ namespace Driver
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#elif defined(a32)
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void OnInterruptReceived(CPU::x32::TrapFrame *Frame);
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#elif defined(aa64)
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void OnInterruptReceived(void *Frame);
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void OnInterruptReceived(CPU::aarch64::TrapFrame *Frame);
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#endif
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public:
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@ -21,6 +21,7 @@
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#include <types.h>
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#include <debug.h>
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#if defined(a64) || defined(a32)
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#define MMX_FN_ATTR __always_inline __target("mmx")
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#define SSE_FN_ATTR __always_inline __target("sse")
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#define SSE2_FN_ATTR __always_inline __target("sse2")
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@ -30,6 +31,18 @@
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#define SSE4_2_FN_ATTR __always_inline __target("sse4.2")
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#define AVX_FN_ATTR __always_inline __target("avx")
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#define AVX2_FN_ATTR __always_inline __target("avx2")
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#elif defined(aa64)
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#define MMX_FN_ATTR __always_inline
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#define SSE_FN_ATTR __always_inline
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#define SSE2_FN_ATTR __always_inline
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#define SSE3_FN_ATTR __always_inline
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#define SSSE3_FN_ATTR __always_inline
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#define SSE4_1_FN_ATTR __always_inline
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#define SSE4_2_FN_ATTR __always_inline
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#define AVX_FN_ATTR __always_inline
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#define AVX2_FN_ATTR __always_inline
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#endif
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#define ST_IN static inline
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namespace FXSR
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@ -73,19 +86,24 @@ namespace SMAP
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{
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void _clac(void)
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{
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#if defined(a64) || defined(a32)
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asmv("clac" ::
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: "cc");
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#endif // a64 || a32
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}
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void _stac(void)
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{
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#if defined(a64) || defined(a32)
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asmv("stac" ::
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: "cc");
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#endif // a64 || a32
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}
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}
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namespace MMX
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{
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#if defined(a64) || defined(a32)
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typedef long long __m64 __attribute__((__vector_size__(8), __aligned__(8)));
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typedef long long __v1di __attribute__((__vector_size__(8)));
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@ -97,10 +115,12 @@ namespace MMX
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{
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__builtin_ia32_emms();
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}
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#endif // a64 || a32
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}
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namespace SSE
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{
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#if defined(a64) || defined(a32)
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typedef int __v4si __attribute__((__vector_size__(16)));
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typedef unsigned int __v4su __attribute__((__vector_size__(16)));
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typedef float __v4sf __attribute__((__vector_size__(16)));
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@ -119,10 +139,12 @@ namespace SSE
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{
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return (__m128)((__v4sf)a + (__v4sf)b);
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}
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#endif // a64 || a32
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}
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namespace SSE2
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{
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#if defined(a64) || defined(a32)
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typedef double __v2df __attribute__((__vector_size__(16)));
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typedef long long __v2di __attribute__((__vector_size__(16)));
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@ -178,41 +200,49 @@ namespace SSE2
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: "=m"(*mem_addr)
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: "x"(a));
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}
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#endif // a64 || a32
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}
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namespace SSE3
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{
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#if defined(a64) || defined(a32)
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#endif // a64 || a32
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}
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namespace SSSE3
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{
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#if defined(a64) || defined(a32)
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#endif // a64 || a32
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}
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namespace SSE4_1
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{
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#if defined(a64) || defined(a32)
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typedef long long __m128i __attribute__((__vector_size__(16), __aligned__(16)));
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ST_IN SSE4_1_FN_ATTR __m128i _mm_cvtepu8_epi32(__m128i a);
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ST_IN SSE4_1_FN_ATTR __m128i _mm_mullo_epi32(__m128i a, __m128i b);
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ST_IN SSE4_1_FN_ATTR __m128i _mm_srli_epi32(__m128i a, int imm8);
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ST_IN SSE4_1_FN_ATTR int _mm_cvtsi128_si32(__m128i a);
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#endif // a64 || a32
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}
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namespace SSE4_2
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{
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#if defined(a64) || defined(a32)
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#endif // a64 || a32
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}
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namespace AVX
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{
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#if defined(a64) || defined(a32)
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#endif // a64 || a32
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}
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namespace AVX2
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{
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#if defined(a64) || defined(a32)
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#endif // a64 || a32
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}
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#endif // !__FENNIX_KERNEL_SIMD_H__
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@ -70,7 +70,7 @@ namespace Interrupts
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#elif defined(a32)
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virtual void OnInterruptReceived(CPU::x32::TrapFrame *Frame);
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#elif defined(aa64)
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virtual void OnInterruptReceived(void *Frame);
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virtual void OnInterruptReceived(CPU::aarch64::TrapFrame *Frame);
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#endif
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};
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}
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@ -274,8 +274,8 @@ namespace Tasking
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void Schedule(void *Frame);
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void OnInterruptReceived(CPU::x32::TrapFrame *Frame);
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#elif defined(aa64)
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void Schedule(void *Frame);
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void OnInterruptReceived(void *Frame);
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void Schedule(CPU::aarch64::TrapFrame *Frame);
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void OnInterruptReceived(CPU::aarch64::TrapFrame *Frame);
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#endif
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public:
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