Fennix/Kernel
1
0
Fork 0
mirror of https://github.com/Fennix-Project/Kernel.git synced 2025-05-28 23:44:35 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Fixed cpu info

Browse Source
This commit is contained in:
Alex 2022-10-12 02:27:42 +03:00
parent 11fba7bd68
commit 44e707bf11
Signed by untrusted user who does not match committer: enderice2
GPG Key ID: EACC3AD603BAB4DD
1 changed files with 56 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

88
Core/CPU.cpp
View File

@ -1,19 +1,25 @@
#include <cpu.hpp> #include <cpu.hpp>
#include <memory.hpp> #include <memory.hpp>
#include <string.h>
namespace CPU namespace CPU
{ {
char *Vendor() char *Vendor()
{ {
static char Vendor[16]; static char Vendor[13];
#if defined(__amd64__) #if defined(__amd64__)
asmv("cpuid" uint32_t rax, rbx, rcx, rdx;
: "=a"(Vendor[0]), "=b"(Vendor[4]), "=c"(Vendor[8]), "=d"(Vendor[12]) CPU::x64::cpuid(0x0, &rax, &rbx, &rcx, &rdx);
: "a"(0)); memcpy(Vendor + 0, &rbx, 4);
memcpy(Vendor + 4, &rdx, 4);
memcpy(Vendor + 8, &rcx, 4);
#elif defined(__i386__) #elif defined(__i386__)
asmv("cpuid" uint32_t rax, rbx, rcx, rdx;
: "=a"(Vendor[0]), "=b"(Vendor[4]), "=c"(Vendor[8]), "=d"(Vendor[12]) CPU::x64::cpuid(0x0, &rax, &rbx, &rcx, &rdx);
: "a"(0)); memcpy(Vendor + 0, &rbx, 4);
memcpy(Vendor + 4, &rdx, 4);
memcpy(Vendor + 8, &rcx, 4);
#elif defined(__aarch64__) #elif defined(__aarch64__)
asmv("mrs %0, MIDR_EL1" asmv("mrs %0, MIDR_EL1"
: "=r"(Vendor[0])); : "=r"(Vendor[0]));
@ -25,25 +31,39 @@ namespace CPU
{ {
static char Name[48]; static char Name[48];
#if defined(__amd64__) #if defined(__amd64__)
asmv("cpuid" uint32_t rax, rbx, rcx, rdx;
: "=a"(Name[0]), "=b"(Name[4]), "=c"(Name[8]), "=d"(Name[12]) CPU::x64::cpuid(0x80000002, &rax, &rbx, &rcx, &rdx);
: "a"(0x80000002)); memcpy(Name + 0, &rax, 4);
asmv("cpuid" memcpy(Name + 4, &rbx, 4);
: "=a"(Name[16]), "=b"(Name[20]), "=c"(Name[24]), "=d"(Name[28]) memcpy(Name + 8, &rcx, 4);
: "a"(0x80000003)); memcpy(Name + 12, &rdx, 4);
asmv("cpuid" CPU::x64::cpuid(0x80000003, &rax, &rbx, &rcx, &rdx);
: "=a"(Name[32]), "=b"(Name[36]), "=c"(Name[40]), "=d"(Name[44]) memcpy(Name + 16, &rax, 4);
: "a"(0x80000004)); memcpy(Name + 20, &rbx, 4);
memcpy(Name + 24, &rcx, 4);
memcpy(Name + 28, &rdx, 4);
CPU::x64::cpuid(0x80000004, &rax, &rbx, &rcx, &rdx);
memcpy(Name + 32, &rax, 4);
memcpy(Name + 36, &rbx, 4);
memcpy(Name + 40, &rcx, 4);
memcpy(Name + 44, &rdx, 4);
#elif defined(__i386__) #elif defined(__i386__)
asmv("cpuid" uint32_t rax, rbx, rcx, rdx;
: "=a"(Name[0]), "=b"(Name[4]), "=c"(Name[8]), "=d"(Name[12]) CPU::x64::cpuid(0x80000002, &rax, &rbx, &rcx, &rdx);
: "a"(0x80000002)); memcpy(Name + 0, &rax, 4);
asmv("cpuid" memcpy(Name + 4, &rbx, 4);
: "=a"(Name[16]), "=b"(Name[20]), "=c"(Name[24]), "=d"(Name[28]) memcpy(Name + 8, &rcx, 4);
: "a"(0x80000003)); memcpy(Name + 12, &rdx, 4);
asmv("cpuid" CPU::x64::cpuid(0x80000003, &rax, &rbx, &rcx, &rdx);
: "=a"(Name[32]), "=b"(Name[36]), "=c"(Name[40]), "=d"(Name[44]) memcpy(Name + 16, &rax, 4);
: "a"(0x80000004)); memcpy(Name + 20, &rbx, 4);
memcpy(Name + 24, &rcx, 4);
memcpy(Name + 28, &rdx, 4);
CPU::x64::cpuid(0x80000004, &rax, &rbx, &rcx, &rdx);
memcpy(Name + 32, &rax, 4);
memcpy(Name + 36, &rbx, 4);
memcpy(Name + 40, &rcx, 4);
memcpy(Name + 44, &rdx, 4);
#elif defined(__aarch64__) #elif defined(__aarch64__)
asmv("mrs %0, MIDR_EL1" asmv("mrs %0, MIDR_EL1"
: "=r"(Name[0])); : "=r"(Name[0]));
@ -53,15 +73,19 @@ namespace CPU
char *Hypervisor() char *Hypervisor()
{ {
static char Hypervisor[16]; static char Hypervisor[13];
#if defined(__amd64__) #if defined(__amd64__)
asmv("cpuid" uint32_t rax, rbx, rcx, rdx;
: "=a"(Hypervisor[0]), "=b"(Hypervisor[4]), "=c"(Hypervisor[8]), "=d"(Hypervisor[12]) CPU::x64::cpuid(0x40000000, &rax, &rbx, &rcx, &rdx);
: "a"(0x40000000)); memcpy(Hypervisor + 0, &rbx, 4);
memcpy(Hypervisor + 4, &rcx, 4);
memcpy(Hypervisor + 8, &rdx, 4);
#elif defined(__i386__) #elif defined(__i386__)
asmv("cpuid" uint32_t rax, rbx, rcx, rdx;
: "=a"(Hypervisor[0]), "=b"(Hypervisor[4]), "=c"(Hypervisor[8]), "=d"(Hypervisor[12]) CPU::x64::cpuid(0x40000000, &rax, &rbx, &rcx, &rdx);
: "a"(0x40000000)); memcpy(Hypervisor + 0, &rbx, 4);
memcpy(Hypervisor + 4, &rcx, 4);
memcpy(Hypervisor + 8, &rdx, 4);
#elif defined(__aarch64__) #elif defined(__aarch64__)
asmv("mrs %0, MIDR_EL1" asmv("mrs %0, MIDR_EL1"
: "=r"(Hypervisor[0])); : "=r"(Hypervisor[0]));