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64
Architecture/amd64/MultipleAPICDescriptionTable.cpp
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64
Architecture/amd64/MultipleAPICDescriptionTable.cpp
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#include "acpi.hpp"
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#include <memory.hpp>
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#include <debug.h>
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namespace ACPI
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{
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MADT::MADT(ACPI::MADTHeader *madt)
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{
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LAPICAddr = (LAPIC *)(uintptr_t)madt->LocalControllerAddress;
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for (uint8_t *ptr = (uint8_t *)(madt->Entries);
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(uintptr_t)(ptr) < (uintptr_t)(madt) + madt->Header.Length;
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ptr += *(ptr + 1))
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{
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switch (*(ptr))
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{
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case 0:
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{
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if (ptr[4] & 1)
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{
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lapic.push_back((LocalAPIC *)ptr);
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trace("Local APIC %#llx (APIC %#llx) found.", lapic.back()->ACPIProcessorId, lapic.back()->APICId);
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CPUCores++;
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}
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break;
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}
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case 1:
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{
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ioapic.push_back((MADTIOApic *)ptr);
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trace("I/O APIC %#llx (Address %#llx) found.", ioapic.back()->APICID, ioapic.back()->addr);
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Memory::Virtual().Map((void *)(uintptr_t)ioapic.back()->addr, (void *)(uintptr_t)ioapic.back()->addr, Memory::PTFlag::RW | Memory::PTFlag::PCD); // Make sure that the address is mapped.
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break;
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}
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case 2:
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{
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iso.push_back((MADTIso *)ptr);
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trace("ISO (IRQ:%#llx, BUS:%#llx, GSI:%#llx, %s/%s) found.",
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iso.back()->IRQSource, iso.back()->BuSSource, iso.back()->GSI,
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iso.back()->Flags & 0x00000004 ? "Active High" : "Active Low",
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iso.back()->Flags & 0x00000100 ? "Edge Triggered" : "Level Triggered");
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break;
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}
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case 4:
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{
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nmi.push_back((MADTNmi *)ptr);
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trace("NMI %#llx (lint:%#llx) found.", nmi.back()->processor, nmi.back()->lint);
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break;
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}
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case 5:
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{
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LAPICAddr = (LAPIC *)ptr;
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trace("APIC found at %#llx", LAPICAddr);
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break;
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}
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}
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Memory::Virtual().Map((void *)LAPICAddr, (void *)LAPICAddr, Memory::PTFlag::RW | Memory::PTFlag::PCD); // I should map more than one page?
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}
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trace("Total CPU cores: %d", CPUCores);
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}
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MADT::~MADT()
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{
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}
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}
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