mirror of
https://github.com/Fennix-Project/Kernel.git
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Update kernel
This commit is contained in:
Alex
@ -24,249 +24,236 @@
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namespace GlobalDescriptorTable
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{
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static GlobalDescriptorTableEntries GDTEntriesTemplate = {
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.Null =
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{
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.Limit0 = 0x0,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {.Raw = 0x0},
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// .Limit1 = 0x0,
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.Flags = {.Raw = 0x0},
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.BaseHigh = 0x0,
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},
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static GlobalDescriptorTableEntries GDTEntriesTemplate = {
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.Null =
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{
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.Limit0 = 0x0,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {.Raw = 0x0},
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// .Limit1 = 0x0,
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.Flags = {.Raw = 0x0},
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.BaseHigh = 0x0,
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},
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.Code =
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{
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 1,
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.S = 1,
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.DPL = 0,
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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.Code =
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{
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 1,
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.S = 1,
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.DPL = 0,
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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.Data = {
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 0,
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.S = 1,
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.DPL = 0,
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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.Data = {
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 0,
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.S = 1,
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.DPL = 0,
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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.UserData = {
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 0,
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.S = 1,
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.DPL = 3,
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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.UserData = {
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 0,
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.S = 1,
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.DPL = 3,
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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.UserCode = {
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 1,
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.S = 1,
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.DPL = 3,
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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.UserCode = {
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.Limit0 = 0xFFFF,
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.BaseLow = 0x0,
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.BaseMiddle = 0x0,
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.Access = {
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.A = 0,
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.RW = 1,
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.DC = 0,
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.E = 1,
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.S = 1,
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.DPL = 3,
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.P = 1,
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},
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// .Limit1 = 0xF,
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.Flags = {
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.Reserved = 0xF, /* Workaround for Limit1 */
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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.AVL = 0,
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.L = 0,
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.DB = 1,
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.G = 1,
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},
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.BaseHigh = 0x0,
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},
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.TaskStateSegment = {},
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};
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.TaskStateSegment = {},
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};
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GlobalDescriptorTableEntries GDTEntries[MAX_CPU] __aligned(16);
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GlobalDescriptorTableDescriptor gdt[MAX_CPU] __aligned(16);
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GlobalDescriptorTableEntries GDTEntries[MAX_CPU] __aligned(16);
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GlobalDescriptorTableDescriptor gdt[MAX_CPU] __aligned(16);
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TaskStateSegment tss[MAX_CPU] = {
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0,
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{0, 0, 0},
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0,
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{0, 0, 0, 0, 0, 0, 0},
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0,
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0,
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0,
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};
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TaskStateSegment tss[MAX_CPU] = {
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0,
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{0, 0, 0},
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0,
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{0, 0, 0, 0, 0, 0, 0},
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0,
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0,
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0,
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};
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void *CPUStackPointer[MAX_CPU];
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void *CPUStackPointer[MAX_CPU];
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SafeFunction void Init(int Core)
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{
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memcpy(&GDTEntries[Core], &GDTEntriesTemplate, sizeof(GlobalDescriptorTableEntries));
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gdt[Core] = {.Length = sizeof(GlobalDescriptorTableEntries) - 1, .Entries = &GDTEntries[Core]};
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SafeFunction void Init(int Core)
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{
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memcpy(&GDTEntries[Core], &GDTEntriesTemplate, sizeof(GlobalDescriptorTableEntries));
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gdt[Core] = {.Length = sizeof(GlobalDescriptorTableEntries) - 1, .Entries = &GDTEntries[Core]};
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debug("GDT: %#lx", &gdt[Core]);
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debug("GDT KERNEL: CODE %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_KERNEL_CODE,
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GDTEntries[Core].Code.Limit0,
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GDTEntries[Core].Code.BaseLow,
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GDTEntries[Core].Code.BaseMiddle,
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GDTEntries[Core].Code.Access.Raw,
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GDTEntries[Core].Code.Flags.Reserved,
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GDTEntries[Core].Code.Flags.Raw & ~0xF,
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GDTEntries[Core].Code.BaseHigh);
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debug("GDT: %#lx", &gdt[Core]);
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debug("GDT KERNEL: CODE %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_KERNEL_CODE,
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GDTEntries[Core].Code.Limit0,
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GDTEntries[Core].Code.BaseLow,
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GDTEntries[Core].Code.BaseMiddle,
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GDTEntries[Core].Code.Access.Raw,
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GDTEntries[Core].Code.Flags.Reserved,
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GDTEntries[Core].Code.Flags.Raw & ~0xF,
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GDTEntries[Core].Code.BaseHigh);
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debug("GDT KERNEL: DATA %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_KERNEL_DATA,
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GDTEntries[Core].Data.Limit0,
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GDTEntries[Core].Data.BaseLow,
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GDTEntries[Core].Data.BaseMiddle,
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GDTEntries[Core].Data.Access.Raw,
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GDTEntries[Core].Data.Flags.Reserved,
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GDTEntries[Core].Data.Flags.Raw & ~0xF,
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GDTEntries[Core].Data.BaseHigh);
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debug("GDT KERNEL: DATA %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_KERNEL_DATA,
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GDTEntries[Core].Data.Limit0,
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GDTEntries[Core].Data.BaseLow,
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GDTEntries[Core].Data.BaseMiddle,
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GDTEntries[Core].Data.Access.Raw,
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GDTEntries[Core].Data.Flags.Reserved,
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GDTEntries[Core].Data.Flags.Raw & ~0xF,
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GDTEntries[Core].Data.BaseHigh);
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debug("GDT USER: CODE %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_USER_CODE,
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GDTEntries[Core].UserCode.Limit0,
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GDTEntries[Core].UserCode.BaseLow,
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GDTEntries[Core].UserCode.BaseMiddle,
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GDTEntries[Core].UserCode.Access.Raw,
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GDTEntries[Core].UserCode.Flags.Reserved,
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GDTEntries[Core].UserCode.Flags.Raw & ~0xF,
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GDTEntries[Core].UserCode.BaseHigh);
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debug("GDT USER: CODE %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_USER_CODE,
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GDTEntries[Core].UserCode.Limit0,
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GDTEntries[Core].UserCode.BaseLow,
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GDTEntries[Core].UserCode.BaseMiddle,
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GDTEntries[Core].UserCode.Access.Raw,
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GDTEntries[Core].UserCode.Flags.Reserved,
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GDTEntries[Core].UserCode.Flags.Raw & ~0xF,
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GDTEntries[Core].UserCode.BaseHigh);
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debug("GDT USER: DATA %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_USER_DATA,
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GDTEntries[Core].UserData.Limit0,
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GDTEntries[Core].UserData.BaseLow,
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GDTEntries[Core].UserData.BaseMiddle,
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GDTEntries[Core].UserData.Access.Raw,
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GDTEntries[Core].UserData.Flags.Reserved,
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GDTEntries[Core].UserData.Flags.Raw & ~0xF,
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GDTEntries[Core].UserData.BaseHigh);
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debug("GDT USER: DATA %#lx: Limit0: 0x%X, BaseLow: 0x%X, BaseMiddle: 0x%X, Access: 0x%X, Limit1: 0x%X, Flags: 0x%X, BaseHigh: 0x%X",
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GDT_USER_DATA,
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GDTEntries[Core].UserData.Limit0,
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GDTEntries[Core].UserData.BaseLow,
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GDTEntries[Core].UserData.BaseMiddle,
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GDTEntries[Core].UserData.Access.Raw,
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GDTEntries[Core].UserData.Flags.Reserved,
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GDTEntries[Core].UserData.Flags.Raw & ~0xF,
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GDTEntries[Core].UserData.BaseHigh);
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CPU::x32::lgdt(&gdt[Core]);
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CPU::x32::lgdt(&gdt[Core]);
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asmv("mov %%esp, %%eax\n"
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"push $16\n"
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"push %%eax\n"
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"pushf\n"
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"push $8\n"
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"push $1f\n"
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"iret\n"
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"1:\n"
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"movw $16, %%ax\n"
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"movw %%ax, %%ds\n"
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"movw %%ax, %%es\n" ::
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: "memory", "eax");
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asmv("mov %%esp, %%eax\n"
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"push $16\n"
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"push %%eax\n"
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"pushf\n"
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"push $8\n"
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"push $1f\n"
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"iret\n"
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"1:\n"
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"movw $16, %%ax\n"
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"movw %%ax, %%ds\n"
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"movw %%ax, %%es\n" ::
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: "memory", "eax");
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CPUStackPointer[Core] = KernelAllocator.RequestPages(TO_PAGES(STACK_SIZE + 1));
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memset(CPUStackPointer[Core], 0, STACK_SIZE);
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debug("CPU %d Stack Pointer: %#lx-%#lx (%d pages)", Core,
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CPUStackPointer[Core], (uintptr_t)CPUStackPointer[Core] + STACK_SIZE,
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TO_PAGES(STACK_SIZE + 1));
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CPUStackPointer[Core] = KernelAllocator.RequestPages(TO_PAGES(STACK_SIZE + 1));
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memset(CPUStackPointer[Core], 0, STACK_SIZE);
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debug("CPU %d Stack Pointer: %#lx-%#lx (%d pages)", Core,
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CPUStackPointer[Core], (uintptr_t)CPUStackPointer[Core] + STACK_SIZE,
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TO_PAGES(STACK_SIZE + 1));
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uintptr_t Base = (uintptr_t)&tss[Core];
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size_t Limit = Base + sizeof(TaskStateSegment);
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gdt[Core].Entries->TaskStateSegment.Limit = Limit & 0xFFFF;
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gdt[Core].Entries->TaskStateSegment.BaseLow = Base & 0xFFFF;
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gdt[Core].Entries->TaskStateSegment.BaseMiddle = (Base >> 16) & 0xFF;
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gdt[Core].Entries->TaskStateSegment.BaseHigh = (Base >> 24) & 0xFF;
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gdt[Core].Entries->TaskStateSegment.BaseUpper = s_cst(uint32_t, (Base >> 32) & 0xFFFFFFFF);
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gdt[Core].Entries->TaskStateSegment.Access = {.A = 1, .RW = 0, .DC = 0, .E = 1, .S = 0, .DPL = 0, .P = 1};
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gdt[Core].Entries->TaskStateSegment.Granularity = (0 << 4) | ((Limit >> 16) & 0xF);
|
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uintptr_t Base = (uintptr_t)&tss[Core];
|
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size_t Limit = Base + sizeof(TaskStateSegment);
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gdt[Core].Entries->TaskStateSegment.Limit = Limit & 0xFFFF;
|
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gdt[Core].Entries->TaskStateSegment.BaseLow = Base & 0xFFFF;
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gdt[Core].Entries->TaskStateSegment.BaseMiddle = uint8_t((Base >> 16) & 0xFF);
|
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gdt[Core].Entries->TaskStateSegment.BaseHigh = uint8_t((Base >> 24) & 0xFF);
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gdt[Core].Entries->TaskStateSegment.BaseUpper = s_cst(uint32_t, (Base >> 32) & 0xFFFFFFFF);
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gdt[Core].Entries->TaskStateSegment.Access = {.A = 1, .RW = 0, .DC = 0, .E = 1, .S = 0, .DPL = 0, .P = 1};
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gdt[Core].Entries->TaskStateSegment.Granularity = (0 << 4) | ((Limit >> 16) & 0xF);
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|
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tss[Core].IOMapBaseAddressOffset = sizeof(TaskStateSegment);
|
||||
tss[Core].StackPointer[0] = (uint64_t)CPUStackPointer[Core] + STACK_SIZE;
|
||||
tss[Core].StackPointer[1] = 0x0;
|
||||
tss[Core].StackPointer[2] = 0x0;
|
||||
tss[Core].IOMapBaseAddressOffset = sizeof(TaskStateSegment);
|
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tss[Core].StackPointer[0] = (uint32_t)CPUStackPointer[Core] + STACK_SIZE;
|
||||
tss[Core].StackPointer[1] = 0x0;
|
||||
tss[Core].StackPointer[2] = 0x0;
|
||||
|
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for (size_t i = 0; i < sizeof(tss[Core].InterruptStackTable) / sizeof(tss[Core].InterruptStackTable[7]); i++)
|
||||
{
|
||||
void *NewStack = KernelAllocator.RequestPages(TO_PAGES(STACK_SIZE + 1));
|
||||
for (size_t i = 0; i < sizeof(tss[Core].InterruptStackTable) / sizeof(tss[Core].InterruptStackTable[7]); i++)
|
||||
{
|
||||
void *NewStack = KernelAllocator.RequestPages(TO_PAGES(STACK_SIZE + 1));
|
||||
|
||||
tss[Core].InterruptStackTable[i] = (uint64_t)NewStack + STACK_SIZE;
|
||||
memset((void *)(tss[Core].InterruptStackTable[i] - STACK_SIZE), 0, STACK_SIZE);
|
||||
debug("IST-%d: %#lx-%#lx", i, NewStack, (uintptr_t)NewStack + STACK_SIZE);
|
||||
}
|
||||
tss[Core].InterruptStackTable[i] = (uint32_t)NewStack + STACK_SIZE;
|
||||
memset((void *)(tss[Core].InterruptStackTable[i] - STACK_SIZE), 0, STACK_SIZE);
|
||||
debug("IST-%d: %#lx-%#lx", i, NewStack, (uintptr_t)NewStack + STACK_SIZE);
|
||||
}
|
||||
|
||||
CPU::x32::ltr(GDT_TSS);
|
||||
debug("Global Descriptor Table initialized");
|
||||
}
|
||||
CPU::x32::ltr(GDT_TSS);
|
||||
debug("Global Descriptor Table initialized");
|
||||
}
|
||||
|
||||
SafeFunction void SetKernelStack(void *Stack)
|
||||
{
|
||||
long CPUID = GetCurrentCPU()->ID;
|
||||
if (Stack != nullptr)
|
||||
tss[CPUID].StackPointer[0] = (uint64_t)Stack;
|
||||
else
|
||||
tss[CPUID].StackPointer[0] = (uint64_t)CPUStackPointer[CPUID] + STACK_SIZE;
|
||||
SafeFunction void SetKernelStack(void *Stack)
|
||||
{
|
||||
long CPUID = GetCurrentCPU()->ID;
|
||||
}
|
||||
|
||||
/*
|
||||
FIXME: There's a bug in kernel which if
|
||||
we won't update "tss[CPUID].StackPointer[0]"
|
||||
with the current stack pointer, the kernel
|
||||
will crash.
|
||||
*/
|
||||
asmv("mov %%esp, %0"
|
||||
: "=r"(tss[CPUID].StackPointer[0]));
|
||||
}
|
||||
|
||||
void *GetKernelStack() { return (void *)tss[GetCurrentCPU()->ID].StackPointer[0]; }
|
||||
void *GetKernelStack() { return (void *)nullptr; }
|
||||
}
|
||||
|
||||
@ -22,197 +22,197 @@
|
||||
|
||||
namespace GlobalDescriptorTable
|
||||
{
|
||||
struct TaskStateSegmentEntry
|
||||
{
|
||||
/* LOW */
|
||||
uint16_t Limit;
|
||||
uint16_t BaseLow;
|
||||
uint8_t BaseMiddle;
|
||||
union GlobalDescriptorTableAccess
|
||||
{
|
||||
struct
|
||||
{
|
||||
/** @brief Access bit.
|
||||
* @note The CPU sets this bit to 1 when the segment is accessed.
|
||||
*/
|
||||
uint8_t A : 1;
|
||||
struct TaskStateSegmentEntry
|
||||
{
|
||||
/* LOW */
|
||||
uint16_t Limit;
|
||||
uint16_t BaseLow;
|
||||
uint8_t BaseMiddle;
|
||||
union GlobalDescriptorTableAccess
|
||||
{
|
||||
struct
|
||||
{
|
||||
/** @brief Access bit.
|
||||
* @note The CPU sets this bit to 1 when the segment is accessed.
|
||||
*/
|
||||
uint8_t A : 1;
|
||||
|
||||
/** @brief Readable bit for code segments, writable bit for data segments.
|
||||
* @details For code segments, this bit must be 1 for the segment to be readable.
|
||||
* @details For data segments, this bit must be 1 for the segment to be writable.
|
||||
*/
|
||||
uint8_t RW : 1;
|
||||
/** @brief Readable bit for code segments, writable bit for data segments.
|
||||
* @details For code segments, this bit must be 1 for the segment to be readable.
|
||||
* @details For data segments, this bit must be 1 for the segment to be writable.
|
||||
*/
|
||||
uint8_t RW : 1;
|
||||
|
||||
/** @brief Direction bit for data segments, conforming bit for code segments.
|
||||
* @details For data segments, this bit must be 1 for the segment to grow up (higher addresses).
|
||||
* @details For code segments, this bit must be 1 for code in the segment to be able to be executed from an equal or lower privilege level.
|
||||
*/
|
||||
uint8_t DC : 1;
|
||||
/** @brief Direction bit for data segments, conforming bit for code segments.
|
||||
* @details For data segments, this bit must be 1 for the segment to grow up (higher addresses).
|
||||
* @details For code segments, this bit must be 1 for code in the segment to be able to be executed from an equal or lower privilege level.
|
||||
*/
|
||||
uint8_t DC : 1;
|
||||
|
||||
/** @brief Executable bit.
|
||||
* @details This bit must be 1 for code-segment descriptors.
|
||||
* @details This bit must be 0 for data-segment and system descriptors.
|
||||
*/
|
||||
uint8_t E : 1;
|
||||
/** @brief Executable bit.
|
||||
* @details This bit must be 1 for code-segment descriptors.
|
||||
* @details This bit must be 0 for data-segment and system descriptors.
|
||||
*/
|
||||
uint8_t E : 1;
|
||||
|
||||
/** @brief Descriptor type.
|
||||
* @details This bit must be 0 for system descriptors.
|
||||
* @details This bit must be 1 for code or data segment descriptor.
|
||||
*/
|
||||
uint8_t S : 1;
|
||||
/** @brief Descriptor type.
|
||||
* @details This bit must be 0 for system descriptors.
|
||||
* @details This bit must be 1 for code or data segment descriptor.
|
||||
*/
|
||||
uint8_t S : 1;
|
||||
|
||||
/** @brief Descriptor privilege level.
|
||||
* @details This field determines the privilege level of the segment.
|
||||
* @details 0 = kernel mode, 3 = user mode.
|
||||
*/
|
||||
uint8_t DPL : 2;
|
||||
/** @brief Descriptor privilege level.
|
||||
* @details This field determines the privilege level of the segment.
|
||||
* @details 0 = kernel mode, 3 = user mode.
|
||||
*/
|
||||
uint8_t DPL : 2;
|
||||
|
||||
/** @brief Present bit.
|
||||
* @details This bit must be 1 for all valid descriptors.
|
||||
*/
|
||||
uint8_t P : 1;
|
||||
} __packed;
|
||||
uint8_t Raw : 8;
|
||||
} Access;
|
||||
uint8_t Granularity;
|
||||
uint8_t BaseHigh;
|
||||
/* HIGH */
|
||||
uint32_t BaseUpper;
|
||||
uint32_t Reserved;
|
||||
} __packed;
|
||||
/** @brief Present bit.
|
||||
* @details This bit must be 1 for all valid descriptors.
|
||||
*/
|
||||
uint8_t P : 1;
|
||||
} __packed;
|
||||
uint8_t Raw : 8;
|
||||
} Access;
|
||||
uint8_t Granularity;
|
||||
uint8_t BaseHigh;
|
||||
/* HIGH */
|
||||
uint32_t BaseUpper;
|
||||
uint32_t Reserved;
|
||||
} __packed;
|
||||
|
||||
struct TaskStateSegment
|
||||
{
|
||||
uint32_t Reserved0 __aligned(16);
|
||||
uint64_t StackPointer[3];
|
||||
uint64_t Reserved1;
|
||||
uint64_t InterruptStackTable[7];
|
||||
uint64_t Reserved2;
|
||||
uint16_t Reserved3;
|
||||
uint16_t IOMapBaseAddressOffset;
|
||||
} __packed;
|
||||
struct TaskStateSegment
|
||||
{
|
||||
uint32_t Reserved0 __aligned(16);
|
||||
uint64_t StackPointer[3];
|
||||
uint64_t Reserved1;
|
||||
uint64_t InterruptStackTable[7];
|
||||
uint64_t Reserved2;
|
||||
uint16_t Reserved3;
|
||||
uint16_t IOMapBaseAddressOffset;
|
||||
} __packed;
|
||||
|
||||
struct GlobalDescriptorTableEntry
|
||||
{
|
||||
/** @brief Limit 0:15 */
|
||||
uint16_t Limit0 : 16;
|
||||
struct GlobalDescriptorTableEntry
|
||||
{
|
||||
/** @brief Limit 0:15 */
|
||||
uint16_t Limit0 : 16;
|
||||
|
||||
/** @brief Low Base 0:15 */
|
||||
uint16_t BaseLow : 16;
|
||||
/** @brief Low Base 0:15 */
|
||||
uint16_t BaseLow : 16;
|
||||
|
||||
/** @brief Middle Base 16:23 */
|
||||
uint8_t BaseMiddle : 8;
|
||||
/** @brief Middle Base 16:23 */
|
||||
uint8_t BaseMiddle : 8;
|
||||
|
||||
/** @brief Access */
|
||||
union GlobalDescriptorTableAccess
|
||||
{
|
||||
struct
|
||||
{
|
||||
/** @brief Access bit.
|
||||
* @note The CPU sets this bit to 1 when the segment is accessed.
|
||||
*/
|
||||
uint8_t A : 1;
|
||||
/** @brief Access */
|
||||
union GlobalDescriptorTableAccess
|
||||
{
|
||||
struct
|
||||
{
|
||||
/** @brief Access bit.
|
||||
* @note The CPU sets this bit to 1 when the segment is accessed.
|
||||
*/
|
||||
uint8_t A : 1;
|
||||
|
||||
/** @brief Readable bit for code segments, writable bit for data segments.
|
||||
* @details For code segments, this bit must be 1 for the segment to be readable.
|
||||
* @details For data segments, this bit must be 1 for the segment to be writable.
|
||||
*/
|
||||
uint8_t RW : 1;
|
||||
/** @brief Readable bit for code segments, writable bit for data segments.
|
||||
* @details For code segments, this bit must be 1 for the segment to be readable.
|
||||
* @details For data segments, this bit must be 1 for the segment to be writable.
|
||||
*/
|
||||
uint8_t RW : 1;
|
||||
|
||||
/** @brief Direction bit for data segments, conforming bit for code segments.
|
||||
* @details For data segments, this bit must be 1 for the segment to grow up (higher addresses).
|
||||
* @details For code segments, this bit must be 1 for code in the segment to be able to be executed from an equal or lower privilege level.
|
||||
*/
|
||||
uint8_t DC : 1;
|
||||
/** @brief Direction bit for data segments, conforming bit for code segments.
|
||||
* @details For data segments, this bit must be 1 for the segment to grow up (higher addresses).
|
||||
* @details For code segments, this bit must be 1 for code in the segment to be able to be executed from an equal or lower privilege level.
|
||||
*/
|
||||
uint8_t DC : 1;
|
||||
|
||||
/** @brief Executable bit.
|
||||
* @details This bit must be 1 for code-segment descriptors.
|
||||
* @details This bit must be 0 for data-segment and system descriptors.
|
||||
*/
|
||||
uint8_t E : 1;
|
||||
/** @brief Executable bit.
|
||||
* @details This bit must be 1 for code-segment descriptors.
|
||||
* @details This bit must be 0 for data-segment and system descriptors.
|
||||
*/
|
||||
uint8_t E : 1;
|
||||
|
||||
/** @brief Descriptor type.
|
||||
* @details This bit must be 0 for system descriptors.
|
||||
* @details This bit must be 1 for code or data segment descriptor.
|
||||
*/
|
||||
uint8_t S : 1;
|
||||
/** @brief Descriptor type.
|
||||
* @details This bit must be 0 for system descriptors.
|
||||
* @details This bit must be 1 for code or data segment descriptor.
|
||||
*/
|
||||
uint8_t S : 1;
|
||||
|
||||
/** @brief Descriptor privilege level.
|
||||
* @details This field determines the privilege level of the segment.
|
||||
* @details 0 = kernel mode, 3 = user mode.
|
||||
*/
|
||||
uint8_t DPL : 2;
|
||||
/** @brief Descriptor privilege level.
|
||||
* @details This field determines the privilege level of the segment.
|
||||
* @details 0 = kernel mode, 3 = user mode.
|
||||
*/
|
||||
uint8_t DPL : 2;
|
||||
|
||||
/** @brief Present bit.
|
||||
* @details This bit must be 1 for all valid descriptors.
|
||||
*/
|
||||
uint8_t P : 1;
|
||||
} __packed;
|
||||
uint8_t Raw : 8;
|
||||
} Access;
|
||||
/** @brief Present bit.
|
||||
* @details This bit must be 1 for all valid descriptors.
|
||||
*/
|
||||
uint8_t P : 1;
|
||||
} __packed;
|
||||
uint8_t Raw : 8;
|
||||
} Access;
|
||||
|
||||
// /** @brief Limit 16:19 */
|
||||
// uint16_t Limit1 : 4;
|
||||
// /** @brief Limit 16:19 */
|
||||
// uint16_t Limit1 : 4;
|
||||
|
||||
/** @brief Flags */
|
||||
union GlobalDescriptorTableFlags
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint8_t Reserved : 4; /* FIXME: Without this, the kernel crashes. */
|
||||
/** @brief Available bit.
|
||||
* @details This bit is available for use by system software.
|
||||
*/
|
||||
uint8_t AVL : 1;
|
||||
/** @brief Flags */
|
||||
union GlobalDescriptorTableFlags
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint8_t Reserved : 4; /* FIXME: Without this, the kernel crashes. */
|
||||
/** @brief Available bit.
|
||||
* @details This bit is available for use by system software.
|
||||
*/
|
||||
uint8_t AVL : 1;
|
||||
|
||||
/** @brief Long mode.
|
||||
* @details If the long mode bit is clear, the segment is in 32-bit protected mode.
|
||||
* @details If the long mode bit is set, the segment is in 64-bit long mode.
|
||||
*/
|
||||
uint8_t L : 1;
|
||||
/** @brief Long mode.
|
||||
* @details If the long mode bit is clear, the segment is in 32-bit protected mode.
|
||||
* @details If the long mode bit is set, the segment is in 64-bit long mode.
|
||||
*/
|
||||
uint8_t L : 1;
|
||||
|
||||
/** @brief Size flag.
|
||||
* @details If the size bit is clear, the segment is in 16-bit protected mode.
|
||||
* @details If the size bit is set, the segment is in 32-bit protected mode.
|
||||
*/
|
||||
uint8_t DB : 1;
|
||||
/** @brief Size flag.
|
||||
* @details If the size bit is clear, the segment is in 16-bit protected mode.
|
||||
* @details If the size bit is set, the segment is in 32-bit protected mode.
|
||||
*/
|
||||
uint8_t DB : 1;
|
||||
|
||||
/** @brief Granularity bit.
|
||||
* @details If the granularity bit is clear, the segment limit is in 1 B blocks.
|
||||
* @details If the granularity bit is set, the segment limit is in 4 KiB blocks.
|
||||
*/
|
||||
uint8_t G : 1;
|
||||
} __packed;
|
||||
uint8_t Raw : 8;
|
||||
} Flags;
|
||||
/** @brief Granularity bit.
|
||||
* @details If the granularity bit is clear, the segment limit is in 1 B blocks.
|
||||
* @details If the granularity bit is set, the segment limit is in 4 KiB blocks.
|
||||
*/
|
||||
uint8_t G : 1;
|
||||
} __packed;
|
||||
uint8_t Raw : 8;
|
||||
} Flags;
|
||||
|
||||
/** @brief High Base 24:31 */
|
||||
uint8_t BaseHigh : 8;
|
||||
} __packed;
|
||||
/** @brief High Base 24:31 */
|
||||
uint8_t BaseHigh : 8;
|
||||
} __packed;
|
||||
|
||||
struct GlobalDescriptorTableEntries
|
||||
{
|
||||
GlobalDescriptorTableEntry Null;
|
||||
GlobalDescriptorTableEntry Code;
|
||||
GlobalDescriptorTableEntry Data;
|
||||
GlobalDescriptorTableEntry UserData;
|
||||
GlobalDescriptorTableEntry UserCode;
|
||||
TaskStateSegmentEntry TaskStateSegment;
|
||||
} __packed;
|
||||
struct GlobalDescriptorTableEntries
|
||||
{
|
||||
GlobalDescriptorTableEntry Null;
|
||||
GlobalDescriptorTableEntry Code;
|
||||
GlobalDescriptorTableEntry Data;
|
||||
GlobalDescriptorTableEntry UserData;
|
||||
GlobalDescriptorTableEntry UserCode;
|
||||
TaskStateSegmentEntry TaskStateSegment;
|
||||
} __packed;
|
||||
|
||||
struct GlobalDescriptorTableDescriptor
|
||||
{
|
||||
/** @brief GDT entries length */
|
||||
uint16_t Length;
|
||||
/** @brief GDT entries address */
|
||||
GlobalDescriptorTableEntries *Entries;
|
||||
} __packed;
|
||||
struct GlobalDescriptorTableDescriptor
|
||||
{
|
||||
/** @brief GDT entries length */
|
||||
uint16_t Length;
|
||||
/** @brief GDT entries address */
|
||||
GlobalDescriptorTableEntries *Entries;
|
||||
} __packed;
|
||||
|
||||
extern void *CPUStackPointer[];
|
||||
extern TaskStateSegment tss[];
|
||||
void Init(int Core);
|
||||
void SetKernelStack(void *Stack);
|
||||
void *GetKernelStack();
|
||||
extern void *CPUStackPointer[];
|
||||
extern TaskStateSegment tss[];
|
||||
void Init(int Core);
|
||||
void SetKernelStack(void *Stack);
|
||||
void *GetKernelStack();
|
||||
}
|
||||
|
||||
#define GDT_KERNEL_CODE offsetof(GlobalDescriptorTable::GlobalDescriptorTableEntries, Code)
|
||||
|
||||
Reference in New Issue
Block a user